STMICROELECTRONICS VNQ600P-E

VNQ600P-E
QUAD CHANNEL HIGH SIDE DRIVER
Table 1. General Features
TYPE
VNQ600P-E
Figure 1. Package
RDS(on) (*)
Ilim
VCC
35mΩ
25A
36 V
(*) Per each channel
DC SHORT CIRCUIT CURRENT: 22A
■ CMOS COMPATIBLE INPUTS
■ PROPORTIONAL LOAD CURRENT SENSE
■ UNDERVOLTAGE & OVERVOLTAGE
SHUT-DOWN
■ OVERVOLTAGE CLAMP
■ THERMAL SHUT-DOWN
■ CURRENT LIMITATION
■ VERY LOW STAND-BY POWER DISSIPATION
■ PROTECTION AGAINST:
LOSS OF GROUND & LOSS OF VCC
■ REVERSE BATTERY PROTECTION (**)
■ IN COMPLIANCE WITH THE 2002/95/EC
EUROPEAN DIRECTIVE
■
SO-28 (DOUBLE ISLAND)
The VNQ600P-E is intended for driving any type of
multiple loads with one side connected to ground.
This device has four independent channels and
four analog sense outputs which deliver currents
proportional to the outputs currents. Active current
limitation combined with thermal shut-down and
automatic restart protect the device against
overload. Device automatically turns off in case of
ground pin disconnection.
DESCRIPTION
The VNQ600P-E is a quad HSD formed by
assembling two VND600-E chips in the same SO28 package. The VND600-E is a monolithic device
designed in| STMicroelectronics VIPower M0-3
Technology.
Table 2. Order Codes
Package
SO-28
Tube
Tape and Reel
VNQ600P-E
VNQ600PTR-E
Note: (**) See application schematic at page 11.
Rev. 1
October 2004
1/20
VNQ600P-E
Figure 2. Block Diagram
VCC 1,2
OVERVOLTAGE
UNDERVOLTAGE
DEMAG 1
DRIVER 1
OUTPUT 1
INPUT 1
ILIM1
LOGIC
IOUT1
INPUT 2
K
CURRENT
SENSE 1
DEMAG 2
DRIVER 2
GND 1,2
OUTPUT 2
ILIM2
OVERTEMP. 1
IOUT2
OVERTEMP. 2
K
OVERVOLTAGE
CURRENT
SENSE 2
VCC 3,4
UNDERVOLTAGE
DEMAG 3
DRIVER 3
OUTPUT 3
INPUT 3
ILIM3
LOGIC
IOUT3
INPUT 4
K
CURRENT
SENSE 3
DEMAG 4
DRIVER 4
GND 3,4
OUTPUT 4
ILIM4
OVERTEMP. 3
OVERTEMP. 4
2/20
IOUT4
K
CURRENT
SENSE 4
VNQ600P-E
Table 3. Absolute Maximum Ratings
Symbol
Parameter
Value
Unit
41
V
-0.3
V
VCC
Supply voltage (continuous)
-VCC
Reverse supply voltage (continuous)
IOUT
Output current (continuous), for each channel
15
A
IR
Reverse output current (continuous), for each channel
-15
A
IIN
Input current
+/- 10
mA
-3
V
+15
V
-200
mA
4000
V
2000
V
5000
V
5000
V
(L=0.11mH; RL=0Ω; Vbat=13.5V; Tjstart=150ºC;
IL=40A)
126
mJ
Power dissipation (per island) at Tlead=25°C
6.25
W
Internally Limited
°C
-55 to 150
°C
VCSENSE
IGND
Current sense maximum voltage
Ground current at Tpins < 25°C (continuous)
Electrostatic Discharge (Human
R=1.5KΩ; C=100pF)
VESD
Body
Model:
- INPUT
- CURRENT SENSE
- OUTPUT
- VCC
Maximum Switching Energy
EMAX
Ptot
Tj
Tstg
Junction operating temperature
Storage temperature
Figure 3. Configuration Diagram (Top View) & Suggested Connections for Unused and N.C. Pins
VCC 1,2
1
28
VCC 1,2
GND 1,2
OUTPUT 2
INPUT 2
OUTPUT 2
INPUT 1
OUTPUT 2
CURRENT SENSE 1
OUTPUT 1
CURRENT SENSE 2
OUTPUT 1
VCC 1,2
OUTPUT 1
VCC 3,4
OUTPUT 4
GND 3,4
OUTPUT 4
INPUT 4
OUTPUT 4
INPUT 3
OUTPUT 3
CURRENT SENSE 3
OUTPUT 3
CURRENT SENSE 4
VCC 3,4
Connection / Pin
Floating
To Ground
OUTPUT 3
14
Current Sense
Through 1KΩ resistor
15
N.C.
X
X
VCC 3,4
Output
X
Input
X
Through 10KΩ resistor
3/20
VNQ600P-E
Figure 4. Current and Voltage Conventions
IS3,4
IS1,2
VCC3,4
VCC3,4
VCC1,2
VF1 (*)
VCC1,2
IIN1
ISENSE1
VIN1
IIN2
VSENSE1
ISENSE2
VIN2
VSENSE2
VIN3
IIN3
ISENSE3
VSENSE3 IIN4
VIN4 ISENSE4
VSENSE4
INPUT1
IOUT1
CUR. SENSE1
OUTPUT1
VOUT1
IOUT2
INPUT2
CUR. SENSE2
OUTPUT2
VOUT2
IOUT3
INPUT3
CUR. SENSE3
OUTPUT3
IOUT4
INPUT4
OUTPUT4
CUR. SENSE4
GND3,4
IGND3,4
VOUT3
VOUT4
GND1,2
IGND1,2
(*) VFn = VCCn - VOUTn during reverse battery condition
Table 4. Thermal Data
Symbol
Rthj-case
Rthj-amb
Rthj-amb
Parameter
Thermal resistance junction-case
Thermal resistance junction-ambient (one chip ON)
Thermal resistance junction-ambient (two chips ON)
(MAX)
(MAX)
(MAX)
Value
15
60 (1)
46 (1)
44 (2)
31 (2)
Unit
°C/W
°C/W
°C/W
Note: 1. When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35µm thick) connected to all VCC pins. Horizontal
mounting and no artificial air flow.
Note: 2. When mounted on a standard single-sided FR-4 board with 6cm 2 of Cu (at least 35µm thick) connected to all VCC pins. Horizontal
mounting and no artificial air flow.
4/20
VNQ600P-E
ELECTRICAL CHARACTERISTICS (8V<VCC<36V; -40°C<Tj<150°C unless otherwise specified)
(Per each channel)
Table 5. Power
Symbol
Parameter
VCC (**)
Min.
Typ.
Max.
Unit
Operating supply voltage
5.5
13
36
V
VUSD (**)
Undervoltage shut-down
3
4
5.5
V
VOV (**)
Overvoltage shut-down
36
RON
Vclamp
IS (**)
On state resistance
Clamp Voltage
Supply current
Test Conditions
V
IOUT1,2,3,4=5A; Tj=25°C
35
mΩ
IOUT1,2,3,4=5A; Tj=150°C
70
mΩ
IOUT1,2,3,4=3A; VCC=6V
120
mΩ
48
55
V
Off State; VCC=13V; VIN=VOUT=0V
12
40
µA
Off State; VCC=13V; VIN=VOUT=0V;
Tj =25°C
12
25
µA
6
mA
0
50
µA
-75
0
µA
ICC=20mA (see note 3)
41
On State; VCC=13V; VIN=5V; IOUT=0A;
RSENSE=3.9KΩ
IL(off1)
Off state output current
VIN=VOUT=0V
IL(off2)
Off State Output Current
VIN=0V; VOUT=3.5V
IL(off3)
Off State Output Current
VIN=VOUT=0V; VCC=13V; Tj =125°C
5
µA
IL(off4)
Off State Output Current
VIN=VOUT=0V; VCC=13V; Tj =25°C
3
µA
Max.
Unit
Note: 3. Vclamp and VOV are correlated. Typical difference is 5V.
Note: (**) Per island.
Table 6. Switching (VCC =13V)
Symbol
Parameter
Test Conditions
Min.
Typ.
td(on)
Turn-on delay time
RL=2.6Ω channels 1,2,3,4 (see fig. 1)
40
µs
td(off)
Turn-off delay time
RL=2.6Ω channels 1,2,3,4 (see fig. 1)
40
µs
(dVOUT/
dt)on
Turn-on voltage slope
RL=2.6Ω channels 1,2,3,4 (see fig. 1)
See
relative
diagram
V/µs
(dVOUT/
dt)off
Turn-off voltage slope
RL=2.6Ω channels 1,2,3,4 (see fig. 1)
See
relative
diagram
V/µs
Table 7. VCC - Output Diode
Symbol
VF
Parameter
Forward on Voltage
Test Conditions
-IOUT=2.3A; Tj=150°C
Min
Typ
Max
0.6
Unit
V
5/20
VNQ600P-E
ELECTRICAL CHARACTERISTICS (continued)
Table 8. Logic Input
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
1.25
V
VIL
Low level input voltage
VIH
High level input voltage
3.25
V
VI(hyst)
Input hysteresis voltage
0.5
V
1
µA
IIL
Input current
VIN=1.5V
IIN
Input current
VIN=3.5V
VICL
Input clamp voltage
IIN=1mA
6
IIN= -1mA
6.8
10
µA
8
V
-0.7
V
Table 9. Protections (See note 4)
Symbol
Ilim
TTSD
TR
Thyst
Vdemag
VON
Parameter
DC Short circuit current
Test Conditions
VCC=13V
Min.
Typ.
Max.
Unit
25
40
70
A
70
A
200
°C
5.5V<VCC<36V
Thermal shut-down
150
temperature
Thermal reset temperature
175
135
Thermal hysteresis
Turn-off output voltage
clamp
IOUT=2A; L=6mH
Output voltage drop
limitation
IOUT=0.5A; Tj= -40°C...+150°C
°C
7
15
VCC41
VCC-48
50
°C
VCC55
V
mV
Note: 4. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be
used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration
and number of activation cycles.
6/20
VNQ600P-E
ELECTRICAL CHARACTERISTICS (continued)
Table 10. CURRENT SENSE (9V ≤ VCC ≤ 16V) (See Figure 5)
Symbol
K1
dK1/K1
K2
dK2/K2
Parameter
IOUT/ISENSE
Current Sense Ratio Drift
IOUT/ISENSE
Current Sense Ratio Drift
Test Conditions
IOUT1 or IOUT2=0.5A; VSENSE=0.5V;
other channels open; Tj= -40°C...150°C
IOUT1 or IOUT2=0.5A; VSENSE=0.5V;
other channels open; Tj= -40°C...150°C
Min
Typ
Max
3300
4400
6000
-10
+10
IOUT1 or IOUT2=5A; VSENSE=4V; other
channels open; Tj=-40°C
4200
4900
6000
Tj=25°C...150°C
4400
4900
5750
IOUT1 or IOUT2=5A; VSENSE=4V; other
channels open;
-6
+6
Unit
%
%
Tj=-40°C...150°C
K3
dK3/K3
VSENSE1,2
VSENSEH
RVSENSEH
tDSENSE
IOUT/ISENSE
IOUT1 or IOUT2=15A; VSENSE=4V; other
channels open; Tj=-40°C
4200
4900
5500
Tj=25°C...150°C
4400
4900
5250
Current Sense Ratio Drift
IOUT1 or IOUT2=15A; VSENSE=4V; other
channels open;
-6
Max analog sense
Tj=-40°C...150°C
VCC=5.5V; IOUT1,2=2.5A; RSENSE=10kΩ
2
V
VCC>8V, IOUT1,2=5A; RSENSE=10kΩ
4
V
output voltage
Analog sense output
voltage in overtemperature
condition
Analog Sense Output
Impedance in
Overtemperature
Condition
Current sense delay
response
VCC=13V; RSENSE=3.9kΩ
VCC=13V; Tj>TTSD; All channels open
to 90% ISENSE (see note 5)
+6
%
5.5
V
400
Ω
500
µs
Note: 5. Current sense signal delay after positive input slope.
7/20
VNQ600P-E
Figure 5. IOUT/ISENSE versus IOUT
IOUT/ISENSE
6500
6000
max.Tj=-40°C
5500
max.Tj=25...150°C
5000
typical value
min.Tj=25...150°C
4500
4000
min.Tj=-40°C
3500
3000
0
2
4
6
8
10
12
14
IOUT (A)
Figure 6. Switching Characteristics (Resistive load RL=2.6Ω)
VOUT
90%
80%
dVOUT/dt(off)
dVOUT/dt(on)
tr
10%
tf
t
ISENSE
90%
INPUT
t
tDSENSE
td(on)
td(off)
t
8/20
16
VNQ600P-E
Table 11. Truth Table (Per channel)
CONDITIONS
INPUT
Normal operation
Overtemperature
Undervoltage
Overvoltage
Short circuit to GND
Short circuit to VCC
Negative output voltage
clamp
OUTPUT
SENSE
0
Nominal
L
L
H
H
L
L
0
H
L
VSENSEH
L
L
0
H
L
0
L
L
0
H
L
0
L
L
0
H
L
(Tj<TTSD) 0
H
L
(Tj>TTSD) VSENSEH
L
H
0
H
H
< Nominal
L
L
0
Table 12. Electrical Transient Requirements on VCC Pin
ISO T/R 7637/1
Test Pulse
I
II
TEST LEVELS
III
IV
1
2
3a
3b
4
5
-25 V
+25 V
-25 V
+25 V
-4 V
+26.5 V
-50 V
+50 V
-50 V
+50 V
-5 V
+46.5 V
-75 V
+75 V
-100 V
+75 V
-6 V
+66.5 V
-100 V
+100 V
-150 V
+100 V
-7 V
+86.5 V
ISO T/R 7637/1
Test Pulse
1
2
3a
3b
4
5
CLASS
C
E
I
C
C
C
C
C
C
TEST LEVELS RESULTS
II
III
C
C
C
C
C
C
C
C
C
C
E
E
Delays and
Impedance
2 ms 10 Ω
0.2 ms 10 Ω
0.1 µs 50 Ω
0.1 µs 50 Ω
100 ms, 0.01 Ω
400 ms, 2 Ω
IV
C
C
C
C
C
E
CONTENTS
All functions of the device are performed as designed after exposure to disturbance.
One or more functions of the device is not performed as designed after exposure to disturbance
and cannot be returned to proper operation without replacing the device.
9/20
VNQ600P-E
Figure 7. Waveforms (Per each chip)
NORMAL OPERATION
INPUTn
LOAD CURRENTn
SENSEn
UNDERVOLTAGE
VCC
VUSDhyst
VUSD
INPUTn
LOAD CURRENTn
SENSEn
OVERVOLTAGE
VOV
VCC
VCC < VOV
VCC > VOV
INPUTn
LOAD CURRENTn
SENSEn
SHORT TO GROUND
INPUTn
LOAD CURRENTn
LOAD VOLTAGEn
SENSEn
SHORT TO VCC
INPUTn
LOAD VOLTAGEn
LOAD CURRENTn
SENSEn
<Nominal
<Nominal
OVERTEMPERATURE
Tj
TTSD
TR
INPUTn
LOAD CURRENTn
SENSEn
10/20
ISENSE=
VSENSEH
RSENSE
VNQ600P-E
Figure 8. Application Schematic
+5V
Rprot
INPUT1
VCC1,2
VCC3,4
Dld
Rprot
C. SENSE 1
Rprot
INPUT2
Rprot
C. SENSE 2
OUTPUT2
INPUT3
OUTPUT3
OUTPUT1
µC
Rprot
Rprot
C. SENSE 3
Rprot
OUTPUT4
INPUT4
Rprot
C. SENSE 4
GND1,2
GND3,4
RGND
RSENSE1,2,3,4
VGND
DGND
Note: Channels 3 & 4 have the same internal circuit as channel 1 & 2.
GND PROTECTION
REVERSE BATTERY
NETWORK
AGAINST
Solution 1: Resistor in the ground line (RGND only). This
can be used with any type of load.
The following is an indication on how to dimension the
RGND resistor.
1) RGND ≤ 600mV / 2(IS(on)max).
2) RGND ≥ (−VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can
be found in the absolute maximum rating section of the
device’s datasheet.
Power Dissipation in RGND (when VCC<0: during reverse
battery situations) is:
PD= (-VCC)2/RGND
This resistor can be shared amongst several different
HSD. Please note that the value of this resistor should be
calculated with formula (1) where IS(on)max becomes the
sum of the maximum on-state currents of the different
devices.
Please note that if the microprocessor ground is not
common with the device ground then the RGND will
produce a shift (IS(on)max * RGND) in the input thresholds
and the status output values. This shift will vary
depending on how many devices are ON in the case of
several high side drivers sharing the same RGND.
If the calculated power dissipation leads to a large
resistor or several devices have to share the same
resistor then the ST suggests to utilize Solution 2 (see
below).
Solution 2: A diode (DGND) in the ground line.
A resistor (RGND=1kΩ) should be inserted in parallel to
DGND if the device will be driving an inductive load.
This small signal diode can be safely shared amongst
several different HSD. Also in this case, the presence of
the ground network will produce a shift (j600mV) in the
input threshold and the status output values if the
microprocessor ground is not common with the device
ground. This shift will not vary if more than one HSD
shares the same diode/resistor network.
Series resistor in INPUT line is also required to prevent
that, during battery voltage transient, the current exceeds
the Absolute Maximum Rating.
Safest configuration for unused INPUT pin is to leave it
unconnected, while unused SENSE pin has to be
connected to Ground pin.
LOAD DUMP PROTECTION
Dld is necessary (Voltage Transient Suppressor) if the
load dump peak voltage exceeds VCC max DC rating.
The same applies if the device will be subject to
transients on the VCC line that are greater than the ones
shown in the ISO T/R 7637/1 table.
µC I/Os PROTECTION:
If a ground protection network is used and negative
transients are present on the VCC line, the control pins will
be pulled negative. ST suggests to insert a resistor (Rprot)
in line to prevent the µC I/Os pins to latch-up.
The value of these resistors is a compromise between the
leakage current of µC and the current required by the
HSD I/Os (Input levels compatibility) with the latch-up
limit of µC I/Os.
-VCCpeak/Ilatchup ≤ Rprot ≤ (VOHµC-VIH-VGND) / IIHmax
Calculation example:
For VCCpeak= - 100V and Ilatchup ≥ 20mA; VOHµC ≥ 4.5V
5kΩ ≤ Rprot ≤ 65kΩ.
Recommended Rprot value is 10kΩ.
11/20
VNQ600P-E
Figure 9. Off State Output Current
Figure 10. Low Level Input Current
Iil (µA)
IL(off1) (µA)
6
4
5.5
3.5
Vcc=13V
Vcc=13V
Vin=1.5V
5
3
4.5
2.5
4
3.5
2
3
1.5
2.5
1
2
0.5
1.5
1
0
-50
-25
0
25
50
75
100
125
150
-50
175
-25
0
25
50
75
100
125
150
175
100
125
150
175
150
175
Tc (°C)
Tc (°C)
Figure 11. Input Clamp Voltage
Figure 13. Input High Level
Vicl (V)
Vih (V)
5
10
9.5
4.5
Iin=1mA
9
4
8.5
3.5
8
3
7.5
7
2.5
6.5
2
6
1.5
5.5
5
1
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C)
50
75
Tc (°C)
Figure 12. Input Low Level
Figure 14. Input Hysteresis Voltage
Vil (V)
Vhyst (V)
4
1.5
1.4
3.5
1.3
3
1.2
2.5
1.1
2
1
0.9
1.5
0.8
1
0.7
0.5
0.6
0
0.5
-50
-25
0
25
50
75
Tc (°C)
12/20
100
125
150
175
-50
-25
0
25
50
75
Tc (°C)
100
125
VNQ600P-E
Figure 15. Overvoltage Shutdown
Figure 16. ILIM Vs Tcase
Ilim (A)
Vov (V)
80
55
52.5
70
Vcc=13V
50
60
47.5
50
45
40
42.5
40
30
37.5
20
35
10
32.5
0
30
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
150
175
Tc (°C)
Tc (°C)
Figure 17. Turn-on Voltage Slope
Figure 19. Turn-off Voltage Slope
Vov (V)
dVout/dt(off)
(V/ms)
dVout/dt(on) (V/ms)
55
1
1
52.5
0.9
0.9
Vcc=13V
Rl=2.6Ohm
0.8
0.8
50
0.7
47.5
0.7
0.6
0.6
45
0.5
42.5
0.5
0.4
0.4
40
0.3
37.5
0.3
0.2
0.2
35
0.1
32.5
0.1
Vcc=13V
Rl=2.6Ohm
30
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
-50
-25
-25
00
25
25
50
50
75
75
100
100
125
125
Tc
Tc (°C)
(°C)
Tc (°C)
Figure 18. On State Resistance Vs Tcase
Ron (mOhm)
80
70
Vcc=13V
Iout=5V
60
50
40
30
20
10
0
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
13/20
VNQ600P-E
Figure 20. Maximum Turn Off Current Versus Load Inductance
ILMAX (A)
100
A
B
C
10
1
0.001
0.01
0.1
1
10
100
L(mH )
A = Single Pulse at TJstart=150ºC
B= Repetitive pulse at TJstart=100ºC
C= Repetitive Pulse at TJstart=125ºC
Conditions:
VCC=13.5V
Values are generated with RL=0Ω
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed
the temperature specified above for curves B and C.
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
14/20
VNQ600P-E
SO-28 Thermal Data
Figure 21. SO-28 Double Island PC Board
Layout condition of Rth and Zth measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm,
Cu thickness=35µm, Copper areas: 0.5cm2, 3cm2, 6cm2).
Table 13. Thermal Calculation According to the PCB Heatsink Area
Chip 1
ON
OFF
ON
ON
Chip 2
OFF
ON
ON
ON
Tjchip1
RthA x Pdchip1 + Tamb
RthC x Pdchip2 + Tamb
RthB x (Pdchip1 + Pdchip2) + Tamb
(RthA x Pdchip1) + RthC x Pdchip2 + Tamb
Tjchip2
Note
RthC x Pdchip1 + Tamb
RthA x Pdchip2 + Tamb
RthB x (Pdchip1 + Pdchip2) + Tamb
Pdchip1=Pdchip2
(RthA x Pdchip2) + RthC x Pdchip1 + Tamb Pdchip1≠Pdchip2
Note:RthA = Thermal resistance Junction to Ambient with one chip ON
Note:RthB = Thermal resistance Junction to Ambient with both chips ON and Pdchip1=Pdchip2
Note:RthC = Mutual thermal resistance
Figure 22. Rthj-amb Vs PCB Copper Area In Open Box Free Air Condition
RTHj_am b
(°C/W)
70
60
50
RthA
40
RthB
30
20
RthC
10
0
1
2
3
4
5
PCB Cu heatsink area (cm ^2)/island
6
7
15/20
VNQ600P-E
Figure 23. SO-28 Thermal Impedance Junction Ambient Single Pulse
Zth(°C /W )
10 0
0,5 cm ^2/is lan d
3 cm ^2/is lan d
6 cm ^2/is lan d
10
One channel ON
Two channels
ON on same chip
1
0 .1
0.0 1
0.0 00 1
0 .0 01
0 .01
0 .1
1
tim e (s)
Figure 24. Thermal Fitting Model of a Quad
Channels HSD in SO-28
10
C1
C2
C3
C4
C5
C6
R1
R2
R3
R4
R5
R6
Pd1
Tj_2
C13
R13
C14
R14
Pd2
R17
Tj_3
R18
C7
C8
C9
R7
R8
R9
C10
C11
C12
Pd3
Tj_4
C15
R15
R10
C16
R16
Pd4
T_amb
16/20
R11
R12
10 0 0
Pulse Calculation Formula
THδ
where
Tj_1
100
= R TH ⋅ δ + Z THtp ( 1 – δ )
δ = tp ⁄ T
Table 14. Thermal Parameter
Area/island (cm2)
R1=R7=R13=R15 (°C/W)
R2=R8=R14=R16 (°C/W)
R3=R9 (°C/W)
R4=R10 (°C/W)
R5=R11 (°C/W)
R6=R12 (°C/W)
C1=C7=C13=C15 (W.s/°C)
C2=C8=C14=C16 (W.s/°C)
C3=C9 (W.s/°C)
C4=C10 (W.s/°C)
C5=C11 (W.s/°C)
C6=C12 (W.s/°C)
R17=R18 (°C/W)
0.5
0.05
0.3
3.4
11
15
30
0.001
5.00E-03
1.00E-02
0.2
1.5
5
150
6
13
8
VNQ600P-E
PACKAGE MECHANICAL
Table 15. SO-28 Mechanical Data
Symbol
millimeters
Min
Typ
A
Max
2.65
a1
0.10
0.30
b
0.35
0.49
b1
0.23
C
0.32
0.50
c1
45 (typ.)
D
17.7
18.1
E
10.00
10.65
e
1.27
e3
16.51
F
7.40
7.60
L
0.40
1.27
S
8 (max.)
Figure 25. SO-28 Package Dimensions
17/20
VNQ600P-E
Figure 26. SO-28 Tube Shipment (no suffix)
Base Q.ty
Bulk Q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
C
B
28
700
532
3.5
13.8
0.6
All dimensions are in mm.
A
Figure 27. Tape and Reel Shipment (suffix “TR”)
REEL DIMENSIONS
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
1000
1000
330
1.5
13
20.2
16.4
60
22.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
P
D (± 0.1/-0)
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
All dimensions are in mm.
16
4
12
1.5
1.5
7.5
6.5
2
End
Start
Top
No components
Components
No components
cover
tape
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
18/20
500mm min
VNQ600P-E
REVISION HISTORY
Table 16. Revision History
Date
Revision
Oct. 2004
1
Description of Changes
First issue.
19/20
VNQ600P-E
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20/20