TI SN74ALB16244DL

SN74ALB16244
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCBS647D – AUGUST 1995 – REVISED JANUARY 2001
D
D
D
D
D
D
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
Member of Texas Instruments’ Widebus
Family
State-of-the-Art Advanced Low-Voltage
BiCMOS (ALB) Technology Design for 3.3-V
Operation
Schottky Diodes on All Inputs to Eliminate
Overshoot and Undershoot
Industry Standard ’16244 Pinout
Distributed VCC and GND Pins Minimize
High-Speed Switching Noise
Flow-Through Architecture Optimizes PCB
Layout
1OE
1Y1
1Y2
GND
1Y3
1Y4
VCC
2Y1
2Y2
GND
2Y3
2Y4
3Y1
3Y2
GND
3Y3
3Y4
VCC
4Y1
4Y2
GND
4Y3
4Y4
4OE
description
The SN74ALB16244 16-bit buffer and line driver
is designed for high-speed, low-voltage (3.3-V)
VCC operation. This device is intended to replace
the conventional driver in any speed-critical path.
The small propagation delay is achieved using a
unity-gain amplifier on the input and feedback
resistors from input to output, which allows the
output to track the input with a small offset voltage.
The device can be used as four 4-bit buffers, two
8-bit buffers, or one 16-bit buffer. This device
provides true outputs and symmetrical active-low
output-enable (OE) inputs.
1
48
2
47
3
46
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
25
2OE
1A1
1A2
GND
1A3
1A4
VCC
2A1
2A2
GND
2A3
2A4
3A1
3A2
GND
3A3
3A4
VCC
4A1
4A2
GND
4A3
4A4
3OE
ORDERING INFORMATION
SSOP – DL
–40°C
40°C to 85°C
ORDERABLE
PART NUMBER
PACKAGE†
TA
TSSOP – DGG
TOP-SIDE
MARKING
Tube
SN74ALB16244DL
Tape and reel
SN74ALB16244DLR
Tape and reel
SN74ALB16244DGGR
ALB16244
ALB16244
TVSOP – DGV
Tape and reel
SN74ALB16244DGVR
AV244
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
FUNCTION TABLE
(each buffer)
INPUTS
OE
A
OUTPUT
Y
L
H
H
L
L
L
H
X
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
Copyright  2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SN74ALB16244
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCBS647D – AUGUST 1995 – REVISED JANUARY 2001
logic symbol†
1OE
2OE
1
EN1
48
25
3OE
4OE
1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4
3A1
3A2
3A3
3A4
4A1
4A2
4A3
4A4
24
EN2
EN3
EN4
47
1
1
46
3
44
5
43
6
41
40
1
2
8
9
38
11
37
12
36
13
35
1
3
14
33
16
32
17
30
19
1
4
29
20
27
22
26
23
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
2
2
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1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
3Y1
3Y2
3Y3
3Y4
4Y1
4Y2
4Y3
4Y4
SN74ALB16244
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCBS647D – AUGUST 1995 – REVISED JANUARY 2001
logic diagram (positive logic)
1OE
1A1
1A2
1A3
1A4
2OE
2A1
2A2
2A3
2A4
1
3OE
47
2
46
3
44
5
43
6
1Y1
3A1
1Y2
3A2
1Y3
3A3
1Y4
3A4
48
4OE
41
8
40
9
38
11
37
12
2Y1
4A1
2Y2
4A2
2Y3
4A3
2Y4
4A4
25
36
13
35
14
33
16
32
17
3Y1
3Y2
3Y3
3Y4
24
30
19
29
20
27
22
26
23
4Y1
4Y2
4Y3
4Y4
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 4.6 V
Input voltage range, VI: Except I/O ports (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 4.6 V
I/O ports (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V
Output voltage range, VO (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through each VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA
Package thermal impedance, θJA (see Note 3): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
DL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. This value is limited to 4.6 V maximum.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
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3
SN74ALB16244
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCBS647D – AUGUST 1995 – REVISED JANUARY 2001
recommended operating conditions
MIN
MAX
3
3.6
V
High-level output current
–25
mA
Low-level output current
25
mA
5
ns/V
85
°C
VCC
IOH†
Supply voltage
IOL†
∆t/∆v
Input transition rise or fall rate
Outputs enabled
TA
Operating free-air temperature
† See Figures 1 and 2 for typical I/O ranges.
–40
UNIT
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
II
TEST CONDITIONS
Data inputs
VCC = 3 V
II = 18 mA
II = –18 mA
Control inputs
VCC = 3.6 V,
VI = VCC or GND
VI = VCC
Data inputs
VCC = 3
3.6
6V
VI = 0
MIN
TYP‡
3.6
–0.9
OE low
UNIT
VCC–1.2
–1.2
V
±10
µA
0.6
mA
25
µA
0.4
OE high
OE low
–0.8
–1
mA
–60
µA
0.6
20
µA
–0.1
–50
µA
3.7
5.6
mA
0.8
mA
600
µA
OE high
IOZH
IOZL
VCC = 3.6 V,
VCC = 3.6 V,
VO = 3 V
VO = 0.5 V
ICC/buffer
ICCZ
VCC = 3.6 V,
VCC = 3.6 V,
IO = 0,
VI = VCC or GND
Control inputs = VCC or GND
∆ICC§
Ci
VCC = 3 V to 3.6 V, One input at VCC – 0.6 V, Other inputs at VCC or GND
VI = 3 V or 0
VO = 3 V or 0
Co
MAX
4.5
pF
5.5
pF
‡ All typical values are at VCC = 3.3 V, TA = 25°C.
§ This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 3)
VCC = 3.3 V ± 0.3 V
MIN TYP‡
MAX
FROM
(INPUT)
TO
(OUTPUT)
tpd
A
Y
0.6
1.3
2
ns
ten
OE
Y
1.3
2.5
4.7
ns
tdis
OE
‡ All typical values are at VCC = 3.3 V, TA = 25°C.
Y
1.8
2.8
4.2
ns
PARAMETER
4
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• DALLAS, TEXAS 75265
UNIT
SN74ALB16244
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCBS647D – AUGUST 1995 – REVISED JANUARY 2001
OUTPUT VOLTAGE HIGH
vs
INPUT VOLTAGE
VOH – Output Voltage – V
3.5
3
2.5
–100 µA
–25 mA
–6 mA
2
1.5
1.5
2
2.5
3
3.5
4
VI – Input Voltage – V
Figure 1. VOH Over Recommended Free-Air Temperature Range
OUTPUT VOLTAGE LOW
vs
INPUT VOLTAGE
2
VOL – Output Voltage – V
1.5
25 mA
1
100 µA
0.5
6 mA
0
0
0.5
1
1.5
2
VI – Input Voltage – V
Figure 2. VOL Over Recommended Free-Air Temperature Range
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
SN74ALB16244
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCBS647D – AUGUST 1995 – REVISED JANUARY 2001
PARAMETER MEASUREMENT INFORMATION
6V
500 Ω
From Output
Under Test
S1
Open
GND
CL = 50 pF
(see Note A)
500 Ω
TEST
S1
tpd
tPLZ/tPZL
tPHZ/tPZH
Open
6V
GND
LOAD CIRCUIT
tw
3V
3V
Timing
Input
0V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
th
3V
Data
Input
1.5 V
1.5 V
0V
1.5 V
1.5 V
0V
tPZL
3V
1.5 V
3V
Output Control
(low-level
enabling)
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
1.5 V
0V
tPLH
Output
1.5 V
1.5 V
tsu
Input
1.5 V
Input
Output
Waveform 1
S1 at 6 V
(see Note B)
3V
1.5 V
VOL + 0.3 V
tPZH
tPHL
VOH
1.5 V
tPLZ
1.5 V
VOL
Output
Waveform 2
S1 at GND
(see Note B)
VOL
tPHZ
1.5 V
VOH
VOH – 0.3 V
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
Figure 3. Load Circuit and Voltage Waveforms
6
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PACKAGE OPTION ADDENDUM
www.ti.com
27-Sep-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
74ALB16244DGGRE4
ACTIVE
TSSOP
DGG
48
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74ALB16244DGGRG4
ACTIVE
TSSOP
DGG
48
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74ALB16244DGVRE4
ACTIVE
TVSOP
DGV
48
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74ALB16244DGVRG4
ACTIVE
TVSOP
DGV
48
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ALB16244DGGR
ACTIVE
TSSOP
DGG
48
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ALB16244DGVR
ACTIVE
TVSOP
DGV
48
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ALB16244DL
ACTIVE
SSOP
DL
48
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ALB16244DLG4
ACTIVE
SSOP
DL
48
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ALB16244DLR
ACTIVE
SSOP
DL
48
1000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ALB16244DLRG4
ACTIVE
SSOP
DL
48
1000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
Diameter Width
(mm) W1 (mm)
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
W
Pin1
(mm) Quadrant
8.6
15.8
1.8
12.0
24.0
Q1
SN74ALB16244DGGR
TSSOP
DGG
48
2000
330.0
24.4
SN74ALB16244DGVR
TVSOP
DGV
48
2000
330.0
24.4
6.8
10.1
1.6
12.0
24.0
Q1
SN74ALB16244DLR
SSOP
DL
48
1000
330.0
32.4
11.35
16.2
3.1
16.0
32.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
SN74ALB16244DGGR
TSSOP
DGG
48
2000
346.0
346.0
41.0
SN74ALB16244DGVR
TVSOP
DGV
48
2000
346.0
346.0
41.0
SN74ALB16244DLR
SSOP
DL
48
1000
346.0
346.0
49.0
Pack Materials-Page 2
MECHANICAL DATA
MTSS003D – JANUARY 1995 – REVISED JANUARY 1998
DGG (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0,27
0,17
0,50
48
0,08 M
25
6,20
6,00
8,30
7,90
0,15 NOM
Gage Plane
1
0,25
24
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
48
56
64
A MAX
12,60
14,10
17,10
A MIN
12,40
13,90
16,90
DIM
4040078 / F 12/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold protrusion not to exceed 0,15.
Falls within JEDEC MO-153
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MECHANICAL DATA
MSSO001C – JANUARY 1995 – REVISED DECEMBER 2001
DL (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0.025 (0,635)
0.0135 (0,343)
0.008 (0,203)
48
0.005 (0,13) M
25
0.010 (0,25)
0.005 (0,13)
0.299 (7,59)
0.291 (7,39)
0.420 (10,67)
0.395 (10,03)
Gage Plane
0.010 (0,25)
1
0°–ā8°
24
0.040 (1,02)
A
0.020 (0,51)
Seating Plane
0.110 (2,79) MAX
0.004 (0,10)
0.008 (0,20) MIN
PINS **
28
48
56
A MAX
0.380
(9,65)
0.630
(16,00)
0.730
(18,54)
A MIN
0.370
(9,40)
0.620
(15,75)
0.720
(18,29)
DIM
4040048 / E 12/01
NOTES: A.
B.
C.
D.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).
Falls within JEDEC MO-118
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MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,40
0,23
0,13
24
13
0,07 M
0,16 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
0°–8°
1
0,75
0,50
12
A
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,08
14
16
20
24
38
48
56
A MAX
3,70
3,70
5,10
5,10
7,90
9,80
11,40
A MIN
3,50
3,50
4,90
4,90
7,70
9,60
11,20
DIM
4073251/E 08/00
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
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Amplifiers
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amplifier.ti.com
dataconverter.ti.com
dsp.ti.com
www.ti.com/clocks
interface.ti.com
logic.ti.com
power.ti.com
microcontroller.ti.com
www.ti-rfid.com
www.ti.com/lprf
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Audio
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Digital Control
Medical
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Wireless
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www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/medical
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www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
www.ti.com/wireless
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