TC74VCX16823FT TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VCX16823FT Low-Voltage 18-Bit D-Type Flip-Flop with 3.6-V Tolerant Inputs and Outputs The TC74VCX16823FT is a high-performance CMOS 18-bit D-type flip-flop. Designed for use in 1.8-V, 2.5-V or 3.3-V systems, it achieves high-speed operation while maintaining the CMOS low power dissipation. It is also designed with overvoltage tolerant inputs and outputs up to 3.6 V. The TC74VCX16823FT can be used as two 9-bit flip-flops or one 18-bit flip-flop. With the clock-enable (CKEN) input low, the D-type flip-flops enter data on the low-to-high transitions of the clock. Taking CKEN high disables the clock buffer, thus latching Weight: 0.25 g (typ.) the outputs. Taking the clear (CLR) input low causes the Q outputs to go low independently of the clock. When the OE input is high, the outputs are in a high-impedance state. This device is designed to be used with 3-state memory address drivers, etc. All inputs are equipped with protection circuits against static discharge. Features • Low-voltage operation: VCC = 1.8 to 3.6 V • High-speed operation: tpd = 3.5 ns (max) (VCC = 3.0 to 3.6 V) : tpd = 4.4 ns (max) (VCC = 2.3 to 2.7 V) : tpd = 8.8 ns (max) (VCC = 1.8 V) • Output current: IOH/IOL = ±24 mA (min) (VCC = 3.0 V) : IOH/IOL = ±18 mA (min) (VCC = 2.3 V) : IOH/IOL = ±6 mA (min) (VCC = 1.8 V) • Latch-up performance: −300 mA • ESD performance: Machine model ≥ ±200 V Human body model ≥ ±2000 V • Package: TSSOP • 3.6-V tolerant function and power-down protection provided on all inputs and outputs 1 2007-10-19 TC74VCX16823FT Pin Assignment (top view) IEC Logic Symbol 1OE 1CLR 1 56 1CK 1OE 2 55 1CKEN 1Q1 3 54 1D1 GND 4 53 GND 1Q2 5 52 1D2 2CK 1Q3 6 51 1D3 1D1 1D2 1D3 1D4 1D5 1D6 1D7 1D8 1D9 2D1 2D2 2D3 2D4 2D5 1CLR 1CKEN 1CK VCC 7 50 VCC 1Q4 8 49 1D4 1Q5 9 48 1D5 1Q6 10 47 1D6 GND 11 46 GND 1Q7 12 45 1D7 1Q8 13 44 1D8 14 43 1D9 2Q1 15 42 2D1 1Q9 2Q2 16 41 2D2 2Q3 17 40 2D3 GND 18 39 GND 2Q4 19 38 2D4 20 37 2D5 2Q6 21 36 2D6 2Q5 VCC 22 35 VCC 2Q7 23 34 2D7 2Q8 24 33 2D8 GND 25 32 GND 2Q9 26 31 2D9 2OE 27 30 2CKEN 2CLR 28 29 2CK 2OE 2CLR 2CKEN 2D6 2D7 2D8 2D9 2 2 1 55 56 27 28 30 29 54 52 51 49 48 47 45 44 43 42 41 40 38 37 36 34 33 31 EN1 R2 G3 3C4 EN5 R6 G7 7C8 4D 1, 2 3 5 6 8 9 10 12 13 14 8D 5, 6 15 16 17 19 20 21 23 24 26 1Q1 1Q2 1Q3 1Q4 1Q5 1Q6 1Q7 1Q8 1Q9 2Q1 2Q2 2Q3 2Q4 2Q5 2Q6 2Q7 2Q8 2Q9 2007-10-19 TC74VCX16823FT Truth Table (each 9-bit flip flop) Outputs Inputs OE CLR CKEN CK D Q L L X X X L L H L H H L H L L L L H L L X Q0 L H H X X Q0 H X X X X Z X: Don’t care Z: High impedance Qn: No change System Diagram 1OE 1CLR 1CKEN 1CK 1D1 2 1 55 R CK 56 54 3 1Q1 D To eight other channels 2OE 2CLR 2CKEN 2CK 2D1 27 28 30 R CK 29 42 15 2Q1 D To eight other channels 3 2007-10-19 TC74VCX16823FT Absolute Maximum Ratings (Note 1) Characteristics Symbol Rating Unit Power supply voltage VCC −0.5 to 4.6 V DC input voltage VIN −0.5 to 4.6 V −0.5 to 4.6 (Note 2) DC output voltage VOUT −0.5 to VCC + 0.5 V (Note 3) IIK −50 Output diode current IOK ±50 DC output current IOUT ±50 mA Input diode current Power dissipation DC VCC/ground current per supply pin Storage temperature mA (Note 4) mA PD 400 mW ICC/IGND ±100 mA Tstg −65 to 150 °C Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 2: OFF state Note 3: High or low state. IOUT absolute maximum rating must be observed. Note 4: VOUT < GND, VOUT > VCC Operating Ranges (Note 1) Characteristics Symbol Power supply voltage VCC Input voltage VIN Rating Unit 1.8 to 3.6 1.2 to 3.6 (Note 2) −0.3 to 3.6 V V 0 to 3.6 (Note 3) 0 to VCC (Note 4) Output voltage VOUT ±24 (Note 5) Output current IOH/IOL ±18 (Note 6) ±6 (Note 7) Operating temperature Topr −40 to 85 Input rise and fall time dt/dv 0 to 10 V mA °C (Note 8) ns/V Note 1: The operating ranges must be maintained to ensure the normal operation of the device. Unused inputs must be tied to either VCC or GND. Note 2: Data retention only Note 3: OFF state Note 4: High or low state Note 5: VCC = 3.0 to 3.6 V Note 6: VCC = 2.3 to 2.7 V Note 7: VCC = 1.8 V Note 8: VIN = 0.8 to 2.0 V, VCC = 3.0 V 4 2007-10-19 TC74VCX16823FT Electrical Characteristics DC Characteristics (Ta = −40 to 85°C, 2.7 V < VCC =< 3.6 V) Characteristics Input voltage Symbol Test Condition H-level VIH ⎯ L-level VIL ⎯ H-level VOH Min Max 2.7 to 3.6 2.0 ⎯ 2.7 to 3.6 ⎯ 0.8 IOH = −100 μA 2.7 to 3.6 VCC − 0.2 ⎯ IOH = −12 mA 2.7 2.2 ⎯ IOH = −18 mA 3.0 2.4 ⎯ IOH = −24 mA 3.0 2.2 ⎯ IOL = 100 μA 2.7 to 3.6 ⎯ 0.2 IOL = 12 mA 2.7 ⎯ 0.4 IOL = 18 mA 3.0 ⎯ 0.4 IOL = 24 mA 3.0 ⎯ 0.55 2.7 to 3.6 ⎯ ±5.0 μA 2.7 to 3.6 ⎯ ±10.0 μA 0 ⎯ 10.0 μA VIN = VCC or GND 2.7 to 3.6 ⎯ 20.0 VCC < = (VIN, VOUT) < = 3.6 V 2.7 to 3.6 ⎯ ±20.0 VIH = VCC − 0.6 V 2.7 to 3.6 ⎯ 750 Min Max VIN = VIH or VIL Output voltage L-level VOL Input leakage current IIN 3-state output OFF state current IOZ Power-off leakage current IOFF Quiescent supply current ICC Increase in ICC per input ΔICC VIN = VIH or VIL VIN = 0 to 3.6 V VIN = VIH or VIL VOUT = 0 to 3.6 V VIN, VOUT = 0 to 3.6 V VCC (V) Unit V V μA DC Characteristics (Ta = −40 to 85°C, 2.3 V =< VCC =< 2.7 V) Characteristics Input voltage Symbol Test Condition H-level VIH ⎯ 2.3 to 2.7 1.6 ⎯ L-level VIL ⎯ 2.3 to 2.7 ⎯ 0.7 2.3 to 2.7 VCC − 0.2 ⎯ IOH = −6 mA 2.3 2.0 ⎯ IOH = −12 mA 2.3 1.8 ⎯ IOH = −18 mA 2.3 1.7 ⎯ IOL = 100 μA 2.3 to 2.7 ⎯ 0.2 IOL = 12 mA 2.3 ⎯ 0.4 IOL = 18 mA 2.3 ⎯ 0.6 2.3 to 2.7 ⎯ ±5.0 μA 2.3 to 2.7 ⎯ ±10.0 μA 0 ⎯ 10.0 μA VIN = VCC or GND 2.3 to 2.7 ⎯ 20.0 VCC < = (VIN, VOUT) < = 3.6 V 2.3 to 2.7 ⎯ ±20.0 IOH = −100 μA H-level VOH VIN = VIH or VIL Output voltage L-level VOL Input leakage current IIN 3-state output OFF state current IOZ Power-off leakage current IOFF Quiescent supply current ICC VIN = VIH or VIL VIN = 0 to 3.6 V VIN = VIH or VIL VOUT = 0 to 3.6 V VIN, VOUT = 0 to 3.6 V 5 VCC (V) Unit V V μA 2007-10-19 TC74VCX16823FT DC Characteristics (Ta = −40 to 85°C, 1.8 V =< VCC < 2.3 V) Characteristics Symbol Test Condition H-level VIH ⎯ L-level VIL ⎯ H-level VOH Min Max 1.8 to 2.3 0.7 × VCC ⎯ 1.8 to 2.3 ⎯ 0.2 × VCC IOH = −100 μA 1.8 VCC − 0.2 ⎯ IOH = −6 mA 1.8 1.4 ⎯ IOL = 100 μA 1.8 ⎯ 0.2 IOL = 6 mA 1.8 ⎯ 0.3 1.8 ⎯ ±5.0 μA 1.8 ⎯ ±10.0 μA 0 ⎯ 10.0 μA VIN = VCC or GND 1.8 ⎯ 20.0 VCC < = (VIN, VOUT) < = 3.6 V 1.8 ⎯ ±20.0 VCC (V) Input voltage VIN = VIH or VIL Output voltage VOL VIN = VIH or VIL Input leakage current IIN VIN = 0 to 3.6 V 3-state output OFF state current IOZ Power-off leakage current IOFF Quiescent supply current ICC L-level VIN = VIH or VIL VOUT = 0 to 3.6 V VIN, VOUT = 0 to 3.6 V 6 Unit V V μA 2007-10-19 TC74VCX16823FT AC Characteristics (Ta = −40 to 85°C, input: tr = tf = 2.0 ns, CL = 30 pF, RL = 500 Ω) (Note 1) Characteristics Maximum clock frequency Propagation delay time (CK-Q) Propagation delay time ( CLR -Q) 3-state output enable time 3-state output disable time Minimum pulse width (CK, CLR ) Minimum set-up time (D, CKEN ) Minimum hold time (D, CKEN ) Minimum removal time Output to output skew Symbol fmax tpLH tpHL tpHL tpZL tpZH tpLZ tpHZ tW (H) tW (L) ts th trem Test Condition Figure 1, Figure 2 Figure 1, Figure 2 Figure 1, Figure 3 Figure 1, Figure 4 Figure 1, Figure 4 Figure 1, Figure 2, Figure 3 Figure 1, Figure 2, Figure 5 Figure 1, Figure 2, Figure 5 Figure 1, Figure 6 tosLH tosHL Min Max 1.8 100 ⎯ 2.5 ± 0.2 200 ⎯ 3.3 ± 0.3 250 ⎯ 1.8 1.5 8.8 2.5 ± 0.2 0.8 4.4 3.3 ± 0.3 0.6 3.5 1.8 1.5 9.2 2.5 ± 0.2 0.8 4.6 3.3 ± 0.3 0.6 3.7 1.8 1.5 9.8 2.5 ± 0.2 0.8 4.9 3.3 ± 0.3 0.6 3.8 1.8 1.5 7.6 2.5 ± 0.2 0.8 4.2 3.3 ± 0.3 0.6 3.7 1.8 4.0 ⎯ 2.5 ± 0.2 1.5 ⎯ 3.3 ± 0.3 1.5 ⎯ VCC (V) 1.8 2.5 ⎯ 2.5 ± 0.2 1.5 ⎯ 3.3 ± 0.3 1.5 ⎯ 1.8 1.0 ⎯ 2.5 ± 0.2 1.0 ⎯ 3.3 ± 0.3 1.0 ⎯ 1.8 4.0 ⎯ 2.5 ± 0.2 2.0 ⎯ 3.3 ± 0.3 2.0 ⎯ 1.8 ⎯ 0.5 (Note 2) 2.5 ± 0.2 ⎯ 0.5 3.3 ± 0.3 ⎯ 0.5 Unit MHz ns ns ns ns ns ns ns ns ns Note 1: For CL = 50 pF, add approximately 300 ps to the AC maximum specification. Note 2: Parameter guaranteed by design. (tosLH = |tpLHm − tpLHn|, tosHL = |tpHLm − tpHLn|) 7 2007-10-19 TC74VCX16823FT Dynamic Switching Characteristics (Ta = 25°C, input: tr = tf = 2.0 ns, CL = 30 pF, RL = 500 Ω) Characteristics Quiet output maximum dynamic VOL Quiet output minimum dynamic VOL Quiet output minimum dynamic VOH Note: Test Condition Symbol VOLP VOLV VOHV VCC (V) Typ. VIH = 1.8 V, VIL = 0 V (Note) 1.8 0.25 VIH = 2.5 V, VIL = 0 V (Note) 2.5 0.6 VIH = 3.3 V, VIL = 0 V (Note) 3.3 0.8 VIH = 1.8 V, VIL = 0 V (Note) 1.8 −0.25 VIH = 2.5 V, VIL = 0 V (Note) 2.5 −0.6 VIH = 3.3 V, VIL = 0 V (Note) 3.3 −0.8 VIH = 1.8 V, VIL = 0 V (Note) 1.8 1.5 VIH = 2.5 V, VIL = 0 V (Note) 2.5 1.9 VIH = 3.3 V, VIL = 0 V (Note) 3.3 2.2 Unit V V V Parameter guaranteed by design. Capacitive Characteristics (Ta = 25°C) Symbol Test Condition Input capacitance CIN ⎯ Output capacitance CO ⎯ Power dissipation capacitance CPD Characteristics Note: Typ. Unit 1.8, 2.5, 3.3 6 pF 1.8, 2.5, 3.3 7 pF (Note) 1.8, 2.5, 3.3 20 pF VCC (V) fIN = 10 MHz CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr) = CPD･VCC･fIN + ICC/18 (per bit) 8 2007-10-19 TC74VCX16823FT AC Test Circuit 6.0 V or VCC × 2 Open GND RL Switch Switch tpLH, tpHL Open RL Measure CL Output Parameter tpLZ, tpZL CL = 30 pF RL = 500 Ω 6.0 V VCC × 2 tpHZ, tpZH @VCC = 3.3 ± 0.3 V @VCC = 2.5 ± 0.2 V @VCC = 1.8 V GND Figure 1 AC Waveform tr 2.0 ns Input (CK) 10% tf 2.0 ns VIH 90% VM GND tr 2.0 ns Input (D) 10% tf 2.0 ns tw (H) tw (L) VIH 90% VM ts (H) th (H) ts (L) GND th (L) VOH Output (Q) VM tpHL VOL tpLH Figure 2 tpLH, tpHL, tw, ts, th VIH Input ( CLR ) GND tw (L) Output (Q) VOH VM VOL tpHL Figure 3 tpLH, tpHL 9 2007-10-19 TC74VCX16823FT tr 2.0 ns tf 2.0 ns VIH 90% VM Output Enable Control ( OE ) 10% tpLZ GND tpZL 3.0 V or VCC Output (Q) Low to Off to Low VM VX tpHZ VOH VY Output (Q) High to Off to High VOL tpZH VM GND Outputs enabled Outputs enabled Outputs disabled Figure 4 tpLZ, tpHZ, tpZL, tpZH tr 2.0 ns Input ( CKEN ) tf 2.0 ns VIH 90% 10% VM GND tr 2.0 ns VIH Output (CK) VM ts (H) th (H) ts (L) th (L) GND Figure 5 ts, th tr 2.0 ns Input ( CLR ) VIH 90% 10% VM GND tr 2.0 ns 90% Output (CK) 10% VIH VM trem GND Figure 6 trem Symbol VCC 3.3 ± 0.3 V 2.5 ± 0.2 V 1.8 V VIH 2.7 V VCC VCC VM 1.5 V VCC/2 VCC/2 VX VOL + 0.3 V VOL + 0.15 V VOL + 0.15 V VY VOL − 0.3 V VOL − 0.15 V VOL − 0.15 V 10 2007-10-19 TC74VCX16823FT Package Dimensions Weight: 0.25 g (typ.) 11 2007-10-19 TC74VCX16823FT RESTRICTIONS ON PRODUCT USE 20070701-EN GENERAL • The information contained herein is subject to change without notice. • TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. 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Toshiba assumes no liability for damage or losses occurring as a result of noncompliance with applicable laws and regulations. 12 2007-10-19