TI SN74ALS138ADR

SN54ALS138A, SN54AS138, SN74ALS138A, SN74AS138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SDAS055E – APRIL 1982 – REVISED JULY 1996
D
D
D
Designed Specifically for High-Speed
Memory Decoders and Data Transmission
Systems
Incorporate Three Enable Inputs to Simplify
Cascading and /or Data Reception
Package Options Include Plastic
Small-Outline (D) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs
SN54ALS138A, SN54AS138 . . . J PACKAGE
SN74ALS138A, SN74AS138 . . . D OR N PACKAGE
(TOP VIEW)
A
B
C
G2A
G2B
G1
Y7
GND
description
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VCC
Y0
Y1
Y2
Y3
Y4
Y5
Y6
B
A
NC
VCC
Y0
SN54ALS138A, SN54AS138 . . . FK PACKAGE
(TOP VIEW)
C
G2A
NC
G2B
G1
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
Y1
Y2
NC
Y3
Y4
Y7
GND
NC
Y6
Y5
The ′ALS138A and ′AS138 are 3-line to 8-line
decoders/demultiplexers designed for highperformance memory-decoding or data-routing
applications requiring very short propagation
delay times. In high-performance systems, these
devices can be used to minimize the effects of
system decoding. When employed with
high-speed memories with a fast enable circuit,
the delay times of the decoder and the enable time
of the memory are usually less than the typical
access time of the memory. The effective system
delay introduced by the Schottky-clamped system
decoder is negligible.
1
The conditions at the binary-select (A, B, and C)
inputs and the three enable (G1, G2A, and G2B)
NC – No internal connection
inputs select one of eight output lines. Two
active-low and one active-high enable inputs
reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented without
external inverters and a 32-line decoder requires only one inverter. An enable input can be used as a data input
for demultiplexing applications.
The SN54ALS138A and SN54AS138 are characterized for operation over the full military temperature range
of – 55°C to 125°C. The SN74ALS138A and SN74AS138 are characterized for operation from 0°C to 70°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  1996, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SN54ALS138A, SN54AS138, SN74ALS138A, SN74AS138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SDAS055E – APRIL 1982 – REVISED JULY 1996
FUNCTION TABLE
INPUTS
ENABLE
OUTPUTS
SELECT
G1
G2A
G2B
C
B
A
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
X
H
X
X
X
X
H
H
H
H
H
H
H
H
X
X
H
X
X
X
H
H
H
H
H
H
H
H
L
X
X
X
X
X
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
H
H
H
H
H
H
H
H
L
L
L
L
H
H
L
H
H
H
H
H
H
H
L
L
L
H
L
H
H
L
H
H
H
H
H
H
L
L
L
H
H
H
H
H
L
H
H
H
H
H
L
L
H
L
L
H
H
H
H
L
H
H
H
H
L
L
H
L
H
H
H
H
H
H
L
H
H
H
L
L
H
H
L
H
H
H
H
H
H
L
H
H
L
L
H
H
H
H
H
H
H
H
H
H
L
logic symbols (alternatives)†
A
B
C
G1
1
2
3
6
4
G2A
G2B
5
BIN/OCT
0
1
2
1
4
2
3
&
4
EN
5
6
7
15
14
13
12
11
10
9
7
Y0
A
Y1
B
Y2
C
1
Y5
Y6
G1
3
6
4
G2A
G2B
5
Y7
POST OFFICE BOX 655303
0
G
7
2
1
2
&
3
4
5
6
7
† These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
2
0
2
Y3
Y4
DMUX
0
• DALLAS, TEXAS 75265
15
14
13
12
11
10
9
7
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
SN54ALS138A, SN54AS138, SN74ALS138A, SN74AS138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SDAS055E – APRIL 1982 – REVISED JULY 1996
logic diagram (positive logic)
15
A
1
14
13
Select
Inputs
B
11
3
10
9
G2A
Enable
Inputs
G1
Y2
Y3
Data
Outputs
Y4
Y5
Y6
4
7
G2B
Y1
2
12
C
Y0
5
Y7
6
Pin numbers shown are for the D, J, and N packages.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
SN54ALS138A, SN54AS138, SN74ALS138A, SN74AS138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SDAS055E – APRIL 1982 – REVISED JULY 1996
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Operating free-air temperature range, TA: SN54ALS138A . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C
SN74ALS138A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54ALS138A
SN74ALS138A
MIN
NOM
MAX
MIN
NOM
MAX
4.5
5
5.5
4.5
5
5.5
UNIT
VCC
VIH
Supply voltage
VIL
IOH
Low-level input voltage
0.7
0.8
High-level output current
– 0.4
– 0.4
mA
IOL
TA
Low-level output current
4
8
mA
70
°C
High-level input voltage
2
Operating free-air temperature
2
– 55
125
V
V
0
V
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
SN54ALS138A
TYP‡
MAX
TEST CONDITIONS
MIN
VCC = 4.5 V,
VCC = 4.5 V,
II = – 18 mA
IOH = – 0.4 mA
VOL
VCC = 4
4.5
5V
IOL = 4 mA
IOL = 8 mA
II
IIH
VCC = 5.5 V,
VCC = 5.5 V,
VI = 7 V
VI = 2.7 V
IIL
IO§
VCC = 5.5 V,
VCC = 5.5 V,
VI = 0.4 V
VO = 2.25 V
SN74ALS138A
TYP‡
MAX
MIN
– 1.5
VCC – 2
– 1.5
VCC – 2
0.25
0.4
V
V
0.25
0.4
0.35
0.5
V
0.1
0.1
mA
20
20
µA
– 0.1
mA
– 112
mA
– 0.1
– 20
UNIT
– 112
– 30
ICC
VCC = 5.5 V
5
10
5
10
mA
‡ All typical values are at VCC = 5 V, TA = 25°C.
§ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
switching characteristics (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A B
A,
B, C
Any Y
tPLH
tPHL
G or G
Any Y
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
RL = 500 Ω,
TA = MIN to MAX¶
SN54ALS138A SN74ALS138A
MIN
MAX
MIN
MAX
2
28
5
22
6
22
6
18
2
22
3
17
4
21
4
17
¶ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
UNIT
ns
ns
SN54ALS138A, SN54AS138, SN74ALS138A, SN74AS138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SDAS055E – APRIL 1982 – REVISED JULY 1996
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Operating free-air temperature range, TA: SN54AS138 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C
SN74AS138 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54AS138
SN74AS138
MIN
NOM
MAX
MIN
NOM
MAX
4.5
5
5.5
4.5
5
5.5
UNIT
VCC
VIH
Supply voltage
VIL
IOH
Low-level input voltage
0.8
0.8
V
High-level output current
–2
–2
mA
IOL
TA
Low-level output current
20
20
mA
70
°C
High-level input voltage
2
Operating free-air temperature
2
– 55
125
V
V
0
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VIK
VOH
VCC = 4.5 V,
VCC = 4.5 V to 5.5 V,
II = – 18 mA
IOH = – 2 mA
VOL
II
VCC = 4.5 V,
VCC = 5.5 V,
IOL = 20 mA
VI = 7 V
IIH
IIL
IO§
VCC = 5.5 V,
VCC = 5.5 V,
VI = 2.7 V
VI = 0.4 V
VCC = 5.5 V,
VCC = 5.5 V
VO = 2.25 V
ICCH
ICCL
SN54AS138
TYP‡
MAX
MIN
SN74AS138
TYP‡
MAX
MIN
– 1.2
VCC – 2
– 1.2
VCC – 2
0.35
– 30
0.5
V
V
0.5
V
0.1
0.1
mA
20
20
µA
– 0.5
– 0.5
mA
– 112
mA
17.5
mA
– 112
12
UNIT
17.5
0.35
– 30
12
VCC = 5.5 V
14
20
14
20
mA
‡ All typical values are at VCC = 5 V, TA = 25°C.
§ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
SN54ALS138A, SN54AS138, SN74ALS138A, SN74AS138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SDAS055E – APRIL 1982 – REVISED JULY 1996
switching characteristics (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A B
A,
B, C
Any Y
tPLH
tPHL
G1
Any Y
tPLH
tPHL
G2
Any Y
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
RL = 500 Ω,
TA = MIN to MAX†
SN54AS138
SN74AS138
MIN
MAX
MIN
2
11
2
10
2
11
2
9.5
2
11.5
2
10
2
11
2
10
2
9
2
7.5
2
10
2
8.5
† For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
6
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
UNIT
MAX
ns
ns
ns
SN54ALS138A, SN54AS138, SN74ALS138A, SN74AS138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SDAS055E – APRIL 1982 – REVISED JULY 1996
PARAMETER MEASUREMENT INFORMATION
SERIES 54ALS/74ALS AND 54AS/74AS DEVICES
7V
RL = R1 = R2
VCC
S1
RL
R1
Test
Point
From Output
Under Test
CL
(see Note A)
From Output
Under Test
RL
Test
Point
From Output
Under Test
CL
(see Note A)
CL
(see Note A)
LOAD CIRCUIT FOR
BI-STATE
TOTEM-POLE OUTPUTS
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
3.5 V
Timing
Input
Test
Point
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
3.5 V
High-Level
Pulse
1.3 V
R2
1.3 V
1.3 V
0.3 V
0.3 V
tsu
Data
Input
tw
th
3.5 V
1.3 V
3.5 V
Low-Level
Pulse
1.3 V
0.3 V
1.3 V
0.3 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATIONS
3.5 V
Output
Control
(low-level
enabling)
1.3 V
1.3 V
0.3 V
tPZL
Waveform 1
S1 Closed
(see Note B)
tPLZ
[3.5 V
1.3 V
tPHZ
tPZH
Waveform 2
S1 Open
(see Note B)
1.3 V
VOL
0.3 V
VOH
1.3 V
0.3 V
[0 V
3.5 V
1.3 V
Input
1.3 V
0.3 V
tPHL
tPLH
VOH
In-Phase
Output
1.3 V
1.3 V
VOL
tPLH
tPHL
VOH
Out-of-Phase
Output
(see Note C)
1.3 V
1.3 V
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. When measuring propagation delay items of 3-state outputs, switch S1 is open.
D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%.
E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
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Copyright © 2007, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
4-Jun-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
5962-86866012A
ACTIVE
LCCC
FK
20
1
TBD
5962-8686601FA
ACTIVE
CFP
W
16
1
TBD
Lead/Ball Finish
MSL Peak Temp (3)
POST-PLATE N / A for Pkg Type
A42
N / A for Pkg Type
JM38510/37701B2A
ACTIVE
LCCC
FK
20
1
TBD
JM38510/37701BEA
ACTIVE
CDIP
J
16
1
TBD
POST-PLATE N / A for Pkg Type
A42 SNPB
N / A for Pkg Type
SN54ALS138AJ
ACTIVE
CDIP
J
16
1
TBD
A42 SNPB
N / A for Pkg Type
N / A for Pkg Type
SN54AS138J
ACTIVE
CDIP
J
16
1
TBD
A42 SNPB
SN74ALS138AD
ACTIVE
SOIC
D
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ALS138ADE4
ACTIVE
SOIC
D
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ALS138ADG4
ACTIVE
SOIC
D
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ALS138ADR
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ALS138ADRE4
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ALS138ADRG4
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ALS138AN
ACTIVE
PDIP
N
16
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN74ALS138ANE4
ACTIVE
PDIP
N
16
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN74ALS138ANSR
ACTIVE
SO
NS
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ALS138ANSRE4
ACTIVE
SO
NS
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ALS138ANSRG4
ACTIVE
SO
NS
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AS138D
ACTIVE
SOIC
D
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AS138DE4
ACTIVE
SOIC
D
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AS138DG4
ACTIVE
SOIC
D
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AS138DR
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AS138DRE4
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AS138DRG4
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AS138N
ACTIVE
PDIP
N
16
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN74AS138N3
OBSOLETE
PDIP
N
16
TBD
Call TI
SN74AS138NE4
ACTIVE
PDIP
N
16
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN74AS138NSR
ACTIVE
SO
NS
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AS138NSRE4
ACTIVE
SO
NS
16
2000 Green (RoHS &
CU NIPDAU
Level-1-260C-UNLIM
25
25
Addendum-Page 1
Call TI
PACKAGE OPTION ADDENDUM
www.ti.com
4-Jun-2007
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
SN74AS138NSRG4
ACTIVE
SO
NS
16
SNJ54ALS138AFK
ACTIVE
LCCC
FK
20
1
TBD
SNJ54ALS138AJ
ACTIVE
CDIP
J
16
1
TBD
A42 SNPB
N / A for Pkg Type
SNJ54ALS138AW
ACTIVE
CFP
W
16
1
TBD
A42
N / A for Pkg Type
SNJ54AS138FK
ACTIVE
LCCC
FK
20
1
TBD
SNJ54AS138J
ACTIVE
CDIP
J
16
1
TBD
Lead/Ball Finish
MSL Peak Temp (3)
no Sb/Br)
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
POST-PLATE N / A for Pkg Type
POST-PLATE N / A for Pkg Type
A42 SNPB
N / A for Pkg Type
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
22-Sep-2007
TAPE AND REEL BOX INFORMATION
Device
Package Pins
Site
Reel
Diameter
(mm)
Reel
Width
(mm)
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
W
Pin1
(mm) Quadrant
SN74ALS138ADR
D
16
SITE 27
330
16
6.5
10.3
2.1
8
16
Q1
SN74ALS138ANSR
NS
16
SITE 41
330
16
8.2
10.5
2.5
12
16
Q1
SN74AS138DR
D
16
SITE 27
330
16
6.5
10.3
2.1
8
16
Q1
SN74AS138NSR
NS
16
SITE 41
330
16
8.2
10.5
2.5
12
16
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
Device
22-Sep-2007
Package
Pins
Site
Length (mm)
Width (mm)
Height (mm)
SN74ALS138ADR
D
16
SITE 27
342.9
336.6
0.0
SN74ALS138ANSR
NS
16
SITE 41
346.0
346.0
0.0
SN74AS138DR
D
16
SITE 27
342.9
336.6
0.0
SN74AS138NSR
NS
16
SITE 41
346.0
346.0
0.0
Pack Materials-Page 2
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
18
17
16
15
14
13
NO. OF
TERMINALS
**
12
19
11
20
10
A
B
MIN
MAX
MIN
MAX
20
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
28
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
9
22
8
44
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
23
7
52
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
24
6
68
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
84
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
B SQ
A SQ
25
5
26
27
28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140 / D 10/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a metal lid.
The terminals are gold plated.
Falls within JEDEC MS-004
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