UTC M62364 CMOS IC 8-BIT 8-CH MULTIPLYING D-A CONVERTER WITH BUFFER AMPLIFIERS GENERAL DESCRIPTION SSOP-24 (209mil) The UTC M62364 is a CMOS 8-bit, 8-ch D/A converter having a multiplying function and output buffer amplifiers. It has a serial data input and can easily communicate with a microcontroller by the simple three-wiring method (DI,CLK,LD). The output buffer amplifiers operating in AB-class has both sinking and driving capabilities of 1.0mA or more and can operate in a whole supply range from VDD to GND. The IC is suitable for a use in automatic adjustment applications in conjunction with a MCU by utilizing the terminal Do for a cascading connection. SOP-24 FEATURES *Three-wiring serial data transmission *Doubled precision 8-ch D/A converter employing an R-2R with higher-order segment method *8 buffer amplifiers operating in a whole supply voltage range from VDD to GND *4-quadrant multiplication APPLICATION Digital to analog conversion for consumer and industrial equipment. Gain setting and automatic adjustment of display-monitor and CTV. PIN CONFIGURATION (TOP VIEW) 1 24 2 23 3 22 4 21 LD CLK DI VIN3 6 VOUT3 VOUT4 VIN4 10 15 11 14 12 13 5 7 8 9 M62364 UTC VIN1 VOUT1 VOUT2 VIN2 VDD 20 19 18 17 16 VIN8 VOUT8 VOUT7 VIN7 GND RESET VDAref Do VIN6 VOUT6 VOUT5 VIN5 UNISONIC TECHNOLOGIES CO., LTD. 1 QW-R502-008,A UTC M62364 CMOS IC BLOCK DIAGRAM VDD 5 DI CLK 12-bit SHIFT 12-bi t REGISTER SHI FT REGI STER 8 D0 D0 7 D1 D1 D2 D3 D3 D4 D 4 D5 D 5 D6 D6 D7 D 7 D8 D8 D9 D9 D10 D10 17 DO 6 LD DD11 11 ADDRESS DECODER RESET 8-bit Latch 8-bit Latch D-A CONVERTER D-A CONVERTER 19 18 VDAref - UTC + - + 1 2 24 23 20 VIN1 VOUT1 VIN8 VOUT8 GND UNISONIC TECHNOLOGIES CO., LTD. 2 QW-R502-008,A UTC M62364 CMOS IC EXPLANATION OF TERMINALS P IN N o. S ym bol 8 DI 17 Do 7 CLK 6 LD 19 R ESET 2 V O UT 1 3 V O UT 2 10 V O UT 3 11 V O UT 4 14 V O UT 5 15 V O UT 6 22 V O UT 7 Function S erial d ata in p u t Serial data outp u t S h ift clo ck in p u t. In p u t d ata o f D I are taken in to th e 12-b it sh ift reg ister o n a risin g ed g e o f th e clo ck A lo w state en ab les d ata lo ad in g to th e 12-b it sh ift reg ister. Du rin g a risin g ed g e o f L D, th e d ata w ill b e lo ad ed to th e o u tp u t reg ister Reset 8-b it latch es D/A Co n verter O u tp u t w ith 8-b it reso lu tio n 23 23 V O UT 8 55 V DD P o w er S u p p ly 20 20 GND G ro u n d 11 V IN 1 44 V IN 2 99 V IN 3 12 12 V IN 4 13 13 V IN 5 16 16 V IN 6 21 21 V IN 7 24 24 V IN 8 18 18 VD Aref UTC D/A Converter In put D/A Converter Reference Vo ltag e Input UNISONIC TECHNOLOGIES CO., LTD. 3 QW-R502-008,A UTC M62364 CMOS IC DIGITAL FORMAT *12BIT SERIAL DATA DAT A 1 2 3 4 5 6 7 8 9 D11 D10 D9 D8 D7 D6 D5 D4 D3 D5 D6 D7 10 D2 11 (LSB) 12 D1 D0 CLK *DATA ASSIGNMENT D0 D1 D2 D3 D4 (LSB) :DAC DATA (MSB) D8 D9 D10 D11 :DAC SELECT DATA Dac Select Data D8 0 0 0 D9 0 0 0 D10 0 0 1 D11 0 1 0 0 0 0 0 0 1 1 1 1 1 1 1 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 VOUT3 Selection VOUT4 Selection VOUT5 Selection VOUT6 Selection VOUT7 Selection VOUT8 Selection Don't Care Don't Care Don't Care Don't Care Don't Care Don't Care 1 1 1 1 Don't Care UTC Dac Selection Don't Care VOUT1 Selection VOUT2 Selection UNISONIC TECHNOLOGIES CO., LTD. 4 QW-R502-008,A UTC M62364 CMOS IC *Digital Data Format D0 D1 D2 D3 D4 D5 D6 D7 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 1 0 0 0 0 0 0 1 1 1 1 1 1 1 1 DAC OUTPUT VDAref ININ -VDAref)/256℅1+VDAref V(V -VDAref)/256×1+VDAref V(V ININ -VDAref)/256℅2+VDAref -VDAref )/256×2+VDAref ININ -VDAref)/256℅3+VDAref V(V -VDAref )/256×3+VDAref ININ -VDAref)/256℅255+VDAref V(V -VDAref)/256×255+VDAref TIMING CHART R MSB DI D11 LSB D10 D9 D0 CLK LD Vo *Input datadata carried signalLow Low besides positive *Input carriedout outLD LD signal besides CLKCLK signalsignal positive edge. edge. CLK,LD is keep HIGH level.level. CLK,LD keepgenerally generally HIGH UTC UNISONIC TECHNOLOGIES CO., LTD. 5 QW-R502-008,A UTC M62364 CMOS IC ABSOLUTE MAXIMUM RATING VALUE UNIT Supply Voltage PARAMETER SYMBOL VDD MEASUREMENT CONDITION -0.3 ~ +7.0 V Digital Input Voltage VIND -0.3 ~ +7.0 V Analog Input Voltage VIN -0.3 ~ VDD+0.3 V V Analog Output Voltage VOUT -0.3 ~ VDD+0.3 D-A Reference Voltage VDAref -0.3 ~ VDD+0.3 V Operating Temperature Topr -20 ~ +75 °C Storage Temperature Tstg -40 ~ +125 °C ELECTRICAL CHARACTERISTICS ＜Ana/Dig Common Part＞（VDD=5V±10%，VDD≥ VIN,GND,VDAref=0V,Ta=-20~85°C unless otherwise noted） PARAMETER SYMBOL Supply Voltage Supply Current MEASUREMENT CONDUCTION MIN 2.7 VDD IDD LIMIT TYP 3.0 CLK=1MHz,Vcc=3V,IAO=0μ A UNIT MAX 3.6 3.5 V mA ＜Digital Part＞（VDD=5V±10%，VDD≥ VIN,GND,VDAref=0V,Ta=-20~85°C unless otherwise noted） PARAMETER SYMBOL Input Leak Current IILK Digital Input “Low” Voltage Digital Input “High” Voltage Do Terminal Output “Low” Voltage Do Terminal Output “High” Voltage IIL IIH VOL VOH TEST CONDUCTION MIN -10 VIN=0 ~VDD LIMIT TYP UNIT MAX 10 0.2 VDD 0.8VDD IOL=2.5mA IOH=-400μ A 0.4 VDD-0.4 μ A V V V V ＜Analog Part＞（VDD=5V±10%，VDD≥ VIN,GND,VDAref=0V,Ta=-20~85°C unless otherwise noted） PARAMETER SYMBOL TEST CONDUCTION MIN Input Current IIN D-A Reference Input Current IDAref Resolution Differential Nonlinearity Nonlinearity Buffer Amplifier Output Voltage Range RES DNL NL VAO Buffer Amplifier Output Current Range IAO UTC VIN=3V,VDAref=0V, *Proportional to max. input current condition(VIN-VDAref) and digital data of each channels. VIN=3V,VDAref=0V, *Proportional to max. input current condition(VIN-VDAref) and digital data of each channels VDD=2.61V,VDAref=0.050V (10mV/1LSB) Without Load(IAO=±0) LIMIT TYP UNIT MAX 0.18 -1.44 mA mA 8 IAO=±100μ A -1 -1.5 0.1 1 1.5 Vcc-0.1 IAO=±500μ A 0.2 Vcc-0.2 Upper Saturation Voltage=0.4V Lower Saturation Voltage=0.4V -1 1 bit LSB LSB V mA UNISONIC TECHNOLOGIES CO., LTD. 6 QW-R502-008,A UTC M62364 CMOS IC PARAMETER SYMBOL TEST CONDUCTION MIN utput Capacitative Load Co Buffer Amplifier Output Impedance Ro LIMIT TYP UNIT MAX 0.1 μ F Ω 5 ＜AC Characteristics＞（VDD=5V±10%，VDD≥ VIN,GND,VDAref=0V,Ta=-20~85°C unless otherwise noted） PARAMETER SYMBOL Clock “L” Pulse Width Clock “H” Pulse Width Clock Rise Time Clock Fall Time Data Set Up Time Data Hold Time tCKL tCKH tCR tCF tDCH tCHD LD Set Up Time LD Hold Time LD “H” Pulse Duration Time Data Output Delay Time D-A Output Setting Time tCHL tLDC tLDH tDo tLDD TEST CONDUCTION MIN 200 200 LIMIT TYP UNIT MAX 200 CL=100pF CL≤ 100pF,VAO:0.1＜=＞2.6V ns ns ns 60 100 ns ns 200 100 100 70 ns ns ns ns 350 300 This Time Until The Output Becomes The final Value Of 1/2 LSB μ s TIMING CHART tCR tCKH tCF CLK tCKL DI tLDC tLDH tDCH tCHD tCHL LD tLDD D-A OUTPUT tDo Do OUTPUT UTC UNISONIC TECHNOLOGIES CO., LTD. 7 QW-R502-008,A UTC M62364 CMOS IC UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. UTC UNISONIC TECHNOLOGIES CO., LTD. 8 QW-R502-008,A