UNISONIC TECHNOLOGIES CO., LTD U74HC14 CMOS IC HIGH-SPEED CMOS LOGIC HEX INVERTING SCHMITT TRIGGER SOP-14 DESCRIPTION The UTC U74HC14 each contain six inverting Schmitt triggers in one package. Each of them perform the Boolean function Y=A. FEATURES DIP-14 * Widely range of input rise and fall time * high noise immunity * Fan-out parameters(over temperature range) up to 10 LSTTL Loads * Low power consumption * Wide range operation 2V ~ 6V *Pb-free plating product number: U74HC14L ORDERING INFORMATION Order Number Normal Lead Free Plating U74HC14-D14-T U74HC14L-D14-T U74HC14-S14-R U74HC14L-S14-R U74HC14-S14-T U74HC14L-S14-T Package Packing DIP-14 SOP-14 SOP-14 Tube Tape Reel Tube U74HC14L-D14-T (1)Packing Type (2)Package Type (3)Lead Plating www.unisonic.com.tw Copyright © 2005 Unisonic Technologies Co., Ltd (1) R: Tape Reel, T: Tube (2) D14: DIP-14, S14: SOP-14 (3) L: Lead Free Plating, Blank: Pb/Sn 1 of 6 QW-R502-071,A U74HC14 CMOS IC PIN CONFIGURATION 1A 1 14 VCC 1Y 2 13 6A 2A 3 12 6Y 2Y 4 11 5A 3A 5 10 5Y 3Y 6 9 4A GND 7 8 4Y FUNCTIONAL DIAGRAM VCC 6A 6Y 14 13 12 5A 5Y 11 10 4A 4Y 9 1 2 3 4 1A 1Y 2A 2Y 3A 5 8 6 7 3Y GND TRUTH TABLE INPUT(A) L H H=High level L=Low Level OUTPUT(Y) H L UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 2 of 6 QW-R502-071,A U74HC14 CMOS IC LOGIC DIAGRAM A Y VOUT VH VCC GND VIL VIH VIH VIN VIL VCC VIN VH GND VCC VOUT GND Figure 1. Hysteresis Definition, Characteristic, And Test Setup UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 3 of 6 QW-R502-071,A U74HC14 CMOS IC ABSOLUTE MAXIMUM RATING PARAMETER SYMBOL RATINGS UNIT DC Supply Voltage VCC -0.5V~9V V DC Input Clamp Current For VIN < -0.5V or VIN > VCC + 0.5V IIK ±20mA mA DC Output Clamp Current For VOUT < -0.5V or VOUT > VCC + 0.5V IOK ±20mA mA DC Drain Current, per Output For -0.5V < VOUT < VCC +0.5V IOUT ±25mA mA DC Output Source or Sink Current Per For VOUT> -0.5V or VOUT < VCC + 0.5V IOUT ±25mA mA Output Pin DC VCC or Ground Current ICC ±50mA mA Operating Conditions Supply Voltage Range HC Types VCC 0V~VCC V DC Input or Output Voltage VIN, VOUT 0V~VCC V Operating Temperature TA -40~ +85℃ V Storage Temperature TSTG -65 ~ +150 ℃ Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. THERMAL DATA PARAMETER Thermal Resistance Junction Ambient SYMBOL θJA RATINGS 86 UNIT ℃/W ELECTRICAL CHARACTERISTICS (TA = 25℃) PARAMETER SYMBOL TEST CONDITIONS MIN TYP VCC=2V 0.7 1.2 VIH VCC=4.5V 1.55 2.5 VCC=6V 2.1 3.3 Input Switch Points VCC=2V 0.3 0.6 VIL VCC=4.5V 0.9 1.6 VCC=6V 1.2 2 VIN=VIH or VIL, VCC=2V, IOUT=-0.02mA 1.9 High Level Output Voltage CMOS VIN=VIH or VIL, VCC=4.5V, IOUT=-0.02mA 4.4 Loads VIN=VIH or VIL, VCC=6V, IOUT=-0.02mA 5.9 VOH VIN=VIH or VIL, VCC=4.5V, IOUT=-4 mA 3.98 High Level Output Voltage TTL Loads 5.48 VIN=VIH or VIL, VCC=6V, IOUT=-5.2 mA VIN=VIH or VIL, VCC=2V, IOUT=0.02 mA Low Level Output Voltage CMOS VIN=VIH or VIL, VCC=4.5V, IOUT=0.02 mA Loads VOL VIN=VIH or VIL, VCC=6V, IOUT=0.02 mA Low Level Output Voltage TTL VIN=VIH or VIL, VCC=4.5V, IOUT=4 mA Loads VIN=VIH or VIL, VCC=6V, IOUT=5.2 mA Input Leakage Current IIN VIN=VCC and GND, VCC=6V Quiescent Device Current ICC VIN=VCC or GND, VCC=6V, IOUT=0 Note 1. For dual-supply systems theoretical worst case (VIN = 2.4V, VCC = 5.5V) specification is 1.8mA. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw MAX UNIT 1.5 V 3.15 V 4.2 V 1 V 2.45 V 3.2 V V V V V V 0.1 V 0.1 V 0.1 V 0.26 V 0.26 V ±0.1 µA 2 µA 4 of 6 QW-R502-071,A U74HC14 CMOS IC SWITCHING SPECIFICATIONS (TA = 25℃, Input tR, tF = 6ns) PARAMETER SYMBOL Propagation Delay, A to Y tPLH, tPHL Output Transition Times tTLH, tTHL TEST CONDITIONS VCC=2V, CL=50pF VCC=4.5V, CL=50pF VCC=6V, CL=50pF VCC=2V, CL=50pF VCC=4.5V, CL=50pF VCC=6V, CL=50pF VCC 2 4.5 6 2 4.5 6 MIN TYP MAX 40 24 22 19 16 15 10 UNIT ns ns ns ns ns ns pF Input Capacitance CIN Power Dissipation Capacitance CPD VCC=5V, 5 20 pF (Notes 2, 3) Note 2. CPD is used to determine the dynamic power consumption, per inverter. 3. PD = VCC 2 fi (CPD + CL) where fi = input frequency, CL = output load capacitance, VCC = supply voltage. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 5 of 6 QW-R502-071,A U74HC14 CMOS IC TEST CIRCUITS AND WAVEFORMS t R=6ns tF=6ns 90% 50% 10% INPUT tTLH tTHL 90 % 50% 10% INVERTING OUTPUT tPHL t PLH Figure 2. U74HC14 Transition Times And Propagation Delay Times, Combination Logic UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 6 of 6 QW-R502-071,A