UTC X3211 LINEAR INTEGRATED CIRCUIT FET BIAS CONTROLLER WITH POLARISATION SWITCH AND TONE DETECTION DESCRIPTION The UTC X3211 is designed to meet the bias requirements of GaAs and HEMT FETs commonly used in satellite receiver LNBs, PMR, cellular telephones etc. with a minimum of external components. SSOP20(150mil) FEATURES * Provides bias for GaAs and HEMT FETs * Drives up to three FETs * Dynamic FET protection * Drain current set by external resistor * Polarisation switch for LNBs –supporting zero volt gate switching topology. * 22kHz tone detection for band switching APPLICATIONS *Satellite receiver LNBs * Private mobile radio (PMR) * Cellular telephones PIN CONFIGURATION UTC G1 1 20 VCC D1 G2 2 19 3 18 D2 4 17 RCAL VPOL FIN G3 D3 G ND CNB1 5 16 N/ C 6 15 7 14 8 13 FOUT LOV HB CNB2 9 12 N/ C 10 11 LB CS UB UNISONIC TECHNOLOGIES CO., LTD. 1 QW-R122-004,C UTC X3211 LINEAR INTEGRATED CIRCUIT ABSOLUTE MAXIMUM RATINGS PARAMETER Supply Voltage Supply Current Drain Current (per FET) (set by RCAL ) Input Voltage (VPOL) Operating Temperature Storage Temperature Power Disspation(Ta=25°C) SYMBOL VALUE Vcc ICC ID VIN Topr TStg PD -0.6~12 100 0~15 25 continuous -40~70 -50~85 500 UNIT V mA mA V °C °C mW ELECTRICAL CHARACTERISTICS (Ta = 25 °C,Vcc=5V,ID=10mA, RCAL =33kΩUnless otherwise specified) PARAMETER SYMBOL Supply Voltage Vcc Supply Current ICC Substrate Voltage VSUB Output Noise Drain Voltage Gate Voltage Oscillator Freq END ENG fO TEST CONDITIONS MIN TYP 5 ID1 to ID3=0 ID1 =0, ID2 to ID3=10mA,VPOL=14V ID2=0, ID1 to ID3=10mA,VPOL=15.5V ID1 to ID3=0,ILB=10mA ID1 to ID3=0,IHB=10mA (Internally generated) ISUB =0 ISUB = -200µA -3.5 6 25 25 16 16 -3 CG=4.7nF,CD=10nF CG=4.7nF,CD=10nF MAX UNIT 10 V 15 35 35 25 25 -2.5 -2.4 mA mA mA mA mA V V Vpkpk Vpkpk kHz 200 350 0.02 0.005 800 MIN TYP MAX UNIT 2000 µA GATE CHARACTERISTICS PARAMETER Output Current Range Output Voltage Gate 1 Off Low High Output Voltage Gate 2 Off Low High Output Voltage Gate 3 Low High UTC SYMBOL TEST CONDITIONS IGO -30 VG1O VG1L VG1H ID1=0mA, VPOL=14V, IGO1=0µA ID1=12mA, VPOL=15.5V, IGO1=-10µA ID1=8mA, VPOL=15.5V, IGO1=0µA -0.05 -2.7 0.4 0 -2.4 0.75 0.05 -2 1.0 VG2O VG2L VG2H ID2=0mA, VPOL=15.5V, IGO2=0µA ID2=12mA, VPOL=14V, IGO2=-10µA ID2=8mA, VPOL=14V, IGO2=0µA -0.05 -2.7 0.4 0 -2.4 0.75 0.05 -2 1.0 VG3L VG3H ID3=12mA, IGO3=-10µA ID3=8mA, IGO3=0µA -3.5 0.4 -2.9 0.75 -2 1.0 UNISONIC TECHNOLOGIES CO., LTD. V V V 2 QW-R122-004,C UTC X3211 LINEAR INTEGRATED CIRCUIT DRAIN CHARACTERISTICS PARAMETER Current SYMBOL TEST CONDITIONS ID Current Change With Vcc With Tj Drain 1 Change : High Drain 2 Change : High Drain 3 Change : High Voltage Change With Vcc With Tj Leakage Current Drain 1 Drain 2 ΔIDV ΔIDT VD1 VD2 VD3 ΔVDV ΔVDT IL1 IL2 Vcc=5 to12V Tj= -40 to +70°C ID1 =10mA VPOL=15.5V ID2 =10mA VPOL=14V ID3 =10mA MIN TYP MAX UNIT 8 10 12 mA 1.8 1.8 1.8 0.5 0.05 2.0 2.0 2.0 2.2 2.2 2.2 %/V %/°C V V V Vcc=5 to10V Tj= -40 to +70°C 0.5 50 VD1=0.5V, VPOL=14V VD2=0.5V, VPOL=15.5V %/V ppm 10 10 µA UNIT TONE DETECTION CHARACTERISTICS PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX 0.02 1.75 400 0.07 1.95 520 46 7.5 0.25 2.05 650 µA Filter Amplifier Input Bias Current Output Voltage 5 Output Current 5 Voltage Gain Rejection Frequency V Threshold 5 Output Stage Lov Volt.Range Lov Bias Current LB Output Low IB VOUT IOUT Gv fR FVT VLOV ILOV VLBL LB Output High VLBH HB Output Low VHBL HB Output High VHBH RF1=150kΩ RF1=150kΩ VOUT=1.96V, VFIN=2.1V f=22kHz, VIN=1mV V(AC)IN=1V p/p sq.w6 IL=50mA(LB or HB) VLOV=0 VLOV=0, IL= -10µA, Enable 6 VLOV=3V, IL=0, Enable 7 VLOV=0, IL=10 mA, Disable 6 VLOV=3V, IL=50mA, Disable 7 VLOV=0, IL= -10μA, Disable 6 VLOV=3V, IL=0, Disable 7 VLOV=0, IL=10mA, Enable 6 VLOV=3V, IL=50mA, Enable 7 1.0 100 350 V µA dB kHz mV p/p -0.5 0.02 -3.5 -0.01 -0.025 2.9 -3.5 -0.01 -0.025 2.9 0.15 -2.75 0 0 3.0 -2.75 0 0 3.0 Vcc-1.8 1.0 -2.5 0.01 0.025 3.1 -2.5 0.01 0.025 3.1 V µA V V V V V V V V TYP MAX UNIT POLY SWITCH CHARACTERISTICS PARAMETER Input Current Threshold Voltage Switching Speed UTC SYMBOL TEST CONDITIONS MIN IPOL VPOL=25V (Applied via RPOL=10kΩ) 10 20 40 µA VTPOL TSPOL VPOL=25V (Applied via RPOL=10kΩ) VPOL=25V (Applied via RPOL=10kΩ) 14 14.75 15.5 100 V ms UNISONIC TECHNOLOGIES CO., LTD. 3 QW-R122-004,C UTC X3211 LINEAR INTEGRATED CIRCUIT NOTES: 1. The negative bias voltages specified are generated on-chip using an internal oscillator. Two external capacitors, 2. The characteristics are measured using an external reference resistors RCAL of value 33kΩ wired from pins 3. Noise voltage is not measured in production. 4. Noise voltage measurement is made with FETs and gate drain capacitors in place on all outputs. CG,4.7nF,are 5. These parameters are linearly related to Vcc 6. These parameters are measured using Test Circuit 1 7. These parameters are measured using Test Circuit 2 CNB and CsuB of 47nFare required for this purpose. RCAL to ground. connected between gate outputs and ground,CD,10nF,are connected between drain outputs and ground. TEST CIRCUIT 1 Vcc + - R2 VPOL V1 5V DC FIN GND CNB1 R3 150K Lov FOUT RCAL CF1 470pF 10K CF2 68pF V2 + - CNB2 CSUB CNB 47nF CSUB 47nF RCAL 33K V2 Type Frequency Voltage UTC Characteristics AC source 22kHz 350mV p/p enabled 100mV p/P disabled UNISONIC TECHNOLOGIES CO., LTD. 4 QW-R122-004,C UTC X3211 LINEAR INTEGRATED CIRCUIT TEST CIRCUIT 2 R5 2.0K Vcc + - VPOL V1 5V DC FIN GND CNB1 R3 150K Lov FOUT RCAL R2 CF1 470pF 10K CF2 68pF V2 + - CNB2 CSUB CNB 47nF CSUB 47nF RCAL 33K V2 Type Frequency Voltage Characteristics AC source 22kHz 350mV p/p enabled 100mV p/P disabled TYPICAL CHARACTERISTICS Vsub v External Load JFET Drain Current v Rcal Note :Operation with load>200μA is not guranteed. 16 Vcc =5V -0.0 -0.5 12 10 Vsub (V) Drain Current (mA) 14 8 -1.0 -1.5 6 -2.0 4 -2.5 2 -3.0 0 0 20 40 60 Rcal (k) UTC 80 100 Vcc =5V Vcc =6V Vcc =8V 0 0.2 Vcc =10V 0.4 0.6 0.8 External Vsub Load (mA) 1.0 UNISONIC TECHNOLOGIES CO., LTD. 5 QW-R122-004,C UTC X3211 LINEAR INTEGRATED CIRCUIT JFET Drain Voltage v Drain Current Open Loop Gain v Frequency 70 2.2 Vcc =5V Open Loop Gain (dB) Drain Voltage (V) 60 2.1 Vcc =5V 2.0 Vcc =6V Vcc =8V 1.9 Vcc =10V 50 40 30 20 10 0 1.8 2 4 6 8 10 14 12 100 16 LB/HB Offset Voltage v Load Current 0 -2 Tamb= -40℃ -6 Tamb=25℃ -8 0 10 20 30 40 10M Vcc =5V Tamb=70℃ -4 1M 180 Open Loop Phase(o) LB/HB Offset Voltage (mV) 2 10k 100k Frequency (Hz) Open Loop Phase v Frequency Vcc =5V VLOV=0V 4 1k 150 120 90 60 30 0 50 100 1k 10k 100k Frequency (Hz) Load Current (mA) 1M 10M LB/HB Dropout Voltage v Load Current Filter Response 2.0 1.8 Fout Voltage (Vpkpk) LB/HB Dropout Voltage (V) 1.4 Vcc =5V 1.9 Tamb= -40℃ 1.7 1.6 Tamb=25℃ 1.5 Tamb=70℃ 1.4 1.0 0.8 0.6 0.4 0.2 1.3 1.2 1.2 0 10 UTC 20 30 Load Current (mA) 40 50 0 100 1k 10k 100k Frequency (Hz) 1M UNISONIC TECHNOLOGIES CO., LTD. 6 QW-R122-004,C UTC X3211 LINEAR INTEGRATED CIRCUIT FUNCTIONAL DIAGRAM - Vcc + ID Sense DN VD Set + - ON GN + + I D Set RCAL RCAL SetS ID 20μA CSUB Negative Supply Gen. GND CSUB CNB1 CNB2 CNB FUNCTIONAL DESCRIPTION The X3211 provides all the bias requirements for external FETs, including the generation of the negative supply required for gate biasing, from the single supply voltage. It contains 3 such stages. The negative rail generator is common to all devices. The drain voltage of the external FET QN is set by the X3211 device to its normal operating voltage. This is determined by the on board VD Set reference, the X3211 provides nominally 2 volts . The drain current taken by the FET is monitored by the low value resistor ID Sense. The amplifier driving the gate of the FET adjusts the gate voltage of QN so that the drain current taken matches the current called for by an external resistor RCAL. Since the FET is a depletion mode transistor, it is usually necessary to drive its gate negative with respect to ground to obtain the required drain current. To provide this capability powered from a single positive supply, the device includes a low current negative supply generator. This generator uses an internal oscillator and two external capacitors, CNB and CSUB. The following schematic shows the function of the Vpol input. Only one of the two external FETs numberd Q1 and Q2 are powered at any one time, their selection is controlled by the input Vpol. This input is designed to be wired to UTC UNISONIC TECHNOLOGIES CO., LTD. 7 QW-R122-004,C UTC X3211 LINEAR INTEGRATED CIRCUIT the power input of the LNB via a high value (10k) resistor. With th input voltage of the LNB set at or below 14V.FET Q2 will be enabled. With the input voltage at or above 15.5V,FET Q1 will be enabled.The disabled FET has its gate driven to 0V and its drain terminal is switched open circuit.FET number Q3 is always active regardless of the voltage applied to Vpol. D1 Q1 G1 Drain voltage& Current Controller VPOL Input - Enable + 14.75V Reference 20μA VSUB D2 Q2 G2 Drain voltage& Current Controller Enable 20μA VSUB D3 Q3 G3 Drain voltage& Current Controller Enable 20μA VSUB Control input switch function INPUT SENSE <= <= ≤14 volts ≥15.5 volts POLARISATION SELECT Vertical Horizontal FET Q2 FET Q1 For many LNB application tone detection and band switching is required.The X3211 includes the circuitry necessary to detect the presence of a 22kHz tone modulated on the supply input to the LNB.Referrring to the following schematic diagram,the main elements of this detector are an op-amp enabling the construction of a Sallen key filter,a rectifier/smoother and a comparator.Full control is given over the center frequency and bandwidth of the filter UTC UNISONIC TECHNOLOGIES CO., LTD. 8 QW-R122-004,C UTC X3211 LINEAR INTEGRATED CIRCUIT by the selection of two external resistors and capacitors (one of these resistors,R2, shares the functionof overvoltge protection of pin Vpol ). LOV Input + LB Output Enable VSUB CF2 68pF LNB input R2 10k CF1 FILTER DETECTOR COMPARATOR FOUT + Enable R3 150k D1 + FIN 470pF HB Output + C1 VSUB REF2 REF1 OUTPUT DRIVERS APPLICATION CIRCUIT *L1 C2 Q1 *C2 10nF *L2 *C3 GN CG 4.7nF Vcc HB VPOL FIN DN *Stripline Elements LB LOV FOUT GND CNB1 RCAL CNB2 CSUB CNB 47nF UTC CSUB 47nF RCAL 33K UNISONIC TECHNOLOGIES CO., LTD. 9 QW-R122-004,C UTC X3211 LINEAR INTEGRATED CIRCUIT APPLICATIONS INFORMATION The device is a partial application circuit for the X3211 showing all external components required for appropriate biasing. The bias circuits are unconditionally stable over the full temperature range with the associated FETs and gate drain capacitors in circuit. Capacitors CD and CG ensure that residual power supply and substrate generator noise is not allowed to affect other external circuits which may be sensitive to RF interference. They also serve to suppress any potential RF feedthrough between stages via the X3211. These capacitor are required for all stages used Values of 10nF and 4.7nF respectively are recommended however this is design dependent and any value between 1nFand 100nF could be used. The capacitors CNB and CSUB are an integral part of the X3211 negative supply generator. The negative bias voltage is generated on-chip using an internal oscillator. The required value of capacitors CNB and CsuB is 47nF. This generator produces a low current supply of approximately –3 volts. Although this generator is intended purely to bias the external FETs, it can be used to power other external circuits via the CsUB pin. Resistors RcAL sets the drain current at which all external FETs are operated. If any bias control circuit is not required, its related drain and gate connections may be left open circuit without affecting the operation of the remaining bias circuits. The X3211 has been designed to protect the external FETs from adverse operating conditions. With a JFET connected to any bias circuit, the gate output voltage of the bias circuit can not exceed the range –3.5V to 1V,under any conditions including power up and powerdown transients. Should the negative bias generator be shorted or overloaded so that the drain current of the external FETs can no longer be controlled, the drain supply to FETs is shut down to avoid damage to the FETs by excessive drain current. Tone detection and band switching is provided on the X3211. The following diagrams describes how this feature operates in an LNB and the external components required. The presence or absence of a 22kHz tone applied to pin FIN enables one of two outputs, LB and HB.A tone present enables HB and tone absent enables LB. The LB and HB outputs are designed to be compatible with both MMIC and discrete local oscillator applications, selected by pin LOV. Referring to Figure 1 wiring pin LOV to ground will force LB and HB to switch between –2.6V (disabled) and 0V (enabled).Referring to Figure 2 wiring pin LOV to a positive voltage source (e.g. a potential divider across Vcc and ground set to the required oscillator supply,Vosc when enabled. Tone Detection Function LOV GND GND FIN LB HB LB 22kHz 22kHz - HB Disabled Enabled -2.6 volts GND Enabled Disabled Enabled Disabled Enabled Disabled GND Note 1 Vosc -2.6 volts Vosc Note 1 Note 1: 0 volts in typical LNB applications but dependent on external circuits. UTC UNISONIC TECHNOLOGIES CO., LTD. 10 QW-R122-004,C UTC X3211 LINEAR INTEGRATED CIRCUIT APPLICATIONS INFORMATION (cont) Vcc R2 LNB Downfeed CF1 X3211 1 G1 D1 G2 D2 G3 D3 GND CNB1 CNB2 N/C CNB 47nF Vcc RCAL VPOL FIN N/C FOUT LOV HB LB CSUB 470pF R3 150k R1 33k 10k CF2 68pF Vcc R4 G2 Local CHB Osc. 100nF G1 MMIC 10 R5 CUB 47nF 10 CLB 100nF Figure 1 Lov grounded Vcc R2 CF1 1 CNB 47nF X3211 G1 D1 G2 D2 G3 D3 GND CNB1 CNB2 N/C Vcc RCAL VPOL FIN N/C FOUT LOV HB LB CSUB 10k 470pF R3 150k R1 33k LNB Downfeed CF2 68pF 10.6GHz Local Osc R4 10 R5 9.75GHz Local Osc CUB 47nF R7 3k 10 R9 R8 CHB 100nF CLB 100nF Figure 2 Lov connected to Vosc UTC UNISONIC TECHNOLOGIES CO., LTD. 11 QW-R122-004,C UTC X3211 LINEAR INTEGRATED CIRCUIT UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. UTC UNISONIC TECHNOLOGIES CO., LTD. 12 QW-R122-004,C