TI BQ20Z80DBTR-V102

bq20z80-V102
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SLUS681A – NOVEMBER 2005 – REVISED MARCH 2006
SBS 1.1-COMPLIANT GAS GAUGE ENABLED WITH IMPEDANCE TRACK™
TECHNOLOGY FOR USE WITH THE bq29312A
FEATURES
•
•
•
•
•
•
•
•
•
•
•
•
•
Patented Impedance Track™ Technology
Accurately Measures Available Charge in
Li-Ion and Li-Polymer Batteries
Better than 1% Error Over Lifetime of the
Battery
Instant Accuracy – No Learning Cycle
Required
Supports the Smart Battery Specification SBS
V1.1
Works With the TI bq29312A Analog
Front-End (AFE) Protection IC to Provide
Complete Pack Electronics Solution
Full Array of Programmable Voltage, Current,
and Temperature Protection Features
Integrated Time Base Removes Need for
External Crystal with Optional Crystal Input
Electronics for 7.2-V, 10.8-V or 14.4-V Battery
Packs With Few External Components
Based on a Powerful Low-Power RISC CPU
Core With High-Performance Peripherals
Integrated Field Programmable FLASH
Memory Eliminates the Need for External
Configuration Memory
Measures Charge Flow Using a
High-Resolution, 16-Bit Integrating
Delta-Sigma Converter
– Better Than 0.65 nVh of Resolution
– Self-Calibrating
– Offset Error Less Than 1 µV
Uses 16-Bit Delta-Sigma Converter for
Accurate Voltage and Temperature
Measurements
Extensive Data Reporting Options For
Improved System Interaction
•
Optional Pulse Charging Feature for Improved
Charge Times
Drives 3-, 4- or 5-Segment LED Display for
Remaining Capacity Indication
Supports SHA-1 Authentication
Lifetime Data Logging
38-Pin TSSOP (DBT)
•
•
•
•
APPLICATIONS
•
•
•
Notebook PCs
Medical and Test Equipment
Portable Instrumentation
DESCRIPTION
The bq20z80 SBS-compliant gas gauge IC,
incorporating
patented
Impedance
Track™
technology, is designed for battery-pack or in-system
installation. The bq20z80 measures and maintains an
accurate record of available charge in Li-ion or
Li-polymer
batteries
using
its
integrated
high-performance analog peripherals. The bq20z80
monitors capacity change, battery impedance,
open-circuit voltage, and other critical parameters of
the battery pack, and reports the information to the
system host controller over a serial-communication
bus. It is designed to work with the bq29312A analog
front-end (AFE) protection IC to maximize
functionality and safety, and minimize component
count and cost in smart battery circuits.
The Impedance Track technology continuously
analyzes the battery impedance, resulting in superior
gas-gauging accuracy. This enables remaining
capacity to be calculated with discharge rate,
temperature, and cell aging all accounted for during
each stage of every cycle.
AVAILABLE OPTIONS
PACKAGE
TA
38-PIN TSSOP (DBT)
Tube
38-PIN TSSOP (DBT)
Tape & Reel
–40°C to
85°C
bq20z80DBT-V102 (1)
bq20z80DBTR-V102 (2)
(1)
(2)
A single tube quantity is 50 units.
A single reel quantity is 2000 units
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
IMPEDANCE TRACK is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005–2006, Texas Instruments Incorporated
bq20z80-V102
www.ti.com
SLUS681A – NOVEMBER 2005 – REVISED MARCH 2006
SYSTEM PARTITIONING DIAGRAM
Discharge / Charge /
Precharge FETs
Fuse
Pack +
bq20z80
PCH FET Drive
Supply V oltage
Power Management
LDO, TOUT, and Power Mode control
Temperature Measurement
<1% Error
768 Bytes of
User Flash
SMBus
bq29312A
PF Input
Fail-Safe Protection
TINT
32-kHz Clock
Generator
Precharge
FET Drive
Cell Balancing
Drive
LDO, Therm Output Drive & UVLO
T1
System Watchdog
Delay Counters
System Interface
RAM Registers
32 kHz
Cell Balancing Algorithm and Control
SBS v1.1 Data
I2 C
System Interface
XAlert
bq29312 RAM/Comms Validation
1st Level OC
Protection
1st Level OV and
UV Protection
Pack Undervoltage
Power Mode
Control
Cell and Pack
Voltage
Measurement
Sleep
Power Mode Control
bq294xx
2-Tier Overcurrent Protection
Impedance Track (TM) + Lifetime Data Logging
Voltage Level Translator
Pack Sense Resistor
(5 m - 20 mW typ)
TSSOP (DBT)
(TOP VIEW)
VIN
TS1
TS2
PU
PRES
SCLK
SAFE
VDDD
RBI
SDATA
VSSD
SAFE
NC
NC
SMBC
SMBD
DISP
PFIN
VSSD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
38
37
36
35
34
33
32
31
30
29
28
VSSD
NC
NC
CLKOUT
XCK1 / VSSA
XCK2 / ROSC
FILT
VDDA
VSSA
VSSA
27
SR1
SR2
26
25
24
23
22
21
20
MRST
XALERT
LED1
LED2
LED3
LED4
LED5
NC - No internal connection
2
2 nd Level Overvoltage Protection
Precharge Control
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SLUS681A – NOVEMBER 2005 – REVISED MARCH 2006
TERMINAL FUNCTIONS
TERMINAL
NO.
NAME
I/O (1)
DESCRIPTION
1
VIN
I
Voltage measurement input from the AFE
2
TS1
I
1st Thermistor voltage input connection to monitor temperature
3
TS2
I
2nd Thermistor voltage input connection to monitor temperature
4
PU
O
Output to pull up the PRES pin for system detection
5
PRES
I
Active low input to sense system insertion and typically requires additional ESD protection
6
SCLK
I/OD
7
SAFE
O
Active high output to enforce additional level of safety protection; e.g., fuse blow. (Inverse of pin 12)
8
VDDD
P
Positive supply for digital circuitry and I/O pins
9
RBI
P
Backup power to the bq20z80 data registers during periods of low operating voltage. RBI accepts a
storage capacitor or a battery input.
10
SDATA
I/O
Data transfer to and from the AFE
12
SAFE
O
Active low output to enforce additional level of safety protection; e.g., fuse blow. (Inverse of pin 7)
13
NC
–
Not used— leave floating
Not used— leave floating
Communication clock to the AFE
14
NC
–
15
SMBC
I/OD
SMBus clock open-drain bidirectional pin used to clock the data transfer to and from the bq20z80
16
SMBD
I/OD
SMBus data open-drain bidirectional pin used to transfer address and data to and from the bq20z80
17
DISP
I
Display control for the LEDs. This pin is typically connected to bq29312A REG via a 100-kΩ resistor
and a push-button switch to VSSD.
18
PFIN
I
Active low input to detect secondary protector output status and allows the bq20z80 to report the
status of the 2nd level protection output
20
LED5
O
LED5 display segment that drives an external LED depending on the firmware configuration
21
LED4
O
LED4 display segment that drives an external LED depending on the firmware configuration
22
LED3
O
LED3 display segment that drives an external LED depending on the firmware configuration
23
LED2
O
LED2 display segment that drives an external LED depending on the firmware configuration
24
LED1
O
LED1 display segment that drives an external LED depending on the firmware configuration
25
XALERT
I
Input from bq29312A XALERT output.
26
MRST
I
Master reset input that forces the device into reset when held high
27
SR2
IA
Connections for a small-value sense resistor to monitor the battery charge- and discharge-current
flow
28
SR1
IA
Connections for a small-value sense resistor to monitor the battery charge- and discharge-current
flow
31
VDDA
P
Positive supply for analog circuitry
32
FILT
IA
Analog input connected to the external PLL filter components which are a 150-pF capacitor to VSSA,
in parallel with a 61.9-kΩ resistor and a 2200-pF capacitor in series. Place these components as
close as possible to the bq20z80 to ensure optimal performance.
33
XCK2/ROSC
O
32.768-kHz crystal oscillator output pin or connected to a 100k, 50ppm or better resistor if the
internal oscillator is used
34
XCK1/VSSA
I
32.768-kHz crystal oscillator input pin or connected to VSSA if the internal oscillator is used
35
CLKOUT
O
32.768-kHz output for the bq29312. This pin should be directly connected to the AFE.
36, 37
NC
-
Not used— leave floating
11, 19, 38
VSSD
P
Negative supply for digital circuitry
29, 30
VSSA
P
Negative supply for analog circuitry.
(1)
I = Input, IA = Analog input, I/O = Input/output, I/OD = Input/Open-drain output, O = Output, OA = Analog output, P = Power
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SLUS681A – NOVEMBER 2005 – REVISED MARCH 2006
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted) (1)
RANGE
VDDAand VDDD relative to VSS (2)
Supply voltage range
V(IOD) relative to VSS (2)
Open-drain I/O pins
VI relative to VSS
(2)
–0.3 V to 4.1 V
–0.3 V to 6 V
Input voltage range to all other pins
–0.3 V to VDDA + 0.3 V
TA
Operating free-air temperature range
–40°C to 85°C
Tstg
Storage temperature range
–65°C to 150°C
(1)
(2)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
VSS refers to the common node of V(SSA) and V(SSD).
ELECTRICAL CHARACTERISTICS
VDD = 3 V to 3.6 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
VDD
IDD
TEST CONDITIONS
Supply voltage
VDDA and VDDD
3
Operating mode current
MAX
3.3
3.6
bq20z80 + bq29312A
375
Sleep mode
8 (1)
bq20z80 + bq29312A
Output voltage low SMBC, SMBD, SDATA, SCLK, SAFE,
SAFE, PU
IOL = 0.5 mA
µA
0.2
0.4
LED1 – LED5
IOL = 10 mA
VOH
Output high voltage, SMBC, SMBD, SDATA, SCLK, SAFE,
SAFE, PU
IOH = –1 mA
VIL
Input voltage low SMBC, SMBD, SDATA, SCLK, XALERT,
PRES, PFIN
–0.3
0.8
DISP
VIH
CIN
0.4
VDD– 0.5
–0.3
0.8
2
6
DISP
2
VCC + 0.3
Input capacitance
5
V(AI2) Input voltage range SR1, SR2
V
V
V
Input voltage high SMBC, SMBD, SDATA, SCLK, XALERT,
PRES, PFIN
V(AI1) Input voltage range VIN, TS1, TS2
V
µA
0.1 (1)
bq20z80 + bq29312A
UNIT
µA
28
Shutdown Mode
I(SLP) Shutdown Current
TYP
350 (1)
No flash programming
I(SLP) Low-power storage mode current
VOL
MIN
V
V
V
V
pF
VSS– 0.3
1
VSS– 0.25
0.25
V
Z(AI1) Input impedance SR1, SR2
0 V–1 V
2.5
MΩ
Z(AI2) Input impedance VIN, TS1, TS2
0 V–1 V
8
MΩ
(1)
4
This value does not include the bq29312A
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POWER-ON RESET
VDD = 3 V to 3.6 V, TA = –40°C to 85°C (unless otherwise noted)
TYP
MAX
Negative-going voltage input
PARAMETER
TEST CONDITIONS
2.1
2.3
2.5
V
VHYS
Power-on reset hysteresis
50
150
200
mV
MAX
UNIT
0.25
V
UNIT
POWER ON RESET BEHAVIOR
vs
FREE-AIR TEMPERATURE
2.50
140
2.45
135
2.40
130
VIT-
2.35
125
2.30
120
2.25
115
Vhys
2.20
110
2.15
105
2.10
-20 -10
V hys - Hysterisis Voltage - mV
V IT - Negative Going Input Threshold Voltage - V
MIN
VIT–
100
0
10 20 30 40 50 60 70 80
TA - Free-Air Temperature - °C
INTEGRATING ADC (Coulomb Counter) CHARACTERISTICS
VDD = 3 V to 3.6 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
V(SR)
Input voltage range, V(SR2) and V(SR1)
V(SROS)
Input offset
INL
Integral nonlinearity error
TEST CONDITIONS
V(SR) = V(SR2) – V(SR1)
MIN
TYP
–0.25
µV
1
0.004%
0.019%
TYP
MAX
2
5
PLL SWITCHING CHARACTERISTICS
VDD = 3 V to 3.6 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
t(SP)
(1)
Start-up time
(1)
TEST CONDITIONS
MIN
0.5% frequency error
UNIT
ms
The frequency error is measured from the trimmed frequency of the internal system clock which is 128 oscillator frequency, nominally
4.194 MHz.
OSCILLATOR
VDD = 3 V to 3.6 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
ROSC = 100 kΩ
f(exo)
Frequency error from 32.768 kHz
ROSC = 100 kΩ, VDD = 3.3 V
XCK1 = 12-pF XTAL
f(sxo)
(1)
Start-up time
(1)
TYP
MAX
–2% 0.25%
MIN
2%
–1% 0.25%
–0.25%
UNIT
1%
0.25%
ROSC = 100 kΩ
250
µs
XCK1 = 12-pF XTAL
200
ms
The start-up time is defined as the time it takes for the oscillator output frequency to be within 1% of the specified frequency.
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SLUS681A – NOVEMBER 2005 – REVISED MARCH 2006
DATA FLASH MEMORY CHARACTERISTICS
VDD = 3 V to 3.6 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Data retention
See
(1)
10
Years
Flash programming write-cycles
See
(1)
20,000
Cycles
t(WORDPROG) Word programming time
See
(1)
I(DDPROG)
See
(1)
tDR
(1)
Flash-write supply current
2
ms
8
15
mA
TYP
MAX
UNIT
10
100
nA
Assured by design. Not production tested
REGISTER BACKUP
VDD = 3 V to 3.6 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
I(RBI)
V(RBI)
(1)
6
RBI data-retention input current
RBI data-retention
TEST CONDITIONS
MIN
V(RBI) > 3 V, VDD < VIT
voltage (1)
1.3
Specified by design. Not production tested.
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SLUS681A – NOVEMBER 2005 – REVISED MARCH 2006
SMBus TIMING SPECIFICATIONS
VDD = 3 V to 3.6 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
fSMB
SMBus operating frequency
Slave mode, SMBC 50% duty cycle
fMAS
SMBus master clock frequency
Master mode, no clock low slave extend
tBUF
Bus free time between start and stop
tHD:STA
Hold time after (repeated) start
tSU:STA
Repeated start setup time
tSU:STO
Stop setup time
MIN
TYP
10
MAX
100
51.2
kHz
4.7
4
µs
4.7
4
Receive mode
0
Transmit mode
300
tHD:DAT
Data hold time
tSU:DAT
Data setup time
tTIMEOUT
Error signal/detect
tLOW
Clock low period
tHIGH
Clock high period
See
(2)
tLOW:SEXT
Cumulative clock low slave extend time
See
(3)
25
tLOW:MEXT
Cumulative clock low master extend time
See
(4)
10
tF
Clock/data fall time
(VILMAX– 0.15 V) to (VIHMIN + 0.15 V)
tR
Clock/data rise time
0.9 VDD to (VILMAX – 0.15 V)
(1)
(2)
(3)
(4)
UNIT
ns
250
See
(1)
25
35
4.7
4
50
300
1000
ms
µs
ms
ns
The bq20z80 times out when any clock low exceeds tTIMEOUT.
tHIGH:MAX. is minimum bus idle time. SMBC = 1 for t > 50 µs causes reset of any transaction involving the bq20z80 that is in progress.
tLOW:SEXT is the cumulative time a slave device is allowed to extend the clock cycles in one message from initial start to the stop.
tLOW:MEXT is the cumulative time a master device is allowed to extend the clock cycles in one message from initial start to the stop.
SMBus TIMING DIAGRAM
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FEATURE SET
Primary (1st Level) Safety Features
The bq20z80 supports a wide range of battery and system protection features that can easily be configured. The
primary safety features includes:
•
•
•
•
•
•
•
Battery cell over/under voltage protection
Battery pack over/under voltage protection
2 independent charge overcurrent protection
3 independent discharge overcurrent protection
Short circuit protection
Over temperature protection
Host watchdog
Secondary (2nd Level) Safety Features
The secondary safety features of the bq20z80 can be used to indicate more serious faults via the SAFE (pin 7)
and SAFE (pin 12) pins. These pins can be used to blow a in-line fuse to permanently disable the battery pack
from charging or discharging. The secondary safety features includes:
•
•
•
•
•
•
•
•
•
•
•
Safety over voltage
Battery cell imbalance
2nd level protection IC input
Safety over current
Safety over temperature
Open thermistor
Charge FET and 0 Volt Charge FET fault
Discharge FET fault
Fuse blow failure detection
AFE communication error
Internal flash data error
Charge Control Features
The bq20z80 charge control features includes:
•
•
•
•
•
Report the appropriate charging current needed for constant current charging and the appropriate charging
voltage needed for constant voltage charging to a smart charger using SMBus broadcasts.
Determinea the chemical state of charge of each battery cell using Impendance Track™ and can reduce the
charge difference of the battery cells in fully charged state of the battery pack gradually using cell balancing
algorithm during charging. This prevents fully charged cells from overcharging causing excessive
degredation and also increases the usable pack energy by preventing to early charge termination
supports pre-charging/zero-volt charging
support fast charging
report charging faults and also indicate charge status via charge and discharge alarms.
Gas Gauging
The bq20z80 uses the Impedance Track™ Technology to measure and calculate the available charge in battery
cells. The archievable accuracy is better than 1% error over the lifetime of the battery and there is no full charge
discharge learning cycle required.
See Theory and Implementation of Impedance Track Battery Fuel-Gauging Algorithm application note (SLUA364)
for further details.
8
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FEATURE SET (continued)
LED Display
The bq20z80 can drive 3-, 4-, or 5- segment LED display for remaining capacity indication.
LifeTime Data Logging Features
The bq20z80 offers a lifetime data logging array, where all important measurements are stored for warranty and
analysis purposes. The data monitored includes:
•
•
•
•
•
•
•
•
•
•
•
•
•
Lifetime
Lifetime
Lifetime
Lifetime
Lifetime
Lifetime
Lifetime
Lifetime
Lifetime
Lifetime
Lifetime
Lifetime
Lifetime
maximum temperature
minimum temperature
maximum battery cell voltage
minimum battery cell voltage
maximum battery pack voltage
minimum battery pack voltage
maximum charge current
maximum discharge current
maximum charge power
maximum discharge power
maximum average discharge current
maximum average discharge power
average temperature
Authentication
The bq20z80 supports authentication by the host using SHA-1.
Power Modes
The bq20z80 supports 3 different power modes to reduce power consumption:
•
•
•
In Normal Mode, the bq20z80 performs measurements, calculations, protection decicions, data update in 1
second intervals. Between these intervals, the bq20z80 is in a reduced power stage.
In Sleep Mode, the bq20z80 performs measurements, calculations, protection decicions, data update in
adjustable time intervals. Between these intervals, the bq20z80 is in a reduced power stage.
In Shutdown Mode the bq20z80 is completety disabled.
CONFIGURATION
Oscillator Function
The oscillator of the bq20z80 can be set up for internal or external operation. On power up, the bq20z80
automatically attempts to start the internal oscillator. If a 100-kΩ resistor is not connected to ROSC (pin 33), then
it attempts to start the oscillator using an external 32.768-kHz crystal.
NOTE:
Install either the 100-kΩ ROSC resistor or the 12-pF, 32.768-kHz crystal. Do not
install both.
The performance of the internal oscillator depends on the tolerance of the 100-kΩ resistor between RSOC (pin
33) and VSSA (pin 34). Choose a resistor with a tolerance of ±0.1%, and 50-ppm or better temperature drift.
Place this resistor as close as possible to the bq20z80. If a 12-pF crystal is used, place it as close as possible to
the XCK1 (pin 34) and XCK2 (pin 33) pins. If not properly implemented, the PCB layout in this area can degrade
oscillator performance.
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FEATURE SET (continued)
System Present Operation
The bq20z80 pulls the PU pin high periodically (1 s). Connect this pin to the PRES pin of the bq20z80 via a
resistor of approximately 5 kΩ. The bq20z80 measures the PRES input during the PU-active period to determine
its state. If PRES input is pulled to ground by external system, the bq20z80 detects this as system present.
BATTERY PARAMETER MEASUREMENTS
The bq20z80 uses an integrating delta-sigma analog-to-digital converter (ADC) for current measurement, and a
second delta-sigma ADC for individual cell and battery voltage, and temperature measurement.
Charge and Discharge Counting
The integrating delta-sigma ADC measures the charge/discharge flow of the battery by measuring the voltage
drop across a small-value sense resistor between the SR1 and SR2 pins. The integrating ADC measures bipolar
signals from -0.25 V to 0.25 V. The bq20z80 detects charge activity when VSR = V(SR1)-V(SR2)is positive and
discharge activity when VSR = V(SR1)-V(SR2) is negative. The bq20z80 continuously integrates the signal over time,
using an internal counter. The fundamental rate of the counter is 0.65 nVh.
Voltage
The bq20z80 updates the individual series cell voltages through the bq29312A at one second intervals. The
bq20z80 configures the bq29312A to connect the selected cell, cell offset, or bq29312A VREF to the CELL pin of
the bq29312A, which is required to be connected to VIN of the bq20z80. The internal ADC of the bq20z80
measures the voltage, scales and calibrates it appropriately. This data is also used to calculate the impedance of
the cell for the Impedance Track™ gas-gauging.
Current
The bq20z80 uses the SR1 and SR2 inputs to measure and calculate the battery charge and discharge current
using a 5 mΩ to 20 mΩ typ. sense resistor.
Auto Calibration
The bq20z80 provides an auto-calibration feature to cancel the voltage offset error across SR1 and SR2 for
maximum charge measurement accuracy. The bq20z80 performs auto-calibration when the SMBus lines stay
low continuously for a minimum of 5 s.
Temperature
The bq20z80 TS1 and TS2 inputs, in conjunction with two identical NTC thermistors (default are Semitec
103AT), measure the battery environmental temperature. The bq20z80 can also be configured to use its internal
temperature sensor.
COMMUNICATIONS
The bq20z80 uses SMBus v1.1 with Master Mode and package error checking (PEC) options per the SBS
specification.
SMBus On and Off State
The bq20z80 detects an SMBus off state when SMBC and SMBD are logic-low for ≥ 2 seconds. Clearing this
state requires either SMBC or SMBD to transition high. Within 1 ms, the communication bus is available.
10
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FEATURE SET (continued)
SBS and Dataflash Values
Table 1. SBS COMMANDS
SBS Cmd
Mode
Name
Format
Size in
Bytes
Min
Value
Max
Value
Default Value
0x00
R/W
ManufacturerAccess
hex
2
0x0000
0xffff
—
0x01
R/W
RemainingCapacityAlarm
unsigned int
2
0
65535
—
mAh or
10mWh
0x02
R/W
RemainingTimeAlarm
unsigned int
2
0
65535
—
min
0x03
R/W
BatteryMode
hex
2
0x0000
0xffff
—
0x04
R/W
AtRate
signed int
2
-32768
32767
—
mA or 10mW
0x05
R
AtRateTimeToFull
unsigned int
2
0
65535
—
min
0x06
R
AtRateTimeToEmpty
unsigned int
2
0
65535
—
min
0x07
R
AtRateOK
unsigned int
2
0
65535
—
0x08
R
Temperature
unsigned int
2
0
65535
—
0.1°K
0x09
R
Voltage
unsigned int
2
0
20000
—
mV
0x0a
R
Current
signed int
2
-32768
32767
—
mA
0x0b
R
AverageCurrent
signed int
2
-32768
32767
—
mA
0x0c
R
MaxError
unsigned int
1
0
100
—
%
0x0d
R
RelativeStateOfCharge
unsigned int
1
0
100
—
%
0x0e
R
AbsoluteStateOfCharge
unsigned int
1
0
100
—
%
0x0f
R
RemainingCapacity
unsigned int
2
0
65535
—
mAh or
10mWh
0x10
R
FullChargeCapacity
unsigned int
2
0
65535
—
mAh or
10mWh
0x11
R
RunTimeToEmpty
unsigned int
2
0
65535
—
min
0x12
R
AverageTimeToEmpty
unsigned int
2
0
65535
—
min
0x13
R
AverageTimeToFull
unsigned int
2
0
65535
—
min
0x14
R
ChargingCurrent
unsigned int
2
0
65535
—
mA
0x15
R
ChargingVoltage
unsigned int
2
0
65535
—
mV
0x16
R
BatteryStatus
unsigned int
2
0x0000
0xffff
—
0x17
R/W
CycleCount
unsigned int
2
0
65535
—
0x18
R/W
DesignCapacity
unsigned int
2
0
65535
0x19
R/W
DesignVoltage
unsigned int
2
7000
16000
14400
0x1a
R/W
SpecificationInfo
unsigned int
2
0x0000
0xffff
0x0031
0x1b
R/W
ManufactureDate
unsigned int
2
0
65535
0
0x1c
R/W
SerialNumber
hex
2
0x0000
0xffff
0x0001
0x20
R/W
ManufacturerName
String
11+1
—
—
Texas Instruments
ASCII
0x21
R/W
DeviceName
String
7+1
—
—
bq20z80
ASCII
0x22
R/W
DeviceChemistry
String
4+1
—
—
LION
ASCII
0x23
R
ManufacturerData
String
14+1
—
—
—
ASCII
0x2f
R/W
Authenticate
String
20+1
—
—
—
ASCII
0x3c
R
CellVoltage4
unsigned int
2
0
65535
mV
0x3d
R
CellVoltage3
unsigned int
2
0
65535
mV
0x3e
R
CellVoltage2
unsigned int
2
0
65535
mV
0x3f
R
CellVoltage1
unsigned int
2
0
65535
mV
Submit Documentation Feedback
Unit
mAh or
10mWh
mV
11
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SLUS681A – NOVEMBER 2005 – REVISED MARCH 2006
Table 2. EXTENDED SBS COMMANDS
SBS
Cmd
Mode
Name
Format
Size in
Bytes
Min Value
Max Value
Default Value
Unit
0x45
R
AFEData
String
11+1
—
—
—
ASCII
0x46
R/W
FETControl
hex
1
0x00
0xff
—
0x4f
R
StateOfHealth
unsigned int
1
0
100
—
0x50
R
SafetyAlert
hex
2
0x0000
0xffff
—
0x51
R
SafetyStatus
hex
2
0x0000
0xffff
—
0x52
R
PFAlert
hex
2
0x0000
0xffff
—
0x53
R
PFStatus
hex
2
0x0000
0xffff
—
0x54
R
OperationStatus
hex
2
0x0000
0xffff
—
0x55
R
ChargingStatus
hex
2
0x0000
0xffff
—
0x57
R
ResetData
hex
2
0x0000
0xffff
—
0x58
R
WDResetData
unsigned int
2
0
65535
—
0x5a
R
PackVoltage
unsigned int
2
0
65535
—
0x5d
R
AverageVoltage
unsigned int
2
0
65535
0x60
R/W
UnSealKey
hex
4
0x00000000 0xffffffff
—
0x62
R/W
PFKey
hex
4
0x00000000 0xffffffff
—
0x63
R/W
AuthenKey3
hex
4
0x00000000 0xffffffff
—
0x64
R/W
AuthenKey2
hex
4
0x00000000 0xffffffff
—
0x65
R/W
AuthenKey1
hex
4
0x00000000 0xffffffff
—
0x66
R/W
AuthenKey0
hex
4
0x00000000 0xffffffff
—
0x70
R/W
ManufacturerInfo
String
8+1
—
—
—
0x71
R/W
SenseResistor
unsigned int
2
0
65535
—
0x77
R/W
DataflashClass
hex
2
0x0000
0xffff
—
0x78
R/W
DataFlashSubClass1
hex
32
—
—
—
0x79
R/W
DataFlashSubClass2
hex
32
—
—
—
0x7a
R/W
DataFlashSubClass3
hex
32
—
—
—
0x7b
R/W
DataFlashSubClass4
hex
32
—
—
—
0x7c
R/W
DataFlashSubClass5
hex
32
—
—
—
0x7d
R/W
DataFlashSubClass6
hex
32
—
—
—
0x7e
R/W
DataFlashSubClass7
hex
32
—
—
—
0x7f
R/W
DataFlashSubClass8
hex
32
—
—
—
%
mV
mV
µΩ
Table 3. DATAFLASH VALUES
Class
Subclass
ID
Subclass
Offset
Name
Data
Type
Min Value
Max
Value
Default Value
Units
1st Level
Safety
0
Voltage
0
COV Threshold
U2
3700
5000
4300
mV
2
COV Time
U1
0
60
2
Sec
3
COV Recovery
U2
0
4400
3900
mV
5
COV Delta
U1
0
200
20
mV
6
COV Temp. Hys
U1
0
250
100
0.1°C
7
POV Threshold
U2
0
18000
17500
mV
9
POV Time
U1
0
60
2
Sec
10
POV Recovery
U2
0
17000
16000
mV
12
CUV Threshold
U2
0
3500
2200
mV
14
CUV Time
U1
0
60
2
Sec
15
CUV Recovery
U2
0
3600
3000
mV
17
PUV Threshold
U2
0
16000
11000
mV
19
PUV Time
U1
0
60
2
Sec
20
PUV Recovery
U2
0
16000
12000
mV
12
Submit Documentation Feedback
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SLUS681A – NOVEMBER 2005 – REVISED MARCH 2006
Table 3. DATAFLASH VALUES (continued)
Class
Subclass
ID
Subclass
Offset
Name
Data
Type
Min Value
Max
Value
Default Value
Units
1st Level
Safety
1
Current
0
OC (1st Tier) Chg
U2
0
20000
6000
mA
2
OC (1st Tier) Chg Time
U1
0
60
2
sec
3
OC Chg Recovery
I2
-1000
1000
200
mA
5
OC (1st Tier) Dsg
U2
0
20000
6000
mA
7
OC (1st Tier) Dsg Time
U1
0
60
2
sec
8
OC Dsg Recovery
U2
0
1000
200
mA
10
OC (2nd Tier) Chg
U2
0
20000
8000
mA
12
OC (2nd Tier) Chg Time
U1
0
60
2
Sec
13
OC (2nd Tier) Dsg
U2
0
22000
8000
mA
15
OC (2nd Tier) Dsg Time
U1
0
60
2
Sec
16
Current Recovery Time
U1
0
60
8
Sec
17
AFE OC Dsg
H1
0x00
0xff
0x12
hex
18
AFE OC Dsg Time
H1
0x00
0xff
0xff
hex
19
AFE OC Dsg Recovery
U2
10
1000
100
mA
21
AFE SC Chg Cfg
H1
0x00
0xff
0x77
hex
22
AFE SC Dsg Cfg
H1
0x00
0xff
0x77
hex
23
AFE SC Recovery
U2
0
200
1
mA
0
Over Temp Chg
U2
0
1200
550
0.1°C
2
OT Chg Time
U1
0
60
2
Sec
3
OT Chg Recovery
U2
0
1200
500
0.1°C
5
Over Temp Dsg
U2
0
1200
600
0.1°C
7
OT Dsg Time
U1
0
60
2
Sec
8
OT Dsg Recovery
U2
0
1200
550
0.1°C
1st Level
Safety
2
Temperature
1st Level
Safety
3
Host Comm
0
Host Watchdog Timeout
U1
0
255
0
Sec
2nd Level
Safety
16
Voltage
0
SOV Threshold
U2
0
20000
18000
mV
2
SOV Time
U1
0
30
0
Sec
3
Cell Imbalance Current
U1
0
200
5
mA
4
Cell Imbalance Fail Voltage
U2
0
5000
1000
mV
6
Cell Imbalance Time
U1
0
30
0
Sec
7
Battery Rest Time
U2
0
65535
1800
Sec
9
PFIN Detect Time
U1
0
30
0
Sec
0
SOC Chg
U2
0
30000
10000
mA
2
SOC Chg Time
U1
0
30
0
Sec
3
SOC Dsg
U2
0
30000
10000
mA
5
SOC Dsg Time
U1
0
30
0
Sec
0
SOT Chg
U2
0
1200
650
0.1°C
2
SOT Chg Time
U1
0
30
0
Sec
3
SOT Dsg
U2
0
1200
750
0.1°C
5
SOT Dsg Time
U1
0
30
0
Sec
6
Open Thermistor
I2
-1000
1200
-333
0.1°C
8
Open Time
I1
0
30
0
Sec
0
FET Fail Limit
U2
0
500
20
mA
2
FET Fail Time
U1
0
30
0
Sec
0
AFE Check Time
U1
0
255
0
Sec
1
AFE Fail Limit
U1
0
255
10
cnt
2
AFE Fail Recovery Time
U1
0
255
20
Sec
3
AFE Init Retry Limit
U1
0
255
6
num
4
AFE Init Limit
U1
0
255
20
cnt
0
Fuse Fail Limit
U2
0
20
2
mA
2
Fuse Fail Time
U1
0
30
0
Sec
2nd Level
Safety
2nd Level
Safety
17
18
2nd Level
Safety
19
2nd Level
Safety
20
2nd Level
Safety
21
Current
Temperature
FET Verification
AFE Verification
Fuse Verification
Submit Documentation Feedback
13
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SLUS681A – NOVEMBER 2005 – REVISED MARCH 2006
Table 3. DATAFLASH VALUES (continued)
Class
Subclass
ID
Subclass
Offset
Name
Data
Type
Min Value
Max
Value
Default Value
Units
Charge
Control
32
Charge Inhibit Cfg
0
Chg Inhibit Temp Low
I2
-400
1200
0
0.1°C
2
Chg Inhibit Temp High
I2
-400
1200
450
0.1°C
4
Temp Hys
I2
0
100
10
0.1°C
0
Pre-chg Current
U2
0
2000
250
mA
2
Pre-chg Temp
I2
-400
1200
120
0.1°C
4
Pre-chg Voltage
U2
0
20000
3000
mV
6
Recovery Voltage
U2
0
20000
3100
mV
0
Fast Charge Current
U2
0
10000
4000
mA
2
Charging Voltage
U2
0
20000
16800
mV
4
Over Charging Voltage
U2
0
2000
500
mV
6
Delta Temp
I2
0
500
50
0.1°C
8
Suspend Low Temp
I2
-400
1200
-50
0.1°C
10
Suspend High Temp
I2
-400
1200
550
0.1°C
0
Turn ON Voltage
U2
0
5000
4150
mV
2
Turn OFF Voltage
U2
0
5000
4250
mV
4
Max ON Pulse Time
U1
0
240
240
S/4
5
Min OFF Pulse Time
U1
0
240
0
S/4
6
Max OFF Voltage
U2
0
5000
4270
mV
0
Maintenance Current
U2
0
1000
0
mA
2
Taper Current
U2
0
1000
250
mA
4
Min Taper Capacity
U2
0
1000
64
mAh
6
Termination Voltage
U2
0
1000
300
mV
8
Current Taper Window
U1
0
60
40
Sec
9
TCA Set %
I1
-1
100
-1
%
10
TCA Clear %
I1
-1
100
95
%
11
FC Set %
I1
-1
100
-1
%
12
FC Clear %
I1
-1
100
98
%
Charge
Control
Charge
Control
Charge
Control
Charge
Control
33
34
35
36
Pre-Charge Cfg
Fast Charge Cfg
Pulse Charge Cfg
Termination Cfg.
Charge
Control
37
Cell Balancing Cfg
0
Min Cell Deviation
U2
0
65535
1750
Sec/mAH
Charge
Control
38
Charging Faults
0
Over Charging Voltage
U2
0
3000
500
mV
2
Over Charging Volt Time
U1
0
60
2
Sec
3
Over Charging Current
U2
0
2000
500
mA
5
Over Charging Curr Time
U1
0
60
2
Sec
6
Over Charging Curr Recov
U2
0
2000
100
mA
8
Depleted Voltage
U2
0
16000
8000
mV
10
Depleted Voltage Time
U1
0
60
2
Sec
11
Depleted Recovery
U2
0
16000
8500
mV
13
Over Charge Capacity
U2
0
4000
300
mAh
15
Over Charge Recovery
U2
0
100
2
mAh
17
FC-MTO
U2
0
65535
10800
Sec
19
PC-MTO
U2
0
65535
3600
Sec
21
Charge Fault Cfg
H1
0x00
0xff
0
flg
14
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SLUS681A – NOVEMBER 2005 – REVISED MARCH 2006
Table 3. DATAFLASH VALUES (continued)
Class
Subclass
ID
Subclass
Offset
Name
Data
Type
Min Value
Max
Value
Default Value
Units
SBS
Configuration
48
Data
0
Rem Cap Alarm
U2
0
700
300
mAh
2
Rem Time Alarm
U2
0
30
10
Min
4
Init Battery Mode
H2
0x0000
0xffff
0x0081
hex
6
Design Voltage
U2
7000
18000
14400
mV
8
Spec Info
H2
0x0000
0xffff
0x0031
hex
10
Manuf Date
U2
0
65355
0
date
12
Ser. Num.
H2
0x0000
0xffff
0x0001
hex
14
Cycle Count
U2
0
65355
0
cnt
16
CC Threshold
I2
100
32767
4400
mAh
18
CC %
U1
0
100
90
%
19
CF MaxError Limit
U1
0
100
100
%
20
Design Capacity
U2
0
65355
4400
mAh
22
Design Energy
U2
0
65355
6336
10mWh
24
Manuf Name
S12
-
-
Texas Inst.
36
Device Name
S8
-
-
bq20z80
44
Device Chemistry
S5
-
-
LION
0
TDA Set %
I1
-1
100
6
%
1
TDA Clear %
I1
-1
100
8
%
2
FD Set %
I1
-1
100
2
%
3
FD Clear %
I1
-1
100
5
%
4
TDA Set Volt Threshold
U2
0
16800
5000
mV
6
TDA Set Volt Time
U1
0
60
5
Sec
7
TDA Clear Volt
U2
0
16800
5500
mV
9
FD Set Volt Threshold
U2
0
16800
5000
mV
11
FD Volt Time
U1
0
60
5
Sec
12
FD Clear Volt
U2
0
16800
5500
mV
0
Pack Lot Code
H2
0x0000
0xffff
0x0000
2
PCB Lot Code
H2
0x0000
0xffff
0x0000
4
Firmware Version
H2
0x0000
0xffff
0x0000
6
Hardware Revision
H2
0x0000
0xffff
0x0000
8
Cell Revision
H2
0x0000
0xffff
0x0000
SBS
Configuration
System Data
49
56
Configuration
Manufacturer Data
System Data
58
Manufacturer Info
0
Manuf. Info
S9
-
-
12345678
System Data
59
LifeTime Data
0
Lifetime Max Temp
I2
0
1400
300
0.1°C
2
Lifetime Min Temp
I2
-600
1400
200
0.1°C
4
Lifetime Max Cell Voltage
U2
0
65535
3500
mV
6
Lifetime Min Cell Voltage
U2
0
65535
3200
mV
8
Lifetime Max Pack Voltage
U2
0
65535
14000
mV
10
Lifetime Min Pack Voltage
U2
0
65535
12800
mV
12
Lifetime Max Chg Current
I2
-32768
32767
1500
mA
14
Lifetime Max Dsg Current
I2
-32768
32767
-3000
mA
16
Lifetime Max Chg Power
I2
-32768
32767
1500
0.1W
18
Lifetime Max Dsg Power
I2
-32768
32767
-1500
0.1W
22
Life Max AvgDsg Cur
I2
-32768
32767
-1000
mA
26
Life Max AvgDsg Pow
I2
-32768
32767
-1500
0.1W
28
Lifetime Avg Temp
I2
0
1400
250
0.1°C
System Data
60
LifeTime Temp
Samples
0
LT Temp Samples
U4
0
1400000
00
0
num
Configuration
64
Registers
0
Operation Cfg A
H2
0x0000
0xffff
0x0F29
flg
2
Operation Cfg B
H2
0x0000
0xffff
0x6440
flg
4
Permanent Fail Cfg
H2
0x0000
0xffff
0x0000
flg
6
Non-Removable Cfg
H2
0x0000
0xffff
0x0000
hex
Submit Documentation Feedback
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SLUS681A – NOVEMBER 2005 – REVISED MARCH 2006
Table 3. DATAFLASH VALUES (continued)
Class
Subclass
ID
Subclass
Offset
Name
Data
Type
Min Value
Max
Value
Default Value
Units
LED Support
67
LED Cfg
0
LED Flash Rate
U2
0
65535
512
500us
2
LED Blink Rate
U2
0
65535
1024
500us
4
LED Delay
U2
1
65535
100
500us
6
LED Hold Time
U1
0
255
4
s
7
CHG Flash Alarm
I1
-1
101
10
%
8
CHG Thresh 1
I1
-1
101
0
%
9
CHG Thresh 2
I1
-1
101
20
%
10
CHG Thresh 3
I1
-1
101
40
%
11
CHG Thresh 4
I1
-1
101
60
%
12
CHG Thresh 5
I1
-1
101
80
%
13
DSG Flash Alarm
I1
-1
101
10
%
14
DSG Thresh 1
I1
-1
101
0
%
15
DSG Thresh 2
I1
-1
101
20
%
16
DSG Thresh 3
I1
-1
101
40
%
17
DSG Thresh 4
I1
-1
101
60
%
18
DSG Thresh 5
I1
-1
101
60
%
0
Flash Update OK Voltage
U2
6000
20000
7500
mV
2
Shutdown Voltage
U2
5000
20000
7000
mV
4
Shutdown Time
U1
0
60
10
Sec
5
Charger Present
U2
0
23000
12000
mV
7
Sleep Current
U2
0
100
10
mA
9
Bus Low Time
U1
0
255
5
Sec
10
Cal Inhibit Temp Low
I2
-400
1200
50
0.1°C
12
Cal Inhibit Temp High
I2
-400
1200
450
0.1°C
14
Sleep Voltage Time
U1
0
100
5
Sec
15
Sleep Current Time
U1
0
255
20
Sec
0
Load Select
U1
0
255
3
num
1
Load Mode
U1
0
255
0
num
45
Term Voltage
I2
-32768
32767
12000
mV
60
User Rate-mA
I2
-9000
-2000
0
mA
62
User Rate-mW
I2
-14000
-3000
0
mW
64
Reserve Cap-mAh
I2
0
9000
0
mAh
66
Reserve Cap-mWh
I2
0
14000
0
mWh
0
Dsg Current Threshold
U2
0
2000
100
mA
2
Chg Current Threshold
U2
0
2000
50
mA
4
Quit Current
U2
0
1000
10
mA
6
Dsg Relax Time
U1
0
255
1
Sec
7
Chg Relax Time
U1
0
255
60
Sec
0
Qmax Cell 0
U2
0
65535
4400
mAh
2
Qmax Cell 1
U2
0
65535
4400
mAh
4
Qmax Cell 2
U2
0
65535
4400
mAh
6
Qmax Cell 3
U2
0
65535
4400
mAh
8
Qmax Pack
U2
0
65535
4400
mAh
12
Update Status
H1
0x00
0x04
0x00
num
21
Avg I Last Run
I2
-32768
32767
-2000
mA
23
Avg P Last Run
I2
-32768
32767
-3022
10mW
25
Delta Voltage
I2
-32768
32767
0
mV
Power
Gas Gauging
Gas Gauging
Gas Gauging
16
68
80
81
82
Power
IT Cfg
Current Thresholds
State
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SLUS681A – NOVEMBER 2005 – REVISED MARCH 2006
Table 3. DATAFLASH VALUES (continued)
Class
Subclass
ID
Subclass
Offset
Name
Data
Type
Min Value
Max
Value
Default Value
Ra Table
88
R_a0
0
Cell0 R_a flag
H2
0x0000
0xffff
0xff55
2
Cell0 R_a 0
I2
-32768
32767
160
num
4
Cell0 R_a 1
I2
-32768
32767
166
num
6
Cell0 R_a 2
I2
-32768
32767
153
num
8
Cell0 R_a 3
I2
-32768
32767
151
num
10
Cell0 R_a 4
I2
-32768
32767
145
num
12
Cell0 R_a 5
I2
-32768
32767
152
num
14
Cell0 R_a 6
I2
-32768
32767
176
num
16
Cell0 R_a 7
I2
-32768
32767
204
num
18
Cell0 R_a 8
I2
-32768
32767
222
num
20
Cell0 R_a 9
I2
-32768
32767
254
num
22
Cell0 R_a 10
I2
-32768
32767
315
num
24
Cell0 R_a 11
I2
-32768
32767
437
num
26
Cell0 R_a 12
I2
-32768
32767
651
num
28
Cell0 R_a 13
I2
-32768
32767
1001
num
30
Cell0 R_a 14
I2
-32768
32767
1458
num
0
Cell1 R_a flag
H2
0x0000
0xffff
0xff55
2
Cell1 R_a 0
I2
-32768
32767
160
num
4
Cell1 R_a 1
I2
-32768
32767
166
num
6
Cell1 R_a 2
I2
-32768
32767
153
num
8
Cell1 R_a 3
I2
-32768
32767
151
num
10
Cell1 R_a 4
I2
-32768
32767
145
num
12
Cell1 R_a 5
I2
-32768
32767
152
num
14
Cell1 R_a 6
I2
-32768
32767
176
num
16
Cell1 R_a 7
I2
-32768
32767
204
num
18
Cell1 R_a 8
I2
-32768
32767
222
num
20
Cell1 R_a 9
I2
-32768
32767
254
num
22
Cell1 R_a 10
I2
-32768
32767
315
num
24
Cell1 R_a 11
I2
-32768
32767
437
num
26
Cell1 R_a 12
I2
-32768
32767
651
num
28
Cell1 R_a 13
I2
-32768
32767
1001
num
30
Cell1 R_a 14
I2
-32768
32767
1458
num
0
Cell2 R_a flag
H2
0x0000
0xffff
0xff55
2
Cell2 R_a 0
I2
-32768
32767
160
num
4
Cell2 R_a 1
I2
-32768
32767
166
num
6
Cell2 R_a 2
I2
-32768
32767
153
num
8
Cell2 R_a 3
I2
-32768
32767
151
num
10
Cell2 R_a 4
I2
-32768
32767
145
num
12
Cell2 R_a 5
I2
-32768
32767
152
num
14
Cell2 R_a 6
I2
-32768
32767
176
num
16
Cell2 R_a 7
I2
-32768
32767
204
num
18
Cell2 R_a 8
I2
-32768
32767
222
num
20
Cell2 R_a 9
I2
-32768
32767
254
num
22
Cell2 R_a 10
I2
-32768
32767
315
num
24
Cell2 R_a 11
I2
-32768
32767
437
num
26
Cell2 R_a 12
I2
-32768
32767
651
num
28
Cell2 R_a 13
I2
-32768
32767
1001
num
30
Cell2 R_a 14
I2
-32768
32767
1458
num
0
Cell3 R_a flag
H2
0x0000
0xffff
0xff55
2
Cell3 R_a 0
I2
-32768
32767
160
Ra Table
Ra Table
Ra Table
89
90
91
R_a1
R_a2
R_a3
Submit Documentation Feedback
Units
num
17
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SLUS681A – NOVEMBER 2005 – REVISED MARCH 2006
Table 3. DATAFLASH VALUES (continued)
Class
Ra Table
Ra Table
Ra Table
18
Subclass
ID
92
93
94
Subclass
R_a0x
R_a1x
R_a2x
Offset
Name
Data
Type
Min Value
Max
Value
Default Value
Units
4
Cell3 R_a 1
I2
-32768
32767
166
num
6
Cell3 R_a 2
I2
-32768
32767
153
num
8
Cell3 R_a 3
I2
-32768
32767
151
num
10
Cell3 R_a 4
I2
-32768
32767
145
num
12
Cell3 R_a 5
I2
-32768
32767
152
num
14
Cell3 R_a 6
I2
-32768
32767
176
num
16
Cell3 R_a 7
I2
-32768
32767
204
num
18
Cell3 R_a 8
I2
-32768
32767
222
num
20
Cell3 R_a 9
I2
-32768
32767
254
num
22
Cell3 R_a 10
I2
-32768
32767
315
num
24
Cell3 R_a 11
I2
-32768
32767
437
num
26
Cell3 R_a 12
I2
-32768
32767
651
num
28
Cell3 R_a 13
I2
-32768
32767
1001
num
30
Cell3 R_a 14
I2
-32768
32767
1458
num
0
xCell0 R_a flag
H2
0x0000
0xffff
0xffff
2
xCell0 R_a 0
I2
-32768
32767
160
num
4
xCell0 R_a 1
I2
-32768
32767
166
num
6
xCell0 R_a 2
I2
-32768
32767
153
num
8
xCell0 R_a 3
I2
-32768
32767
151
num
10
xCell0 R_a 4
I2
-32768
32767
145
num
12
xCell0 R_a 5
I2
-32768
32767
152
num
14
xCell0 R_a 6
I2
-32768
32767
176
num
16
xCell0 R_a 7
I2
-32768
32767
204
num
18
xCell0 R_a 8
I2
-32768
32767
222
num
20
xCell0 R_a 9
I2
-32768
32767
254
num
22
xCell0 R_a 10
I2
-32768
32767
315
num
24
xCell0 R_a 11
I2
-32768
32767
437
num
26
xCell0 R_a 12
I2
-32768
32767
651
num
28
xCell0 R_a 13
I2
-32768
32767
1001
num
30
xCell0 R_a 14
I2
-32768
32767
1458
num
0
xCell1 R_a flag
H2
0x0000
0xffff
0xffff
2
xCell1 R_a 0
I2
-32768
32767
160
num
4
xCell1 R_a 1
I2
-32768
32767
166
num
6
xCell1 R_a 2
I2
-32768
32767
153
num
8
xCell1 R_a 3
I2
-32768
32767
151
num
10
xCell1 R_a 4
I2
-32768
32767
145
num
12
xCell1 R_a 5
I2
-32768
32767
152
num
14
xCell1 R_a 6
I2
-32768
32767
176
num
16
xCell1 R_a 7
I2
-32768
32767
204
num
18
xCell1 R_a 8
I2
-32768
32767
222
num
20
xCell1 R_a 9
I2
-32768
32767
254
num
22
xCell1 R_a 10
I2
-32768
32767
315
num
24
xCell1 R_a 11
I2
-32768
32767
437
num
26
xCell1 R_a 12
I2
-32768
32767
651
num
28
xCell1 R_a 13
I2
-32768
32767
1001
num
30
xCell1 R_a 14
I2
-32768
32767
1458
num
0
xCell2 R_a flag
H2
0x0000
0xffff
0xffff
2
xCell2 R_a 0
I2
-32768
32767
160
num
4
xCell2 R_a 1
I2
-32768
32767
166
num
6
xCell2 R_a 2
I2
-32768
32767
153
num
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SLUS681A – NOVEMBER 2005 – REVISED MARCH 2006
Table 3. DATAFLASH VALUES (continued)
Class
Ra Table
PF Status
PF Status
Subclass
ID
95
96
97
Subclass
R_a3x
Device Status Data
AFE Regs
Offset
Name
Data
Type
Min Value
Max
Value
Default Value
Units
8
xCell2 R_a 3
I2
-32768
32767
151
num
10
xCell2 R_a 4
I2
-32768
32767
145
num
12
xCell2 R_a 5
I2
-32768
32767
152
num
14
xCell2 R_a 6
I2
-32768
32767
176
num
16
xCell2 R_a 7
I2
-32768
32767
204
num
18
xCell2 R_a 8
I2
-32768
32767
222
num
20
xCell2 R_a 9
I2
-32768
32767
254
num
22
xCell2 R_a 10
I2
-32768
32767
315
num
24
xCell2 R_a 11
I2
-32768
32767
437
num
26
xCell2 R_a 12
I2
-32768
32767
651
num
28
xCell2 R_a 13
I2
-32768
32767
1001
num
30
xCell2 R_a 14
I2
-32768
32767
1458
num
0
xCell3 R_a flag
H2
0x0000
0xffff
0xffff
2
xCell3 R_a 0
I2
-32768
32767
160
num
4
xCell3 R_a 1
I2
-32768
32767
166
num
6
xCell3 R_a 2
I2
-32768
32767
153
num
8
xCell3 R_a 3
I2
-32768
32767
151
num
10
xCell3 R_a 4
I2
-32768
32767
145
num
12
xCell3 R_a 5
I2
-32768
32767
152
num
14
xCell3 R_a 6
I2
-32768
32767
176
num
16
xCell3 R_a 7
I2
-32768
32767
204
num
18
xCell3 R_a 8
I2
-32768
32767
222
num
20
xCell3 R_a 9
I2
-32768
32767
254
num
22
xCell3 R_a 10
I2
-32768
32767
315
num
24
xCell3 R_a 11
I2
-32768
32767
437
num
26
xCell3 R_a 12
I2
-32768
32767
651
num
28
xCell3 R_a 13
I2
-32768
32767
1001
num
30
xCell3 R_a 14
I2
-32768
32767
1458
num
0
PF Flags 1
H2
0x0000
0xffff
0x0000
flg
2
Fuse Flag
H2
0x0000
0xffff
0x0000
flg
4
PF Voltage
U2
0
65535
0
mV
6
PF C4 Voltage
U2
0
9999
0
mV
8
PF C3 Voltage
U2
0
9999
0
mV
10
PF C2 Voltage
U2
0
9999
0
mV
12
PF C1 Voltage
U2
0
9999
0
mV
14
PF Current
I2
-32768
32767
0
mA
16
PF Temperature
U2
0
9999
0
0.1°K
18
PF Batt Stat
H2
0x0000
0xffff
0x0000
flg
20
PF RC-mAh
U2
0
65535
0
mAh
22
PF RC-10mWh
U2
0
65535
0
10mWh
24
PF Chg Status
H2
0x0000
0xffff
0x0000
flg
26
PF Safety Status
H2
0x0000
0xffff
0x0000
flg
28
PF Flags 2
H2
0x0000
0xffff
0x0000
flg
0
AFE Status
H1
0x00
0xffff
0x00
flg
1
AFE Output
H1
0x00
0xffff
0x00
flg
2
AFE State
H1
0x00
0xffff
0x00
flg
3
AFE Function
H1
0x00
0xffff
0x00
flg
4
AFE Cell Select
H1
0x00
0xffff
0x00
flg
5
AFE OLV
H1
0x00
0xffff
0x00
flg
6
AFE OLT
H1
0x00
0xffff
0x00
flg
Submit Documentation Feedback
19
bq20z80-V102
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SLUS681A – NOVEMBER 2005 – REVISED MARCH 2006
Table 3. DATAFLASH VALUES (continued)
Class
Calibration
Calibration
Calibration
Calibration
20
Subclass
ID
104
105
106
107
Subclass
Data
Config
Temp Model
Current
Offset
Name
Data
Type
Min Value
Max
Value
Default Value
Units
7
AFE SCC
H1
0x00
0xffff
0x00
flg
8
AFE SCD
H1
0x00
0xffff
0x00
flg
0
CC Gain
F4
1.00E+1
1.00E+128 28
0.471
num
4
CC Delta
F4
1.00E+1
1.00E+128 28
140500
num
8
Ref Voltage
I2
0
32767
24500
50uV
10
AFE Corr
U2
0
65535
1288
num
12
AFE Pack Gain
U2
0
65535
30625
num
14
CC Offset
I2
-32768
32767
-12250
num
16
Board Offset
I1
-128
127
0
num
17
Int Temp Offset
I1
-128
127
0
num
18
Ext1 Temp Offset
I1
-128
127
0
num
19
Ext2 Temp Offset
I1
-128
127
0
num
0
CC Current
U2
0
65535
3000
mA
2
Voltage Signal
U2
0
65535
16800
mV
4
Temp Signal
U2
0
65535
2980
K
6
CC Offset Time
U2
0
65535
250
ms
8
ADC Offset Time
U2
0
65535
32
ms
10
CC Gain Time
U2
0
65535
250
ms
12
Voltage Time
U2
0
65535
1984
ms
14
Temperature Time
U2
0
65535
32
ms
17
Cal Mode Timeout
U2
0
65535
38400
sec/128
0
Ext Coef 1
I2
-32768
32767
-28285
Sec
2
Ext Coef 2
I2
-32768
32767
20848
Sec
4
Ext Coef 3
I2
-32768
32767
-7537
Sec
6
Ext Coef 4
I2
-32768
32767
4012
Sec
8
Ext Min AD
I2
-32768
32767
0
Sec
10
Ext Max Temp
I2
-32768
32767
4012
Sec
12
Int Coef 1
I2
-32768
32767
0
Sec
14
Int Coef 2
I2
-32768
32767
0
Sec
16
Int Coef 3
I2
-32768
32767
-11136
Sec
18
Int Coef 4
I2
-32768
32767
5754
Sec
20
Int Min AD
I2
-32768
32767
0
Sec
22
Int Max Temp
I2
-32768
32767
5754
Sec
0
Filter
U1
0
255
239
mA
1
Deadband
U1
0
255
3
mA
2
CC Deadband
U1
0
255
34
nV+
3
CC Max Deadband
U1
0
255
5
nV+
4
CC Deadband Sample
U2
0
65535
256
num
6
CC Max Offset Sample
U2
0
65535
64
num
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2
1
21
DSG
20
ZVCHG
CHG
BAT
PACK
19
3
4
5
6
7
23
SLEEP
REG
VC1
TOUT
U2
OD
bq29312PW
22
18
17
24
VC2
SCLK
13
VC3
SDATA
VC4
XALERT
VC5
WDI
PMS
CELL
SR1
SR2
8
9
GND GND
15
12
14
16
10
11
PACKAGE OPTION ADDENDUM
www.ti.com
16-Dec-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
BQ20Z80DBT-V102
ACTIVE
SM8
DBT
38
BQ20Z80DBTR-V102
ACTIVE
SM8
DBT
38
BQ20ZDBT-V102G4
ACTIVE
SM8
DBT
38
BQ20ZDBTR-V102G4
ACTIVE
SM8
DBT
38
50
Lead/Ball Finish
MSL Peak Temp (3)
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
50
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
IMPORTANT NOTICE
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enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
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TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty. Except where mandated by government requirements, testing of all
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TI assumes no liability for applications assistance or customer product design. Customers are responsible for
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