Freescale Semiconductor Technical Data Document Number: MC33199 Rev. 4.0, 10/2006 33199 The MC33199 is a serial interface circuit used in diagnostic applications. It is the interface between the microcontroller and the special K and L lines of the ISO diagnostic port. The MC33199 has been designed to meet the «Diagnosis System ISO9141» specification. The device has a bi-directional bus K line driver, fully protected against short circuits and over temperature. It also includes the L line receiver, used during the wake up sequence in the ISO transmission. The MC33199 has a unique feature which allow transmission Baud rate up to 200kBaud. LIN, ISO-9141 J-1850 PHYSICAL INTERFACES D SUFFIX EF SUFFIX (PB-FREE) PLASTIC PACKAGE 98ASB42565B 14 PIN SOIC Features • Electrically Compatible with Specification “Diagnosis System ISO9141” • Transmission speed up to 200kBaud • Internal Voltage Reference Generator for Line Comparator Thresholds • TXD, RXD and LO pins are 5V CMOS Compatible • High Current Capability of DIA pin (K line) • Short Circuit Protection for the K Line Input • Over Temperature Shutdown with Hysteresis • Large Operating Range of Driver Supply Voltage • Large Operating Temperature Range • ESD Protected pins • Pb-Free Packaging Designated by Suffix Code EF ORDERING INFORMATION Device MC33199D MCZ33199EF/R2 Temperature Range (TA) Package -40°C to 125°C 14 SOIC VBAT VDD 33199 VDD VS LO L SCIRXD RXD I1 SCITXD TXD DIA MCU I/O VCC GND Figure 1. Simplified Application Diagram Freescale Semiconductor, Inc. reserves the right to change the detail specifications, as may be required, to permit improvements in the design of its products. © Freescale Semiconductor, Inc., 2007. All rights reserved. ISO L-LINE (BUS) ISO K-LINE ARCHIVE INFORMATION ARCHIVE INFORMATION Automotive ISO 9141 Serial Link Driver INTERNAL BLOCK DIAGRAM INTERNAL BLOCK DIAGRAM VCC 33199 VS Reference Generator REF-OUT LO Protection L + – C2 I1 Source REF-IN-L ARCHIVE INFORMATION RXD I1 VCC – + C1 DIA Thermal Shutdown TXD Driver GND Current Limit Figure 2. 33199 Simplified Internal Block Diagram 33199 2 Analog Integrated Circuit Device Data Freescale Semiconductor ARCHIVE INFORMATION REF-IN-K PIN CONNECTIONS PIN CONNECTIONS 1 14 REF-OUT REF-IN-L 2 13 VS REF-IN-K 3 12 L LO 4 11 I1 RXD 5 10 GND TXD 6 9 DIA NC 7 8 NC ARCHIVE INFORMATION ARCHIVE INFORMATION 33199 VCC Figure 3. 33199 Pin Connections Table 1. Pin Definitions A functional description of each pin can be found in the Functional Pin Description section, beginning on page 12. Pin Number Pin Name Definition 1 VCC 2 REF-IN-L Input reference for C2 comparator. 3 REF-IN-K Input reference for C1 comparator. 4 LO 5 RXD Open drain output of the data on BUS. A recessive bus = a logic [1], a dominant bus = logic [0]. An external pullup is required. 6 TXD Data input here will appear on the BUS pin. A logic [0] will assert the bus, a logic [1] will make the bus go to the recessive state. 7, 8 NC No internal connection to these pins. 9 DIA Provides a battery-level logic signal. 10 GND Electrical Common Ground and Heat removal. A good thermal path will also reduce the die temperature. 11 I1 Power input. An external diode is needed for reverse battery protection. 12 L The external bus load resistor connects here to prevent bus pullup in the event of loss of module ground. 13 VS 14 REF-OUT 5V typical power supply pin. typical supply current is less than 1.5mA This pin control Sleep Mode, Transmit Level, and Speed. It has a weak pulldown. This pin connects to the bus through external components. Internal reference voltage generator output pin. 33199 Analog Integrated Circuit Device Data Freescale Semiconductor 3 ELECTRICAL CHARACTERISTICS MAXIMUM RATINGS ELECTRICAL CHARACTERISTICS MAXIMUM RATINGS Table 2. Maximum Ratings All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or permanent damage to the device. Ratings Symbol Value Unit DC Voltage Range VS 0.5 to + 40 Transient Pulse (2) VPULSE 2 to + 40 VCC 0.3 to + 6.0 V - 0.5 TO + 38 V ELECTRICAL RATINGS (1) V VCC Supply DC Voltage Range DIA and L Pins (2) DC Voltage Range Transient Pulse (clamped by internal diode) DC Source Current DIA Low Level Sink Current TXD DC Voltage Range -2 V - 50 mA INT. LIMIT mA -0.3 TO VCC +0.3 V REF-IN DC Voltage Range V VS < VCC -0.3 TO VCC VS > VCC -0.3 TO VS ESD Voltage Capability VESD +/-2000 V TSTG 55 to + 150 °C TJ 40 to + 150 °C RTJA 180 C/W PD 250 mW TPPRT Note 4. °C THERMAL RATINGS Storage Temperature Operating Junction Temperature Thermal Resistance, Junction to air Max Power Dissipation (@ TA=105 °C) Peak Package Reflow Temperature During Reflow (3), (4) Notes 1. The device is compatible with Specification: “Diagnosis System ISO9141” 2. See the test Circuit (Figure 26). Transient test pulse according to ISO76371 and DIN 40839, highest test levels 3. Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may cause malfunction or permanent damage to the device. 4. Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow Temperature and Moisture Sensitivity Levels (MSL), Go to www.freescale.com, search by part number [e.g. remove prefixes/suffixes and enter the core ID to view all orderable parts. (i.e. MC33xxxD enter 33xxx), and review parametrics. 33199 4 Analog Integrated Circuit Device Data Freescale Semiconductor ARCHIVE INFORMATION ARCHIVE INFORMATION VS Supply Pin ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 3. Static Electrical Characteristics Characteristics noted under conditions VCC from 4.5V to 5.5V, VS from 4.5V to 20V unless otherwise note. Typical values reflect approximate mean at 25°C, nominal VCC and VS, at time of device characterization. Typical values noted reflect the approximate parameter means at TA = 25°C under nominal conditions unless otherwise noted. Characteristic Symbol Min VCC 4.5 ICC 0.5 Typ Max Unit 5.5 V 1.5 V VCC PIN 1 VCC Supply Voltage Range VCC Supply Current (6) 1.0 REF-IN-L & REF-IN-K Input Voltage Range: VINREF V for 0 <VS< VCC 2.0 VCC -2.0 for VCC <VS< 40V 2.0 VS -1.0 -5.0 5.0 REF-IN-L & REF-IN-K Inputs Currents IVIN ARCHIVE INFORMATION ARCHIVE INFORMATION REF-IN-L PIN 2 AND REF-IN-K PIN 3 μΑ LO PIN 4 LO open Collector Output VOL V Low Level Voltage @ IOUT = 1mA 0.34 Low Level Voltage @ IOUT = 4mA 0.7 0.8 RXD PIN 5 Pull up resistor to VCC Low Level Voltage @ IOUT=1mA RRXD 1.5 VOL 2.0 2.5 kΩ 0.3 0.7 V TXD PIN 6 High Level Input Voltage VIH Low Level Input Voltage VIL 0.7VCC 2.8 2.0 V 0.3VCC Input Current @ 0<VS<40V V μΑ TXD at High Level IH -200 30 TXD at Low Level II -600 -100 Low Level Output Voltage @ I = 30mA VOL 0.0 Drive Current Limit ILIM 40 High Level Input Threshold Voltage VIH VREF MIN 0.25V VREF MIN VREF VREF MAX -0.2V -0.125V -0.05V DIA INPUT / OUTPUT PIN 9 (REF-IN-K connected to REF-OUT) Low Level Input Threshold Voltage VIL (REF-IN-K connected to REF-OUT) 0.35 0.8 V 120 mA VREF VREF MAX V 0.325V 0.4V V Input Hysteresis VHYST 300 450 600 mV Leakage Current ILEAK 4.0 10 16 μΑ Over temperature Shutdown TLIM 155 °C Notes 5. Measured with TXD=Vcc, I1=Vs, DIA & L high, no load, REF-IN-L and REF-IN-K connected to REF-OUT 33199 Analog Integrated Circuit Device Data Freescale Semiconductor 5 ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 3. Static Electrical Characteristics (continued) Characteristics noted under conditions VCC from 4.5V to 5.5V, VS from 4.5V to 20V unless otherwise note. Typical values reflect approximate mean at 25°C, nominal VCC and VS, at time of device characterization. Typical values noted reflect the approximate parameter means at TA = 25°C under nominal conditions unless otherwise noted. Characteristic Symbol Min Typ Max Unit VIH VREF MIN VREF VREF MAX V 0.25V 0.325V 0.4V VREF MIN VREF VREF MAX -0.2V -0.125V -0.05V L INPUT PIN 12 (REF-IN-L connected to REF-OUT) Low Level Input Threshold Voltage VIL ARCHIVE INFORMATION (REF-IN-L connected to REF-OUT) V Input Hysteresis VHYST 300 450 600 mV Leakage Current ILEAK 4.0 10 16 μΑ I1S -4.0 -3.0 -2.0 mA VI1SAT VS - 1.2 VS - 0.8 VS V I1D -120 -80 -40 mA VI1DSAT VS - 2.7 VS - 0.85 VS V VS Supply Voltage Range VS 4.5 20 V VS Supply Current IS 0.5 2.0 mA L1 INPUT PIN 11 Static Source Current Static Saturation Voltage @ I1S=-2mA Dynamic Source Current Dynamic Saturation Voltage @ I1S=-40mA VS PIN 13 1.3 REF-OUT PIN 14 Output Voltage : VREF V @ 3 < VS < 5.6V & IRO = +-10μΑ 2.7 3.3 @ 5.6 < VS < 18V & IRO = +-10μΑ 0.5 x VS 0.56 x VS @ 18 < VS < 40V & IRO = +-10μΑ 8.5 10.8 50 μΑ 12 kΩ Maximum output current IOUT -50 Pull-up resistor to VCC RPU 3.0 6. 8.0 Measured with TXD=VCC, I1=VS, DIA & L high, no load, REF-IN-L and REF-IN-K connected to REF-OUT 33199 6 Analog Integrated Circuit Device Data Freescale Semiconductor ARCHIVE INFORMATION High Level Input Threshold Voltage ELECTRICAL CHARACTERISTICS DYNAMIC ELECTRICAL CHARACTERISTICS DYNAMIC ELECTRICAL CHARACTERISTICS Table 4. Dynamic Electrical Characteristics Characteristics noted under conditions Vcc from 4.5V to 5.5V, Vs from 4.5V to 20V unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25°C under nominal conditions unless otherwise noted. Characteristic Symbol Min Transmission Speed 1/T BIT 0.0 High or Low Bit Time T BIT 5.0 Typ Max Unit 200k Baud DELAY TIMING μs ns Low to High Transition Delay Time tRDR 450 High to Low Transition Delay Time tDRF 450 LO Output : ARCHIVE INFORMATION ARCHIVE INFORMATION Rxd Output : μs Low to High Transition Delay Time tLDR 2.0 High to Low Transition Delay Time tLDF 2.0 Low to High Transition Delay Time tDDR 650 High to Low Transition Delay Time tDDF 650 DIA Output : ns I1 Output @ VS-I1 > 2.7V : μs Rise time tI1R Hold Time tI1F 0.3 1.5 4.5 33199 Analog Integrated Circuit Device Data Freescale Semiconductor 7 ELECTRICAL CHARACTERISTICS TIMING DIAGRAMS TIMING DIAGRAMS +12V 5V TXD Input Signal tBIT VCC VBAT I1 REF-OUT 0V REF-IN-K Input Signal TxD tDDR Test Point REF-IN-L DIA tDDF 10V 1nF DIA Output Signal GND 2V ARCHIVE INFORMATION Figure 4. TXD to DIA AC Characteristic +5V +12V 12V DIA and L Input Signal tBIT VCC VBAT REF-OUT 2K REF-IN-L L REF-IN-K TXD Test Points 0V Input Signal RXD ot LO Output Signal DIA LO RXD tRDF / tLDF tRDR / tLDR GND 4.5V 0.4V 2x30pF Figure 5. DIA to TxD and L to LO AC Characteristics . tBIT 5V TXD Signal 0V tI1F tI1H 120mA Typical I1 Waveform Current Source I1 Maximum Limit 40mA 4mA 2mA tI1R Current Source I1 Minimum Limit Figure 6. Current Source I1 AC Characteristics At static HIGH or LOW level TXD, the current source I1 delivers a current of 3mA (typ). Only during LOW to HIGH transition, does this current increase to a higher value in order to charge the K Line capacitor (Cl<4nF) in a short time. 33199 8 Analog Integrated Circuit Device Data Freescale Semiconductor ARCHIVE INFORMATION +5V ELECTRICAL CHARACTERISTICS ELECTRICAL PERFORMANCE CURVES +5V +12V I1 pulse current VCC VBAT I1 REF-OUT Input Signal REF-IN-L REF-IN-K DIA TXD 33nF LO 10Ω RXD GND DIA discharge current To Oscilloscope ELECTRICAL PERFORMANCE CURVES Figure 8. ICC Supply Current versus Temperature Figure 10. IS Supply Voltage versus VS Supply Voltage -40°C 25°C 125°C Figure 9. VS Supply Current versus VS Supply Voltage ARCHIVE INFORMATION ARCHIVE INFORMATION Figure 7. Current Source I1 and DIA Discharge current test schematic Figure 11. VS Voltage versus IS Current (VCC=5.5V, VDIA, L, I1=20V 33199 Analog Integrated Circuit Device Data Freescale Semiconductor 9 Figure 12. REF-OUT Voltage versus VS Supply Voltage Figure 15. L and DIA Current versus L and DIA Voltage I DIA = 40mA Figure 13. REF-OUT Voltage versus REF-OUT Current Figure 16. DIA Saturation Voltage versus Temperature Figure 14. L and DIA Hysteresis versus Temperature Figure 17. DIA Current Limit versus Temperature 33199 10 Analog Integrated Circuit Device Data Freescale Semiconductor ARCHIVE INFORMATION ARCHIVE INFORMATION ELECTRICAL CHARACTERISTICS ELECTRICAL PERFORMANCE CURVES Figure 18. RXD Pull-up Resistor versus Temperature Figure 21. I1 Output DC Current versus Temperature LO RXD Figure 19. TXD and LO Saturation Voltage versus Temperature Figure 22. I1 Output Pulse Current versus VS Supply Voltage I=40mA I=2mA Figure 20. I1 Saturation Voltage versus Temperature ARCHIVE INFORMATION ARCHIVE INFORMATION ELECTRICAL CHARACTERISTICS ELECTRICAL PERFORMANCE CURVES Figure 23. I1 Pulse Current Width versus Temperature 33199 Analog Integrated Circuit Device Data Freescale Semiconductor 11 FUNCTIONAL DESCRIPTION INTRODUCTION FUNCTIONAL DESCRIPTION INTRODUCTION The MC33199 is a serial interface circuit used in diagnostic applications. It is the interface between the microcontroller and the special K and L lines of the ISO diagnostic port. The MC33199 has been designed to meet the «Diagnosis System ISO9141» specification. This product description will detail the functionality of the device (see Figure 2, 33199 Simplified Internal Block Diagram). First, the power supply and reference voltage generator will be discussed, then the paths functions between MCU, K and L lines will be detailed. A dedicated paragraph will tell about the special functionality of the I1 pin, which allow high Baud rates transmission. VCC (VCC) 5V typical power supply pin. Typical supply current is less than 1.5mA. REF-IN-L (REF-IN-L) Input reference for C2 comparator. This input can be connected directly to REF-OUT, with or without a resistor network, or to an external reference. REF-IN-K (REF-IN-K) Input reference for C1 comparator. This input can be connected directly to REF-OUT, with or without a resistor network, or to an external reference. LO (LO) Output of C2 comparator, normally connected to a microcontroller I/O. If L input > (REF-IN-L + Hyst/2) then output LO is in high state. If L< (REF-IN-L - Hyst/2) then output LO is in low state, output transistor ON. This pin is an open collector structure. A Pull up resistor should be added to VCC. Drive capability of this output is 5mA. RXD (RXD) Receive output, normally connected to a microcontroller I/ O. If DIA input > (REF-IN-L + Hyst/2) then output LO is in high state. If DIA < (REF-IN-L - Hyst/2) then output LO is in low state, output transistor ON. This pin has an internal pull up resistor to VCC (2Kohm typ). Drive capability of this output is 5mA TXD (TXD) Transmission input, is normally connected to a microcontroller I/O.This pin controls DIA output. If Txd is high, the output DIA transistor is OFF. If Txd is low the DIA output transistor is ON. DIA (DIA) circuit to VBAT (VS). When turning ON (TXD low), this pin will pull the Bus line to Gnd, the current into DIA will be internally limited to 60mA typ. The internal power transistor has a thermal shutdown circuit, which forces the DIA output OFF in case of over temperature. DIA is also the C1 comparator input. It is protected against both positive and negative over voltage by a 38V zener diode. This pin exhibits a constant input current of 7.5?A. GND (GND) Gnd reference for the entire device. I1 (I1) Bus source current pin. It is normally tied to DIA pin and to the Bus line. At static HIGH or LOW level Txd, the current source I1 delivers a current of 3mA (typ). Only during LOW to HIGH transition, does this current increase to a higher value in order to charge the key line capacitor (Cl<4nF) in a short time (see fig 3 and 4). L (L) Input for C2 comparator. This pin is protected against both positive and negative over voltage by a 38V zener diode. This L line is a second independent input. It can be used for wake up sequence in ISO diagnosis or as an additional input bus line. This pin exhibits a constant input current of 7.5μΑ. VS (VS) 12V typical, or Vbat supply pin for the device. This pin is protected against over voltage transients. REF-OUT (REF-OUT) Internal reference voltage generator output pin. Its value depends on Vs (Vbat) values. This output can be directly connected to REF-IN L and REF-IN-K, or through a resistor network. Maximum current capability is 50μΑ. Input / Output Diagnosis Bus line pin. This pin is an open collector structure, protected against over current and short 33199 12 Analog Integrated Circuit Device Data Freescale Semiconductor ARCHIVE INFORMATION ARCHIVE INFORMATION FUNCTIONAL PIN DESCRIPTION FUNCTIONAL DEVICE OPERATION POWER SUPPLIES AND REFERENCE VOLTAGE ARCHIVE INFORMATION The device has two power supplies : A 5V supply, VCC, normally connected to the MCU supply voltage. This pin sinks typically 1mA during operation. A VBAT supply voltage, VS, normally tied to the car battery voltage. This pin can sustain up to 40V DC. Care should be taken for reverse battery protection and transient voltages higher than 40V. The voltage reference generator is supplied from both VCC and VBAT. It provides reference voltage for the K and L lines comparators thresholds. The reference voltage is dependant on VBAT voltage : it is linear versus VBAT voltage, for VBAT from 5.6V to 18V. Below 5.6V and over 18V the reference voltage is clamped (see Figure 12). The reference is connected externally to the device, through REFOUT pin. It is available for other needs. It can supplied 50μΑ max (see Figure 13). PATH FUNCTIONS BETWEEN MCU, K AND L LINES The path function from the MCU to the K line is composed of a driver interfacing directly with the MCU through the TXD pin. The TXD pin is CMOS compatible. This driver controls a power transistor which can be turned ON or OFF. When it is ON, it pull the DIA pin low. This pin is known as K line in the ISO 9141 specification. The DIA pin structure is open collector, without pull up component. This allow the connection of several MC33199 on the K line and the use of a single pull up resistor per system (see Figure 25). In order to protect the DIA pin against short circuits to VBAT, the device incorporates a current limitation (see Figure 17) and a thermal shutdown. This current limitation will also act when the device drives a K line bus exhibiting large parasitic capacitor value (see Special functionality of I1 pin). The path from this DIA pin, or K line, to the MCU is done through a comparator. The comparator threshold voltage is connected to REF-IN-K pin. It can be tied to the REF-OUT voltage, if the VBAT dependant threshold is to be achieved. The second input of this comparator is internally connected to DIA pin. The output of the comparator is available on RXD output pin, normally connected to a MCU I/O port. RXD pin has a 2kOhms internal pull up resistor. The path from the L line, used during wake-up sequence of the transmission, to the MCU is done through a second comparator. The comparator threshold voltage is connected to REF-IN-L pin. As the REF-IN-K pin, it can be tied to the REFOUT voltage, if the VBAT dependant threshold need to be achieved. The second input of this comparator is internally connected to L pin. The output of the comparator is available on LO output pin, which is an open collector structure. LO is normally connected to a MCU I/O port. The DIA, and L pins can sustain up to 38V DC. Care should be taken for reverse battery protection and transient voltages higher than 38V. The DIA and L pins both have internal pull down current source of typically 7.5μΑ (see Figure 15). So the L line exhibits a 10μΑ pull down current. The DIA pin has the same behavior when it is in OFF state, that is when TXD is at logic high level. SPECIAL FUNCTIONALITY OF I1 PIN The MC33199 has a unique feature which allows the transmission Baud rate to be up to 200kBaud. In practice, the K line can be several meters long, and thus can have a large parasitic capacitor value. This parasitic capacitor value will slow down the low to high transition of the K line, and indeed will limit the Baud rate transmission. For the K line to go from low to high level, the parasitic capacitor need to be charged, and it can only be charged by the pull up resistor. A low pull up resistor value would result in fast charge time of the capacitor, but also in large output current, and large power dissipation in the driver. To avoid this problem, the MC33199 incorporates a dynamic current source, which is temporary activated at the low to high transition of the TXD pin, that is when the DIA pin or K line should switch from low to high level (see Figure 6 & Figure 7). This current source is available at I1 pin. It has a typical value of 80mA. It is activated for 4μs (see Figure 22 & Figure 23) and is automatically disabled after this time. During that time it will charge the K line parasitic capacitor. This extra current will quickly rise the K line voltage up to the Vbat, and will result in reduce rise time on the K line. With this feature the MC33199 can ensure Baud rate transmission of up to 200kBaud. During high to low transition on the K line, the parasitic capacitor of the bus line will be discharged by the output transistor of the DIA pin. In this case, the total current may exceed the internal current limitation of the DIA pin. If so, the current limitation will act, and discharge current will be limited to typically 60mA (See Figure 7 & Figure 17). If a high Baud rate is necessary, the I1 pin need to be connected to the DIA as shown in the typical application Figure 24. The I1 pin can also be left open, if the I1 functionality and high Baud rate are not suited in the application. ARCHIVE INFORMATION FUNCTIONAL DEVICE OPERATION 33199 Analog Integrated Circuit Device Data Freescale Semiconductor 13 TYPICAL APPLICATIONS TYPICAL APPLICATIONS +VBAT VCC : 5V Reference Generator Protection LO ARCHIVE INFORMATION C2 L + L Line - REF-IN-L I1 source REF-IN-K RXD RPU I1 TxD Vcc C1 + DIA K Line RxD Thermal Shutdown MCU TXD Driver GND SERVICE TESTER or End of Line manufacturer programmation or checking system Current Limit CAR ELECTRONIC CONTROL UNIT Figure 24. Logic Diagram and Application Schematic 33199 14 Analog Integrated Circuit Device Data Freescale Semiconductor ARCHIVE INFORMATION REF-OUT VS TYPICAL APPLICATIONS +Vbat RPU K Line MC33199 MCU ARCHIVE INFORMATION E.C.U # 1 SERVICE TESTER or End of Line manufacturer programmation or checking system ARCHIVE INFORMATION L Line CAR ISO DIAGNOSTIC CONNECTOR MC33199 MCU E.C.U # 2 CAR Other ECUs Fig 6 : Typical application with several ECUs Figure 25. Typical Application with Several ECUs +12V D2 100nF VBAT I1 D1 Schaffner Generator 2x1nF L DIA GND 2x330pF Figure 26. Test Circuit for Transient Schaffner Pulses Test pulses are directly applied to VS and via a capacitor of 1nF to DIA and L. The voltage VS is limited to -2V/38V by the transient suppressor diode D1. Pulses can occor simultaneously or separately. 33199 Analog Integrated Circuit Device Data Freescale Semiconductor 15 PACKAGING PACKAGE DIMENSIONS PACKAGING PACKAGE DIMENSIONS ARCHIVE INFORMATION ARCHIVE INFORMATION For the most current package revision, visit www.freescale.com and perform a keyword search using the “98A” listed below. D SUFFIX EF-SUFFIX (PB-FREE) PLASTIC PACKAGE 98ASB42565B ISSUE H 33199 16 Analog Integrated Circuit Device Data Freescale Semiconductor REVISION HISTORY REVISION HISTORY Date Description of Changes 2.0 8/2006 • • • • • Implemented Revision History page Added EF Pb-FREE suffix Revised Figure 1, Simplified Application Drawing. Converted to Freescale format and updated to the prevailing form and style Removed MC33199EF/R2 and replaced with MCZ33199EF/R2 in the Ordering Information block 3.0 9/2006 • Made unit label corrections on Transmission Speed, High or Low Bit Time, LO Output :, and I1 Output @ VS-I1 > 2.7V : on page 7. 4.0 10/2006 • Removed Peak Package Reflow Temperature During Reflow (solder reflow) parameter from Maximum Ratings on page 4. Added note with instructions to obtain this information from www.freescale.com. ARCHIVE INFORMATION ARCHIVE INFORMATION Revision 33199 Analog Integrated Circuit Device Data Freescale Semiconductor 17 Home Page: www.freescale.com E-mail: [email protected] USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370 1300 N. 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