MB15ExxSL Series
Single PLL Frequency Synthesizers
with On-Chip Prescalers
Packages
Description
The Fujitsu ExxSL series single PLLs are serial input frequency
synthesizers operating up to 2.5 GHz. They have built-in
dual-modulus prescalers enabling pulse swallow operation.
The latest advanced BiCMOS technology is used resulting in a
super low supply current. A refined charge pump design (Fujitsu’s
Super Charger) provides fast tuning along with low spurious
noise and phase noise characteristics. The E-series is ideally
suited for digital mobile communications, including GSM,
DCS1800, PCS1900, IS-136, IS-95 and ISM applications.
16-pin plastic SSOP,
FPT-16P-M05
(LCC-16P-M06)
16-pin
plastic BCC,
LCC-16P-M06
Features
• Very low spurious and phase noise characteristics
• Plastic 16-pin SSOP and 16-pin BCC packages
• Excellent lock-up time performance
• Reference counter:
– 14-bit programmable divider: 3 to 16383
• Low operating voltage: 2.4 to 3.6 volts
• Power-saving current: 0.1µA (typical)
• 18-bit programmable divider:
– Binary 7-bit swallow counter: 0 to 127
– Binary 11-bit programmable counter: 3 to 2047
• Selectable charge pump current (±1.5 or ±6.0 mA)
• Evaluation kits available
• Super low operating current: 2.5 to 4.0 mA (typical)
• Wide operating temperature: –40 to +85°C
Parameter
MB15E03SL
MB15E05SL
RF Frequency of Operation
1.2 GHz
2.0 GHz
Low Power Supply Voltage
2.7V
2.7V
2.7V
Low Power Supply Current
2.0 mA
3.0 mA
3.5 mA
Prescaler Divide Ratios
Power-Saving Function
64/65 or 128/129
MB15E07SL
2.5 GHz
32/33 or 64/65
0.1µA typ.
MB15ExxSL Series
Table of Contents
Pin Descriptions....................................................................................................................................................................2
Block Diagram......................................................................................................................................................................3
Absolute Maximum Ratings ....................................................................................................................................................4
Recommended Operating Conditions........................................................................................................................................4
Handling Precautions......................................................................................................................................................4
Electrical Characteristics ........................................................................................................................................................5
Measurement Circuit (fin, OSCin Input Sensitivity) ....................................................................................................................7
Typical Electrical Characteristics: MB15E03SL .........................................................................................................................8
Reference Information: MB15E03SL ...............................................................................................................................11
Typical Electrical Characteristics: MB15E05SL .......................................................................................................................12
Reference Information: MB15E05SL ...............................................................................................................................15
Typical Electrical Characteristics: MB15E07SL ...................................................................................................................... 16
Reference Information: MB15E07SL ...............................................................................................................................19
Functional Descriptions .......................................................................................................................................................20
Serial Data Input ..........................................................................................................................................................20
Table 1. Control Bit .....................................................................................................................................................20
Shift Register Configuration for the Programmable Reference Counter ..........................................................................20
Shift Register Configuration for the Programmable Counter ....................................................................................... 21
Table 2. Binary 14-Bit Programmable Reference Counter Data Setting ................................................................................21
Table 3. Binary 11-Bit Programmable Counter Data Setting ............................................................................................. 21
Table 4. Binary 7-Bit Swallow Counter Data Setting.........................................................................................................22
Table 5. Prescaler Data Setting ......................................................................................................................................22
Table 6. Phase Comparator Phase Switching Data Setting ................................................................................................ 22
Table 7. LD/fOUT Output Select Data Setting....................................................................................................................23
Table 8. Charge Pump Current Setting.............................................................................................................................23
Table 9. Do Output Impedance Pin Setting .......................................................................................................................23
Power-Saving Mode (Intermittent Mode Control Circuit) ..................................................................................................24
Table 10. Power-Save Pin Setting ....................................................................................................................................24
Serial Data Input Timing ...............................................................................................................................................25
Table 11. Timing Parameters ..........................................................................................................................................25
Phase Detector Output Waveform....................................................................................................................................26
Application Example ...........................................................................................................................................................27
Useage Precautions..............................................................................................................................................................28
Ordering Information ..........................................................................................................................................................28
Package Dimensions ............................................................................................................................................................29
Fujitsu Microelectronics, Inc.
1
Single PLL Frequency Synthesizers with On-Chip Prescalers
Pin Descriptions
Pin No.
SSOP
BCC
1
16
Pin Name
I/O
OSCIN
I
Descriptions
Programmable reference divider input
Oscillator input connection to a TCXO
2
1
OSCOUT
O
Oscillator output
3
2
VP
—
Power supply voltage input for the charge pump
4
3
VCC
—
Power supply voltage input
5
4
Do
O
Charge pump output
Phase of the charge pump can be selected via programming of the FC bit.
6
5
GND
—
Ground
7
6
Xfin
I
Prescaler complementary input which should be grounded via a capacitor.
8
7
fin
I
Prescaler input
Connection to an external VCO should be done via AC coupling.
9
8
Clock
I
Clock input for 19-bit shift register
Data is shifted into shift register on rising edge of the clock. (Open is prohibited.)
10
9
Data
I
Serial data input using binary code
Last bit of data is a control bit. (Open is prohibited.)
11
10
LE
I
Load enable signal input. (Open is prohibited.)
When LE is set high, data in the shift register is transferred to a latch according to control bit in the serial data.
12
11
PS
I
Power-saving mode control. Pin must be set at “L” at Power-ON. (Open is prohibited.)
PS = “H” sets normal mode. PS = “L” sets power-saving mode.
13
12
ZC
I
Forced high-impedance control for the charge pump (with internal pull up resistor)
ZC = “H” sets normal Do output. ZC = “L”; Do becomes high impedance.
14
13
LD/fOUT
O
Lock detect signal output (LD)/phase comparator monitoring output (fOUT)
The output signal is selected via programming of the LDS bit.
LDS = “H” outputs fOUT (fr/fp monitoring output).
LDS = “L” outputs LD (“H” = locked state, “L” = unlocked state).
15
14
φP
O
Phase comparator N-channel open drain output for an external charge pump. Phase can be selected via programming
of the FC bit.
16
15
φR
O
Phase comparator CMOS output for an external charge pump. Phase can be selected via programming of the FC bit.
16-pin SSOP
OSCIN
1
16
φR
OSCOUT
2
15
φP
VP
3
14
LD/fOUT
VCC
4
DO
5
TOP 13
VIEW 12
Fujitsu Microelectronics, Inc.
ZC
OSCIN φR
OSCOUT
1
VP
2
VCC
PS
DO
3
4
GND
5
Xfin
6
GND
6
11
LE
Xfin
7
10
Data
fin
8
9
Clock
FPT-16P-M05
2
16-pad BCC
16 15
TOP
VIEW
7
14
13
12
11
10
8
9
fin Clock
LCC-16P-M06
φP
LD/fOUT
ZC
PS
LE
Data
MB15ExxSL Series
Block Diagram
fr
(16)
OSCIN 1
Crystal
oscillator
circuit
Phase
comparator
(15)
16 R
(14)
15 P
(1)
OSCOUT 2
Binary 14-bit
reference counter
SW FC LDS CS
14-bit latch
4-bit latch
(2)
VP 3
Lock
detector
fp
LD/fr/fp
selector
(13)
14 LD fOUT
..
VCC
C
N
T
(3)
4
19-bit shift register
Charge pump
DO
(4)
5
Current switch
...
7-bit latch
Binary 7-bit
swallow counter
(12)
13 ZC
...
11-bit latch
Binary 11-bit
programmable
counter
Intermittent
mode control
(power save)
(11)
12 PS
(10)
11 LE
(5)
GND 6
1-bit
control
latch
(6)
Xfin 7
MD
(9)
10 Data
Prescaler
E03, E05: 64/65,
128/129
E07: 32/33,
64/65
(7)
fin 8
(8)
9 Clock
: SSOP
(
) : BCC
Fujitsu Microelectronics, Inc.
3
Single PLL Frequency Synthesizers with On-Chip Prescalers
Absolute Maximum Ratings
Parameter
Power supply voltage
Input voltage
Output voltage
Storage temperature
Symbol
Rating
Condition
Min.
Unit
Max.
VCC
–
–0.5
4.0
VP
–
VCC
6.0
V
VI
–
–0.5
VCC +0.5
V
Remark
V
VO
Except Do
GND
VCC
V
VO
Do
GND
VP
V
Tstg
–
–55
+125
°C
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these
ratings.
Recommended Operating Conditions
Parameter
Power supply voltage
Symbol
Value
Unit
Min.
Typ.
Max.
VCC
2.4
3.0
3.6
V
VP
VCC
–
5.5
V
Input voltage
VI
GND
–
VCC
V
Operating temperature
Ta
–40
–
+85
°C
Remark
WARNING: Recommended operating conditions are normal operating ranges for the semiconductor device. All the device’s electrical characteristics are warranted when operated within these
ranges. Always use semiconductor devices within the recommended operating conditions. Operation outside these ranges may adversely affect reliability and could result in
device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed
conditions are advised to contact their Fujitsu representative beforehand.
Handling Precautions
• This device should be transported and stored in anti-static containers.
• This is a static-sensitive device; take proper anti-ESD precautions. Ensure that personnel and equipment are properly grounded.
Cover workbenches with grounded conductive mats.
• Always turn the power supply off before inserting or removing the device from its socket.
• Protect leads with a conductive sheet when handling or transporting PC boards with devices.
4
Fujitsu Microelectronics, Inc.
MB15ExxSL Series
Electrical Characteristics
Device Specifications
VCC = 2.4 to 3.6 V, Ta = –40 to +85°C
Parameter
Symbol
MB15E03SL
MB15E05SL
MB15E07SL
Power supply current
ICCRF*1
2.0 mA
3.0 mA
3.5 mA
Power-saving current
IPSRF*2
0.1µA
0.1µA
0.1µA
0.1 - 1.2 GHz
0.1 - 2.0 GHz
0.1 - 2.5 GHz
3 - 40 MHz
3 - 40 MHz
3 - 40 MHz
finRF
Operating frequency
OSCin*3
General Specifications
Parameter
Input sensitivity
Input voltage
Input current
Symbol
Max.
–15
–
+2
dBm
Vp-p
VOSC
–
0.5
–
VCC
Data, Clock,
LE, PS, ZC
VIH
–
VCC × 0.7
–
–
VIL
–
–
–
VCC × 0.3
Data, Clock,
LE, PS
IIH*4
–
–1.0
–
1.0
IIL*4
–
–1.0
–
1.0
IIH
–
0
–
100
IIL*4
–
–100
–
0
IIH
–
–1.0
–
1.0
–100
–
0
V
µA
µA
µA
IIL*4
Pull up input
VOL
Open drain output
–
–
0.4
VOH
VCC = VP = 3.0V, IOH = –1 mA
VCC –0.4
–
–
VOL
VCC = VP = 3.0V, IOL = 1 mA
–
–
0.4
VDOH
VCC = VP = 3.0V, IOH = –0.5 mA
VCC –0.4
–
–
VDOL
VCC = VP = 3.0V, IOL = 0.5 mA
–
–
0.4
Do
IOFF
VCC = VP = 3.0V
VOFF = .5V to VP-0.5V
–
–
2.5
φP
IOL
Open drain output
1.0
–
–1.0
mA
IOH*4
VCC = 3.0V
–
–
–
mA
IOL
VCC = 3.0V
1.0
–
–
mA
CS bit = “H”
–
–6.0
–
mA
IDOH*4
VCC = VP = 3.0 ,
VDOH = VP/2,
Ta = +25°C
CS bit = “L”
–
–1.5
–
mA
VCC = VP = 3.0V,
VDOL= VP/2,
Ta = +25°C
CS bit = “H”
–
6.0
–
mA
IDOL
CS bit = “L”
–
1.5
–
mA
IDOL/IDOH
IDOMT*5
VDO = VCC/2
–
3
–
%
vs VDO
IDOVD*6
0.5V ≤ VDO ≤ VCC – 0.5V
–
10
–
%
IDOTA*7
–40°C ≤ Ta ≤ +85°C,
VDO = VCC/2
–
10
–
%
φR, LD/fOUT
Do
φR, LD/fOUT
Output current
Do
Charge pump current
characteristics
Typ.
OSCIN
OSCIN
Unit
Min.
50Ω load system
(Refer to measurement circuit.)
φP
High impedance cutoff
current
Value
PfinRF
finRF
ZC
Output voltage
Condition
vs Ta
V
V
V
nA
Note: See footnotes on next page.
Fujitsu Microelectronics, Inc.
5
Single PLL Frequency Synthesizers with On-Chip Prescalers
*1
*2
*3
*4
*5
*6
*7
Conditions: fosc = 12 MHz, Ta = +25°C in locking state, VCC = 2.7 V
VCCIF = VCCRF = 3.0 V, fosc = 12.8 MHz, Zc = “H” or open, Ta = +25°C in power-saving mode
AC coupling. 1000pF capacitor is connected under the condition of minimum operating frequency.
The symbol “–” (minus) means direction of current flow.
VCC = 3.0 V, Ta = +25°C (|I3| – |I4|)/[(|I3| + |I4|)/2] × 100(%)
VCC = 3.0 V, Ta = +25°C [(|I2| – |I1|)/2]/[(|I1| + |I2|)/2] × 100(%) (Applied to each IDOL, IDOH)
VCC = 3.0 V, [|IDO(85°C) – IDO(–40°C)|/2]/[|IDO(85°C) + IDO(–40°C)|/2] × 100(%) (applied to each IDOL, IDOH)
I1
I3
I2
IDOL
IDOH
I4
I2
I1
0.5
Vcc/2
Vcc − 0.5 V Vcc
Charge Pump Output Voltage (V)
6
Fujitsu Microelectronics, Inc.
MB15ExxSL Series
Measurement Circuit (For Measuring Input Sensitivity of fin and OSCIN)
1000 pF
0.1 µF
1000 pF
0.1 µF
1000 pF
S•G
S•G
50 Ω
fin
Xfin GND
DO
VCC
VP OSCOUT OSCIN
8
7
6
5
4
3
2
1
9
10
11
12
13
14
15
16
Clock Data LE
PS
ZC LD/fout φP
φR
VCC
50 Ω
Oscilloscope
Controller (setting divide ratio)
Note: 16-pin SSOP
Fujitsu Microelectronics, Inc.
7
Single PLL Frequency Synthesizers with On-Chip Prescalers
Typical Electrical Characteristics: MB15E03SL
Input Sensivity of fIN Versus Input Frequency
Input sensitivity − Input frequency (Prescaler 64/65)
Input sensitivity
sensitivity Pfin
Vfin (dBm)
(dBm)
Input
Ta = +25 °C
;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;
10
0
SPEC
−10
−20
VCC = 2.4 V
−30
VCC = 2.7 V
VCC = 3.0 V
−40
VCC = 3.6 V
−50
0
500
1000
1500
2000
Input frequency fin (MHz)
Input Sensivity of OSCIN versus Input Frequency
Input sensitivity − Input frequency
Input
sensitivity
VOSC
(dBm)
Input
sensitivity
Posc
(dBm)
10
;;;;;
;;;;;
Ta = +25 °C
SPEC
0
−10
−20
−30
VCC = 2.4 V
−40
VCC = 3.0 V
−50
VCC = 3.6 V
−60
0
50
Input frequency fOSC (MHz)
8
Fujitsu Microelectronics, Inc.
100
MB15ExxSL Series
Typical Electrical Characteristics: MB15E03SL
Input Impedance
1 : 297.63 Ω
−656.53 Ω
100 MHz
2 : 24.523 Ω
−185.55 Ω
400 MHz
3 : 9.3789 Ω
−77.168 Ω
800 MHz
fin Pin
4 : 10.188 Ω
−33.143 Ω
1.2 GHz
1
2
4
3
START 100.000 000 MHz
STOP 1 200.000 000 MHz
1:
9.063 kΩ
−3.113 kΩ
3 MHz
2:
3.8225 Ω
−4.6557 kΩ
10 MHz
3:
1.5735 Ω
−3.2154 kΩ
20 MHz
1
3
3 4:
405.69 Ω
−1.8251 kΩ
40 MHz
4
OSCIN Pin
START 3.000 000 MHz
STOP 40.000 000 MHz
Fujitsu Microelectronics, Inc.
9
Single PLL Frequency Synthesizers with On-Chip Prescalers
Typical Electrical Characteristics: MB15E03SL
Do ouput current: 1.5 mA mode
VDO − IDO
Ta = +25 °C
Charge pump output current IDO (mA)
10.00
VCC = 3.0 V
Vp = 3.0 V
2.000
/div
IOL
0
IOH
− 10.00
0
4.800
.6000/div
Charge pump output voltage VDO (V)
Do ouput current: 6.0 mA mode
VDO − IDO
Ta = +25 °C
Charge pump output current IDO (mA)
10.00
VCC = 3.0 V
Vp = 3.0 V
IOL
2.000
/div
0
IOH
− 10.00
0
.6000/div
Charge pump output voltage VDO (V)
10
Fujitsu Microelectronics, Inc.
4.800
MB15ExxSL Series
Reference Information: MB15E03SL
Test Circuit
S.G
fVCO = 810.45 MHz
KV = 17 MHz/V
fr = 25 kHz
fOSC = 14.4 MHz
LPF
OSCIN
LPF
Do
fin
4700 pF
Spectrum
Analyzer
VCO
VCC =VP = 3.0 V
VVCO = 2.3 V
Ta = +25 °C
CP : 6 mA mode
9.1 kΩ
4.2 kΩ
1500 pF
0.047 µF
Typical plots measured with the test circuit are shown below. The plots show lock up time, phase noise and reference leakage.
PLL Phase Noise
@ max within loop band = -73.0 dBc/Hz
PLL Reference Leakage
@ 25 kHz offset = -79.8 dBc
ATTEN
10 dB
RL − 5.0 dBm
∆MKR − 79.83 dB
25.0 kHz
ATTEN
10 dB
RL − 5.0 dBm
73.0 dBc/Hz
79.8 dBc
CENTER 810.42500 MHz
1.0 kHz
VBW 1.0 kHz
* RBW
∆MKR − 53.00 dB
2.23 kHz
SPAN 200.0 kHz
1.00 sec
CENTER 810.42500 MHz
100 Hz
VBW 100 Hz
* SWP
PLL Lock Up Time = 1.4 ms
(810.425 MHz → 826.425 MHz, within ± 1kHz)
* RBW
SPAN 20.00 kHz
3.00 sec
* SWP
PLL Lock Up Time = 1.52 ms
(826.425 MHz → 810.425 MHz, within ± 1kHz)
826.430
830.00500
MHz
MHz
810.430
830.00500
MHz
MHz
2.00
2.00
KHz/div
KHz/div
2.00
2.00
KHz/div
KHz/div
829.99500
826.420
MHz
MHz
829.99500
810.420
MHz
MHz
5.0000000 ms
5.0000000 ms
Fujitsu Microelectronics, Inc.
11
Single PLL Frequency Synthesizers with On-Chip Prescalers
Typical Electrical Characteristics: MB15E05SL
Input Sensivity of fIN Versus Input Frequency
Input sensitivity − Input frequency
Input
Inputsensitivity
sensitivityPfin
Vfin(dBm)
(dBm)
10
Ta = +25 °C
;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;
0
SPEC
−10
−20
VCC = 2.4 V
−30
VCC = 2.7 V
VCC = 3.0 V
−40
VCC = 3.6 V
−50
0
200
400
600
800
1000
1200
1400
1600
1800
2000
2200
2400
2600
2800
3000
Input frequency fin (MHz)
Input Sensivity of OSCIN Versus Input Frequency
10
;;;;;;
;;;;;;
Input sensitivity − Input frequency
Ta = +25 °C
Input
sensitivity
VOSC
(dBm)
Input
sensitivity
Posc
(dBm)
SPEC
0
−10
−20
−30
−40
VCC = 2.4 V
VCC = 3.0 V
−50
VCC = 3.6 V
−60
0
12
Fujitsu Microelectronics, Inc.
50
100
Input frequency fOSC (MHz)
150
200
MB15ExxSL Series
Typical Electrical Characteristics: MB15E05SL
Input Impedance
1 : 20.219 Ω
−161.11 Ω
500 MHz
2:
9.625 Ω
−64.082 Ω
1 GHz
3 : 17.807 Ω
−23.918 Ω
1.5 GHz
fin Pin
4 : 30.647 Ω
−18.134 Ω
2.0 GHz
4
3
1
2
START
100.000 000 MHz
STOP 2 000.000 000 MHz
1 : 8.0005 kΩ
−1.9708 kΩ
3 MHz
2 : 4.1825 kΩ
−3.9273 kΩ
10 MHz
4
OSCIN Pin
3 : 1.8909 kΩ
−3.2791 kΩ
20 MHz
3
573 Ω
12 4 :
−1.9271 kΩ
40 MHz
START
3.000 000 MHz
STOP
40.000 000 MHz
Fujitsu Microelectronics, Inc.
13
Single PLL Frequency Synthesizers with On-Chip Prescalers
Typical Electrical Characteristics: MB15E05SL
Do ouput current: 1.5 mA mode
VDO − IDO
Ta = +25 °C
VCC = 3.0 V
Vp = 3.0 V
Charge pump output current IDO (mA)
10.00
2.000
/div
IDOL
0
IDOH
−10.00
0
VO
.6000/div (V)
Charge pump output voltage VDO (V)
4.800
Do ouput current: 6.0 mA mode
VDO − IDO
Ta = +25 °C
VCC = 3.0 V
Vp = 3.0 V
Charge pump output current IDO (mA)
10.00
IDOL
2.000
/div
0
IDOH
−10.00
0
VO
14
Fujitsu Microelectronics, Inc.
.6000/div (V)
Charge pump output voltage VDO (V)
4.800
MB15ExxSL Series
Reference Information: MB15E05SL
S.G
OSCIN
LPF
Do
fin
VCC =V25.0
MHz 10 dB/
P = 3.0
kHz V
KV = 28 MHz/V
VVCO = 2.1 V
fr = 25 kHz
Ta = +25 °C
fOSC = 14.4 MHz
CP : 6 mA mode
LPF
9.1 kΩ
5.6 kΩ
3300 pF
Spectrum
Analyzer
∆MKR −70.50 dB
ATTEN 10 dB
VCO =dBm
1607
RL f−10.0
Test Circuit
VCO
1500 pF
33000 pF
Typical plots measured with the test circuit are shown below. The plots show lock up time, phase noise and reference leakage.
RF PLL Reference Leakage
@ 25 kHz offset = -70.5 dBc
ATTEN 10 dB
RL −10.0 dBm
10 dB/
∆MKR −70.50 dB
25.0 kHz
PLLGHz
Phase Noise
CENTERRF
1.6070000
SPAN 200.0 kHz
1.0 kHz
RBW 1.0 kHz
500 ms
@ max
within loopVBW
band
= -65 SWP
dBc/Hz
ATTEN 10 dB
RL −10.0 dBm
∆MKR −45.00 dB
2.20 kHz
10 dB/
-65 dBc/Hz
-70.5 dBc
CENTER 1.6070000 GHz
VBW 1.0 kHz
RBW 1.0 kHz
ATTEN 10 dB
RL −10.0 dBm
SPAN 200.0 kHz
SWP 500 ms
PLL Lock Up
time
∆MKR
−45.00 dB
10 dB/
2.20 kHz
RF PLL Lock
Up Time
= 1.46 ms
1607 MH→1631 MHz within ± 1 kHz
(1607.000
MHz
→
1631.000
MHz,
within ± 1kHz)
Lch→Hch
1.46 ms
CENTER 1.6070000 GHz
VBW 100 Hz
RBW 100 Hz
PLL Lock Up time
RF PLL Lock Up Time = 1.37 ms
1631 MH→1607 MHz within ± 1 kHz
(1631.000
MHz → 1.37
1607.000
MHz, within ± 1kHz)
Hch→Lch
ms
1.631005000 GHz
1.607005000 GHz
1.631001000 GHz
1.607001000 GHz
CENTER 1.6070000 GHz
VBW 100 Hz
RBW 100 Hz
1.630097000 GHz
SPAN 20.00 kHz
SWP 1.60 sec
500.0 µs/div
SPAN 20.00 kHz
SWP 1.60 sec
1.606997000 GHz
500.0 µs/div
Fujitsu Microelectronics, Inc.
15
Single PLL Frequency Synthesizers with On-Chip Prescalers
Typical Electrical Characteristics: MB15E07SL
Input Sensivity of fIN Versus Input Frequency
Input sensitivity – Input frequency (Prescaler: 64/65)
Ta = +25 °C
Input sensitivity Pfin (dBm)
20
10
0
SPEC
–10
–20
VCC = 2.4 V
–30
VCC = 3.0 V
–40
VCC = 3.6 V
–50
0
200
400
600
800
1000 1200 1400 1600 1800 2000 2200 2400 2600 2800 3000
Input frequency fin (MHz)
Input Sensivity of fIN Versus Input Frequency
Input sensitivity – Input frequency (Prescaler: 32/33)
10
Ta = +25 °C
Input sensitivity Pfin (dBm)
0
SPEC
–10
–20
–30
VCC = 2.7 V
VCC = 3.0 V
–40
VCC = 3.6 V
–50
0
200
400
600
800
1000
1200
1400
1600
1800 2000
2200
2400
2600
2800 3000
Input frequency fin (MHz)
Input Sensivity of OSCIN Versus Input Frequency
Ta = +25 °C
Input sensitivity – Input frequency
10
Input sensitivity POSC (dBm)
SPEC
0
–10
–20
–30
VCC = 2.4 V
–40
VCC = 3.0 V
–50
VCC = 3.6 V
–60
0
16
Fujitsu Microelectronics, Inc.
50
100
Input frequency fOSC (MHz)
150
200
MB15ExxSL Series
Typical Electrical Characteristics: MB15E07SL
Input Impedance
1 : 12.646 Ω
–57.156 Ω
1 GHz
2 : 22.156 Ω
–12.136 Ω
1.5 GHz
4
3 : 33.805 Ω
11.869 Ω
2 GHz
fin Pin
4 : 23.715 Ω
8.9629 Ω
2.5 GHz
3
2
1
START
500.000 000 MHz
STOP 2 500.000 000 MHz
1:
9.917 Ω
–3.643 Ω
3 MHz
2 : 3.7903 Ω
–4.812 Ω
10 MHz
3:
4
OSCIN Pin
1.574 Ω
–3.4046 Ω
20 MHz
3
12 4 : 453.12 Ω
–1.9213 Ω
40 MHz
START
1.000 000 MHz
STOP
50.000 000 MHz
Fujitsu Microelectronics, Inc.
17
Single PLL Frequency Synthesizers with On-Chip Prescalers
Typical Electrical Characteristics: MB15E07SL
Do ouput current: 1.5 mA mode
VDO - IDO
Ta = +25°C
VCC = 3.0 V
Vp = 3.0 V
Charge pump output current IDO (mA)
10.00
2.000
/div
IDOL
0
IDOH
–10.00
0
4.800
.6000/div
Charge pump output voltage VDO (V)
Do ouput current: 6.0 mA mode
VDO - IDO
Ta = +25°C
VCC = 3.0 V
Vp = 3.0 V
Charge pump output current IDO (mA)
10.00
IDOL
2.000
/div
0
IDOH
–10.00
0
4.800
.6000/div
Charge pump output voltage VDO (V)
18
Fujitsu Microelectronics, Inc.
MB15ExxSL Series
Reference Information: MB15E07SL
Test Circuit
S.G
fVCO = 810.45 MHz
KV = 17 MHz/V
fr = 25 kHz
fOSC = 14.4 MHz
LPF
OSCIN
LPF
Do
fin
4700 pF
Spectrum
Analyzer
VCO
VCC =VP = 3.0 V
VVCO = 2.3 V
Ta = +25 °C
CP : 6 mA mode
9.1 kΩ
4.2 kΩ
1500 pF
0.047 µF
Typical plots measured with the test circuit are shown below. The plots show lock up time, phase noise and reference leakage.
PLL Reference Leakage
@ 25 kHz offset = -78 dBc
REF –5.0 dBm
10 dB/
ATT 10 dB
MKR
PLL Phase Noise
@ max within loop band = -73.1 dBc/Hz
25.0 kHz
–78.0 dB
REF –5.0 dBm
10 dB/
ATT 10 dB
MKR
2.28 kHz
–53.1 dB
-73.1 dBc/Hz
-78.0 dBc
RBW
1 kHz
SAMPLE
VBW
1 kHz
SWP 1.0 s
SPAN 200 kHz
CENTER 810.000 MHz
PLL Lock Up Time = 1.3 ms
(810.000 MHz → 826.000 MHz, within ± 1kHz)
RBW
100 Hz
SAMPLE
VBW
100 Hz
SWP 10 s
CENTER 810.000 MHz
PLL Lock Up Time = 1.28 ms
(826.000 MHz → 810.000 MHz, within ± 1kHz)
826.004000 MHz
810.004000MHz
826.000000 MHz
810.000000MHz
825.996000 MHz
809.996000MHz
500.0 µs/div
SPAN 20.0 kHz
500.0 µs/div
Fujitsu Microelectronics, Inc.
19
Single PLL Frequency Synthesizers with On-Chip Prescalers
Functional Descriptions
Serial Data Input
The VCO output frequency can be calculated using the following
equation:
Serial data is entered using the Data, Clock and LE pins. The serial
data controls the programmable reference counters and the
programmable counters separately.
fVCO = {(M x N) + A} x fOSC ÷ R (A < N)
Binary serial data is entered through the Data pin when the LE pin
is held low. One bit of data is shifted into the shift register on the
rising edge of the Clock. When the LE signal pin is taken high,
entered data is latched into the appropriate counters according to
the control bit settings as follows:
fVCO Output frequency of external voltage controlled ocillator (VCO)
M
Preset divide ratio of dual modulus prescaler (64 or 128 for
MB15E03SL, MB15E05SL) (32 or 64 for MB15E07SL)
N
Preset divide ratio of binary 11-bit programmable counter
(3 to 2,047)
A
Preset divide ratio of binary 7-bit swallow counter (0 ≤ A ≤ 127)
fOSC Reference oscillation frequency
R
Preset divide ratio of binary 14-bit programmable reference
counter (3 to 16,383)
Table 1. Control Bits
Control Bit (CNT)
Destination of Serial Data
H
Programmable reference counter latch
L
Programmable counter latch
Shift Register Configuration
Programmable Reference Counter
LSB
MSB
Data Flow
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
C
N
T
R
1
R
2
R
3
R
4
R
5
R
6
R
7
R
8
R
9
R
10
R
11
R
12
R
13
R
14
SW
FC
LDS
CS
CNT
R1 to R14
SW
FC
LDS
CS
Control bit
Divide ratio setting bits for the programmable reference counter (3 to 16,383)
Divide ratio setting bit for the prescaler
Phase control bit for the phase comparator
LD/fOUT signal select bit
Charge pump current select bit
Note: Input data with MSB first.
20
Fujitsu Microelectronics, Inc.
[Table 1]
[Table 2]
[Table 5]
[Table 6]
[Table 7]
[Table 8]
MB15ExxSL Series
Functional Descriptions
Shift Register Configuration
Programmable Counter
MSB
LSB
Data Flow
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
C
N
T
A
1
A
2
A
3
A
4
A
5
A
6
A
7
N
1
N
2
N
3
N
4
N
5
N
6
N
7
N
8
N
9
N
10
N
11
CNT
N1 to N11
A1 to A7
Control bit
Divide ratio setting bits for the programmable counter (3 to 2,047)
Divide ratio setting bits for the swallow counter (0 to 127)
[Table 1]
[Table 3]
[Table 4]
Note: Input data with MSB first.
Table 2. Binary 14-Bit Programmable Reference Counter Data Setting
Divide
ratio
(R)
R
14
R
13
R
12
R
11
R
10
R
9
R
8
R
7
R
6
R
5
R
4
R
3
R
2
R
1
3
0
0
0
0
0
0
0
0
0
0
0
0
1
1
4
0
0
0
0
0
0
0
0
0
0
0
1
0
0
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
16383
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Note: Divide ratio less than 3 is prohibited.
Table 3. Binary 11-Bit Programmable Counter Data Setting
Divide
ratio
(N)
N
11
N
10
N
9
N
8
N
7
N
6
N
5
N
4
N
3
N
2
N
1
3
0
0
0
0
0
0
0
0
0
1
1
4
0
0
0
0
0
0
0
0
1
0
0
.
.
.
.
.
.
.
.
.
.
.
.
2047
1
1
1
1
1
1
1
1
1
1
1
Note: Divide ratio less than 3 is prohibited.
Fujitsu Microelectronics, Inc.
21
Single PLL Frequency Synthesizers with On-Chip Prescalers
Functional Descriptions
Table 4. Binary 7-Bit Swallow Counter Data Setting
Divide
Ratio
(A)
A
7
A
6
A
5
A
4
A
3
A
2
A
1
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
1
.
.
.
.
.
.
.
.
127
1
1
1
1
1
1
1
Note: Divide ratio (A) range = 0 to 127
Table 5. Prescaler Data Setting for MB15E03SL, MB15E05SL (SW Bit)
SW
Prescaler Dived Ratio
H
64/65
L
128/129
Prescaler Data Setting for MB15E07SL (SW Bit)
SW
Prescaler Dived Ratio
H
32/33
L
64/65
Relationship Between the FC Input and Phase Characteristics
The FC bit changes the phase characteristics of the phase comparator. Both the internal charge pump output level (D O) and the phase
comparator output (fr, fp) are reversed according to the FC bit setting. Also, the monitor pin (f OUT) output is controlled by the FC bit.
The relationship between the FC bit setting and each of DO, fr, and fp is shown below.
Table 6. FC Bit Data Setting (LDS = “H”)
FC = High
Do
fP
fr > fP
H
L
L
fr < fP
L
H
Z*
fr = fP
Z*
L
Z*
* High impedance
22
fR
FC = Low
Fujitsu Microelectronics, Inc.
LD/fout
Do
fR
fP
L
H
Z*
fout = fr
H
L
L
Z*
L
Z*
LD/fout
fout = fp
MB15ExxSL Series
Functional Descriptions
PLL
LPF
VCO
(1)
VCO
Output
Frequency
(2)
LPF Output Voltage
(1) When the LPF and VCO characteristics are similar to (1), set the FC bit high.
(2) When the VCO characteristics are similar to (2), set the FC bit low.
Table 7. LD/fOUT Output Select Data Setting (LDS Bit)
LDS
LD/fOUT Output Signal
H
fOUT signals
L
LD signals
Table 8. Charge Pump Current Setting (CS Bit)
CS
Current Value
H
± 6.0 mA
L
± 1.5 mA
Table 9. Do Output Impedance Pin Setting (ZC Pin)
CS
Do Output
H
Normal output
L
High impedance
Fujitsu Microelectronics, Inc.
23
Single PLL Frequency Synthesizers with On-Chip Prescalers
Functional Descriptions
Power-Saving Mode (Intermittent Mode Control)
The Intermittent Mode Control circuit greatly reduces the PLL
power consumption by shutting down various internal functions,
depending upon the settings of the power-save (PS) pins. (See the
Electrical Characteristics chart for the specific value of current when
the device is in the power-saving mode.) In this mode, the phase
detector output, Do, becomes high impedance.
The intermittent mode control circuit also ensures a smooth startup
when the device returns to normal operation, at which time the phase
comparator output signal is unpredictable due to the unknown
relationship between the comparison frequency (fp) and the reference
frequency (fr). This can cause a major change in the comparator
output, resulting in a VCO frequency jump and an increase in lockup time.
To prevent this the Intermittent Mode Control circuit limits the
magnitude of the error signal from the phase detector when it returns
to normal operation.
Setting the PS pin high releases the power-saving mode, returning
the selected PLL to normal operation.
When power (VCC) is first applied, the device must be in standby mode, PS = Low, for at least 1µs.
Table 10. Power Save Pin Setting (PS Pins)
PS Pins
Status
H
Normal mode
L
Power saving mode
OFF
Power-ON Timing
VCC
ON
tV ≥ 1 µS
Clock
Data
LE
tPS ≥ 100 nS
PS
(1)
(1) PS = L (power-saving mode) at Power ON
(2) Set serial data 1 µs later after power supply remains stable (VCC > 2.2V).
(3) Release power-saving mode (PS: L → H) 100 ns later after setting serial data.
24
Fujitsu Microelectronics, Inc.
(2)
(3)
MB15ExxSL Series
Serial Data Input Timing
2nd. data
1st. data
Control bit
Data
MSB
Invalid data
LSB
Clock
t1
t2
t5
t4
t7
LE
t3
t6
Table 11. Timing Parameters
Parameter
Min.
Typ.
Max.
Unit
Parameter
Min.
Typ.
Max.
Unit
t1
20
–
–
ns
t5
100
–
–
ns
t2
20
–
–
ns
t6
20
–
–
ns
t3
30
–
–
ns
t7
100
–
–
ns
t4
30
–
–
ns
On the rising edge of the clock, one bit of the data is transferred into the shift register.
Note: LE should be “L” when the data is transferred into the shift register.
Fujitsu Microelectronics, Inc.
25
Single PLL Frequency Synthesizers with On-Chip Prescalers
Phase Detector Output Waveform
fr
fp
tWU
tWL
LD
(FC bit = High)
H
Do
Z
L
(FC bit = Low)
Do
Notes:
26
Z
1) Phase error detection range: –2π to +2π
2) Pulses on Do signal during locked state are output to prevent dead zone.
3) LD output becomes low when phase is tWU or more. LD output becomes high when phase error is tWL
or less and continues to be so for three cycles or more.
4) tWU and tWL depend on OSCIN input frequency.
tWU > 2/fosc (s) (e. g. tWU > 156.3ns, fosc = 12.8MHz)
tWU < 4/fosc (s) (e. g. tWL < 312.5ns, fosc = 12.8MHz)
5) LD becomes high during the power-saving mode (PS = “L”).
Fujitsu Microelectronics, Inc.
MB15ExxSL Series
Application Example
VP
10 kΩ
OUTPUT
VCO
LPF
12 kΩ
12 kΩ
10 kΩ
Lock Det.
From
a controller
φR
φP
LD/fout
ZC
PS
LE
Data
Clock
16
15
14
13
12
11
10
9
MB15ExxSL
MB15E05SL
1
2
3
4
5
6
7
8
OSCIN
OSCOUT
VP
VCC
DO
GND
Xfin
fin
1000 pF
1000 pF
1000 pF
0.1 µF
0.1 µF
TCXO
VP: 5.5V Max
Notes:
1) 16-pin SSOP
2) In case of using a crystal resonator, it is necessary to optimize matching between the crystal and this device, and it is advised to perform a
detailed system evaluation. It is also recommended to consult with the supplier of the crystal resonator. (The reference oscillator circuit provides
its own bias)
Fujitsu Microelectronics, Inc.
27
Single PLL Frequency Synthesizers with On-Chip Prescalers
Usage Precautions
To protect against damage by electrostatic discharge, note the following handling precautions:
• Store and transport devices in conductive containers.
• Use properly grounded workstations, tools and equipment.
• Turn off power before inserting or removing this device into or from a socket.
• Protect leads with conductive sheet when transporting a board mounted device.
Ordering Information
28
Part Number
Package
MB15ExxSLPFV1
16 pin, Plastic SSOP (FPT-16P-M05)
MB15ExxSLPV1
16 pin, Plastic BCC (LCC-16P-M06)
Fujitsu Microelectronics, Inc.
MB15ExxSL Series
Package Dimensions
+0.20
* 5.00±0.10(.197±.004)
1.25 –0.10
+.008
.049 –.004
(Mounting height)
0.10(.004)
INDEX
* 4.40±0.10
(.173±.004)
0.65±0.12
(.0256±.0047)
4.55(.179)REF
+0.10
6.40±0.20
(.252±.008)
5.40(.213)
NOM
"A"
+0.05
0.22 –0.05
0.15 –0.02
+.004
–.002
.006 –.001
.009
Details of "A" part
+.002
0.10±0.10(.004±.004)
(STAND OFF)
0
10°
0.50±0.20
(.020±.008)
Dimensions in mm (inches)
Note: 16-pin, Plastic SSOP (FPT-16P-M05)
*These dimensions do not include resin protrusion.
Fujitsu Microelectronics, Inc.
29
Single PLL Frequency Synthesizers with On-Chip Prescalers
Package Dimensions
4.55±0.10
(.179±.004)
0.80(.031)MAX
Mounting height
14
3.40(.134)TYP
0.65(.026)
TYP
0.40±0.10
(.016±.004)
9
0.325±0.10
(.013±.004)
9
14
0.80(.031)
REF
INDEX AREA
3.40±0.10
(.134±.004)
2.45(.096)
TYP
"A"
1
6
0.075±0.025
(.003±.001)
(Stand off)
1.725(.068)
REF
6
Details of "A" part
0.75±0.10
(.030±.004)
Details of "B" part
0.60±0.10
(.024±.004)
0.05(.002)
0.40±0.10
(.016±.004)
0.60±0.10
(.024±.004)
Dimensions in mm (inches)
Note: 16-pad, Plastic BCC (LCC-16P-M06)
30
Fujitsu Microelectronics, Inc.
1.15(.045)
REF
"B"
1
©2001 Fujitsu Microelectronics, Inc. All rights reserved.
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owned by Fujitsu Limited, its subsidiaries, or Fujitsu
Microelectronics, Inc.
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products or specifications without notice.
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without prior written consent of Fujitsu Microelectronics, Inc.
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TC-DS-20787-07/2001