SN75ALS1177, SN75ALS1178 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS SLLS154B – MARCH 1993 – REVISED FEBRUARY 2001 D D D D D D D D D D D D D SN75ALS1177 . . . N OR NS PACKAGE (TOP VIEW) Meet or Exceed Standards TIA/EIA-422-B and TIA/EIA-485-A Designed for Multipoint Bus Transmission on Long Bus Lines in Noisy Environments Low Supply-Current Requirement 50 mA Max Driver Positive- and Negative-Current Limiting Driver Common-Mode Output Voltage Range of –7 V to 12 V Thermal Shutdown Protection Driver 3-State Outputs Active-High Enable Receiver Common-Mode Input Voltage Range of –12 V to 12 V Receiver Input Sensitivity . . . ±200 mV Receiver Hysteresis . . . 50 mV Typ Receiver High Input Impedance . . . 12 kΩ Min Receiver 3-State Outputs Active-Low Enable for SN75ALS1177 Only Operate From Single 5-V Supply 1B 1A 1R RE 2R 2A 2B GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC 1D 1Y 1Z DE 2Z 2Y 2D SN75ALS1178 . . . N OR NS PACKAGE (TOP VIEW) 1B 1A 1R 1DE 2R 2A 2B GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC 1D 1Y 1Z 2DE 2Z 2Y 2D description The SN75ALS1177 and SN75ALS1178 dual differential drivers and receivers are integrated circuits designed for bidirectional data communication on multipoint bus transmission lines. They are designed for balanced transmission lines and meet standards TIA/EIA-422-B and TIA/EIA-485-A. The SN75ALS1177 combines dual 3-state differential line drivers and dual 3-state differential input line receivers, both of which operate from a single 5-V power supply. The drivers and receivers have active-high and active-low enables, respectively, which can be externally connected together to function as direction control. The SN75ALS1178 drivers each have an individual active-high enable. Fail-safe design ensures that when the receiver inputs are open, the receiver outputs are always high. The SN75ALS1177 and SN75ALS1178 are characterized for operation from 0°C to 70°C. AVAILABLE OPTIONS PACKAGED DEVICES TA 0°C to 70°C PLASTIC DIP (N) PLASTIC SMALL OUTLINE (NS) SN75ALS1177N SN75ALS1177NSR SN75ALS1178N SN75ALS1178NSR The NS package is only available taped and reeled. Add the suffix R to the device type (e.g., SN75ALS1177NSR). Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2001, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN75ALS1177, SN75ALS1178 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS SLLS154B – MARCH 1993 – REVISED FEBRUARY 2001 Function Tables SN75ALS1177, SN75ALS1178 (each driver) OUTPUTS INPUT D ENABLE DE H H H L L H L H X L Z Z Y Z SN75ALS1177 (each receiver) DIFFERENTIAL A–B ENABLE RE OUTPUT Y VID ≥ 0.2 V –0.2 V < VID < 0.2 V L H L ? VID ≤ –0.2 V X L L H Z Open L H SN75ALS1178 (each receiver) DIFFERENTIAL A–B OUTPUT Y VID ≥ 0.2 V –0.2 V < VID < 0.2 V H ? VID ≤ –0.2 V Open L H H = High level, L = Low level, ? = Indeterminate, X = Irrelevant, Z = High impedance (off) logic symbol† SN75ALS1177 DE 12 4 RE 1D 1R 2D 2R SN75ALS1178 EN1 1DE EN2 1D 4 15 14 13 2 15 1 1 14 13 2 3 1 2 10 9 1 1 11 6 5 2 7 1Y 1Z 1A 1R 2DE 2D 3 12 9 2Y 2R 5 2Z 2A 2B POST OFFICE BOX 655303 1 EN 10 11 6 1B † These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. 2 EN • DALLAS, TEXAS 75265 7 1Y 1Z 1A 1B 2Y 2Z 2A 2B SN75ALS1177, SN75ALS1178 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS SLLS154B – MARCH 1993 – REVISED FEBRUARY 2001 logic diagram (positive logic) SN75ALS1177 DE RE 1D 1R 2D SN75ALS1178 12 1DE 1D 4 14 15 13 2 3 1 10 9 11 6 2R 5 7 1Y 1R 1Z 2DE 1A 2D 4 14 15 13 2 3 1 12 10 9 11 1B 2R 2Y 6 5 7 1Y 1Z 1A 1B 2Y 2Z 2A 2B 2Z 2A 2B equivalent schematics EQUIVALENT OF DRIVER OR ENABLE INPUT EQUIVALENT OF RECEIVER INPUT VCC VCC 35 kΩ NOM Input 17 kΩ NOM 1.7 kΩ NOM Input 288 kΩ NOM 1.7 kΩ NOM VCC (A) or GND (B) GND POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN75ALS1177, SN75ALS1178 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS SLLS154B – MARCH 1993 – REVISED FEBRUARY 2001 schematics of outputs TYPICAL OF DRIVER OUTPUTS TYPICAL OF RECEIVER OUTPUTS VCC VCC 70 Ω NOM Output Output GND absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI (DE, RE, and D inputs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Output voltage range, VO (driver) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –9 V to 14 V Input voltage range, receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –14 V to 14 V Receiver differential-input voltage range (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –14 V to 14 V Receiver low-level output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Package thermal impedance, θJA (see Note 3): N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential input voltage, are with respect to the network ground terminal. 2. Differential input voltage is measured at the noninverting terminal with respect to the inverting terminal. 3. The package thermal impedance is calculated in accordance with JESD 51-7. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN75ALS1177, SN75ALS1178 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS SLLS154B – MARCH 1993 – REVISED FEBRUARY 2001 recommended operating conditions VCC VID Supply voltage Differential input voltage Receiver VOC VIC Common-mode output voltage Driver Common-mode input voltage Receiver VIH VIL High-level input voltage DE, RE, D Low-level input voltage DE, RE, D IOH High level output current High-level IOL Driver Receiver Driver Low level output current Low-level Receiver MIN NOM MAX UNIT 4.75 5 5.25 V ±12 V 12 V ±12 V –7† 2 V 0.8 V –60 mA –400 µA 60 8 mA TA Operating free-air temperature 0 70 °C † The algebraic convention, where the less positive (more negative) limit is designated as minimum, is used in this data sheet for common-mode output and threshold voltage level only. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SN75ALS1177, SN75ALS1178 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS SLLS154B – MARCH 1993 – REVISED FEBRUARY 2001 DRIVER SECTION electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER VIK VOH Input clamp voltage VOL |VOD1| Low-level output voltage TEST CONDITIONS II = –18 mA VIH = 2 V, High-level output voltage VIH = 2 V, IO = 0 Differential output voltage |VOD2| Differential output voltage g VIL = 0.8 V, VIL = 0.8 V, IOH = –33 mA IOL = 33 mA VCC = 5 V, RL = 100 Ω, RL = 54 Ω, See Figure 1 See Figure 1 See Note 4 ∆|VOD| Change in magnitude of differential output voltage (see Note 5) RL = 54 Ω or 100 Ω, See Figure 1 VOC Common-mode output voltage RL = 54 Ω or 100 Ω, See Figure 1 ∆|VOC| Change in magnitude of common-mode output voltage (see Note 5) RL = 54 Ω or 100 Ω, See Figure 1 IIH IIL High-level input current IOS ICC High-impedance-state output current Low-level input current Short circuit output current Short-circuit Supply current (total package) MAX UNIT –1.5 V 3.3 V 1.1 V 6 1/2 VOD1 or 2‡ 1.5 Differential output voltage Output current with power off TYP† 1.5 |VOD3| IO(OFF) IOZ MIN V 2.5 1.5 –1§ VCC = 0, VO = –7 V to 12 V VO = –7 V to 12 V VIH = 2.7 V VIL = 0.4 V 5 5 V ±0.2 V 3 V ±0.2 V ±100 µA ±100 µA 100 µA –100 µA VO = –7 V VO = VCC –250 VO = 12 V VO = 0 V 250 No load V 250 mA 150 Outputs enabled 35 50 Outputs disabled 20 50 mA † All typical values are at VCC = 5 V and TA = 25°C. ‡ The minimum VOD2 with a 100-Ω load is either 1/2 VOD1 or 2 V, whichever is greater. § The algebraic convention, where the less positive (more negative) limit is designated as minimum, is used in this data sheet for common-mode output and threshold voltage levels only. NOTES: 4. See TIA/EIA-485-A Figure 3.5, test termination measurement 2. 5. ∆|VOD| and ∆|VOC| are the changes in magnitude of VOD and VOC, respectively, that occur when the input is changed from a high level to a low level. switching characteristics at VCC = 5 V, TA = 25°C (unless otherwise noted) PARAMETER 6 TEST CONDITIONS MIN TYP MAX UNIT tPLH Propagation delay time, high- to low-level output RL = 60 Ω, CL1 = CL2 = 100 pF, See Figure 3 9 15 22 ns tPHL Propagation delay time, low- to high-level output RL = 60 Ω, CL1 = CL2 = 100 pF, See Figure 3 9 15 22 ns tsk Output-to-output skew RL = 60 Ω, CL1 = CL2 = 100 pF, See Figure 3 0 2 8 ns tPZH tPZL Output enable time to high level CL = 100 pF, See Figure 4 30 35 50 ns Output enable time to low level CL = 100 pF, See Figure 5 5 15 25 ns tPHZ tPLZ Output disable time from high level CL = 15 pF, See Figure 4 7 15 30 ns Output disable time from low level CL = 15 pF, See Figure 5 7 15 30 ns POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN75ALS1177, SN75ALS1178 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS SLLS154B – MARCH 1993 – REVISED FEBRUARY 2001 RECEIVER SECTION electrical characteristics over recommended ranges of common-mode input voltage, supply voltage, and operating free-air temperature (unless otherwise noted) PARAMETER VIT+ VIT– Positive-going input threshold voltage Vhys VIK Input hysteresis voltage (VIT+ – VIT–) VOH High-level output voltage VOL Low-level output voltage IOZ High-impedance-state output current TEST CONDITIONS VO = 2.7 V, VO = 0.5 V, Negative-going input threshold voltage Enable input clamp voltage IO = –0.4 mA IO = 8 mA MIN TYP† MAX 0.2 –0.2‡ SN75ALS1177 II Line input current (see Note 6) IIH IIL High-level input current, RE SN75ALS1177 Low-level input current, RE SN75ALS1177 ri Input resistance IOS ICC Short-circuit output current II = –18 mA VID = 200 mV, IOH = –400 µA, See Figure 2 V V 50 SN75ALS1177 UNIT mV –1.5 2.7 V V VID = 200 mV, IOL = 8 mA, See Figure 2 0.45 V VO = 0.4 V to 2.4 V ±20 µA Other input at 0 V VI = 12 V VI = –7 V 1 –0.8 VIH = 2.7 V VIL = 0.4 V 20 –100 12 VO = 0 V, No load, See Note 7 mA µA µA kΩ –15 –85 mA Supply current (total package) Outputs enabled 35 50 mA † All typical values are at VCC = 5 V and TA = 25°C. ‡ The algebraic convention, where the less positive (more negative) limit is designated as minimum, is used in this data sheet for common-mode output and threshold voltage levels only. NOTES: 6. Refer to TIA/EIA-422-B, TIA/EIA-423-A, and TIA/EIA-485-A for exact conditions. 7. Not more than one output should be shorted at a time. switching characteristics at VCC = 5 V, TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tPLH tPHL Propagation delay time, low- to high-level output CL = 15 pF, See Figure 6 15 25 37 ns Propagation delay time, high- to low-level output CL = 15 pF, See Figure 6 15 25 37 ns tPZH tPZL Output enable time to high level SN75ALS1177 CL = 100 pF, See Figure 7 10 20 30 ns Output enable time to low level SN75ALS1177 CL = 100 pF, See Figure 7 10 20 30 ns tPHZ tPLZ Output disable time from high level SN75ALS1177 CL = 15 pF, See Figure 7 3.5 12 16 ns Output disable time from low level SN75ALS1177 CL = 15 pF, See Figure 7 5 12 16 ns POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 SN75ALS1177, SN75ALS1178 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS SLLS154B – MARCH 1993 – REVISED FEBRUARY 2001 PARAMETER MEASUREMENT INFORMATION VID RL 2 IOH VOH VOD2 RL 2 VOL Figure 2. Receiver Test Circuit, VOH and VOL Figure 1. Driver Test Circuit, VOD and VOC 1.5 V 1.5 V 0V tPLH 60 Ω 50 Ω 3V Driver Input CL1 = 100 pF (see Note A) Generator (see Note B) IOL VOC tPHL 1/2 VO 1/2 VO Z Output CL2 = 100 pF (see Note A) VO Y Output tsk 3V DRIVER TEST CIRCUIT tsk DRIVER VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 3. Driver Propagation Delay Times Output S1 3V 3 V or 0 V Input CL (see Note A) Generator (see Note B) 1.5 V 0V RL = 500 Ω 50 Ω 1.5 V tPZH Output tPHZ VOH 2.3 V 0V 0.5 V DRIVER TEST CIRCUIT DRIVER VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 4. Driver Enable and Disable Times 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN75ALS1177, SN75ALS1178 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS SLLS154B – MARCH 1993 – REVISED FEBRUARY 2001 PARAMETER MEASUREMENT INFORMATION VCC RL = 500 Ω S1 3V Output 1.5 V Input 3 V or 0 V 1.5 V 0V CL (see Note A) Generator (see Note B) tPZL tPLZ 0.5 V 50 Ω 0V 2.3 V Output VOL DRIVER TEST CIRCUIT DRIVER VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 5. Driver Enable and Disable Times Output Generator (see Note B) 50 Ω 1 kΩ 0V CL (see Note A) VCC 1N916 or Equivalent 1 kΩ 0V (SN75ALS1177 only) RECEIVER TEST CIRCUIT 2.5 V Input 0V 0V –2.5 V tPHL tPLH VOH Output 1.5 V 1.5 V VOL DRIVER VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 6. Receiver Propagation Delay Times POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 SN75ALS1177, SN75ALS1178 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS SLLS154B – MARCH 1993 – REVISED FEBRUARY 2001 PARAMETER MEASUREMENT INFORMATION S1 Output 1.5 V S2 1 kΩ –1.5 V CL (see Note A) Generator (see Note B) VCC 1N916 or Equivalent 1 kΩ 50 Ω S3 RECEIVER TEST CIRCUIT 3V 1.5 V Input 1.5 V 0V S1 to –1.5 V S2 Closed S3 Closed tPZL S1 to –1.5 V S2 Closed S3 Closed tPLZ 0.5 V 5V 1.5 V Output S1 to 1.5 V S2 Open S3 Closed VOL tPZH VOH 1.5 V S1 to 1.5 V S2 Open S3 Closed 0V tPHZ 0.5 V RECEIVER VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 7. Receiver Output Enable and Disable Times 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 18-Jul-2006 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN75ALS1177N ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN75ALS1177NE4 ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN75ALS1177NSLE OBSOLETE SO NS 16 TBD Call TI SN75ALS1177NSR ACTIVE SO NS 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75ALS1177NSRE4 ACTIVE SO NS 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75ALS1178N ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN75ALS1178NE4 ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN75ALS1178NSLE OBSOLETE SO NS 16 SN75ALS1178NSR ACTIVE SO NS 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN75ALS1178NSRG4 ACTIVE SO NS 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TBD Lead/Ball Finish Call TI MSL Peak Temp (3) Call TI Call TI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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