TI TS2PCIE2212ZAHR

TS2PCIE2212
PCI Express™ SIGNAL SWITCH
www.ti.com
SCDS209 – JUNE 2006
FEATURES
•
•
•
•
•
•
•
Offers Bandwidth Allocation of PCI Express™
Signal Using Two-Lane 1:2
Multiplexer/Demultiplexer
Vcc Operating Range From 1.7 V to 1.9 V
Supports Data Rates of 2.5 Gbps
Port-Port Crosstalk (–39 dB at 1.25 GHz)
OFF Port Isolation (–38 dB at 1.25 GHz)
Low ON-State Resistance (10 Ω Typ)
Low Input/Output Capacitance (3.5 pF Typ)
•
•
•
Excellent Differential Skew (5 ps Max)
Minimal Propagation Delay
ESD Performance Tested Per JESD 22
– 2000-V Human-Body Model
(A114-B, Class II)
– 1000-V Charged-Device Model (C101)
DESCRIPTION/ORDERING INFORMATION
The TS2PCIE2212 can be used to muxltiplex/demultiplex two PCI Express™ lanes, each representing
differential pairs of receive (RX) and transmit (TX) signals. The switch operates at the PCI Express bandwidth
standard of 2.5-Gbps signal-processing speed. The device is composed of two banks, with each bank
accommodating two sources (source A and source B) and two destinations (destination A and destination B).
When a logic-level low is applied to the control (CTRL) pin, source A is connected to destination A and source B
is connected to destination B. When a logic-level high is applied to CTRL, source A is connected to destination
B, while source B and destination A are open.
ORDERING INFORMATION
TA
PACKAGE
0°C to 85°C
BGA – ZAH
ORDERABLE PART NUMBER
Tape and reel
TOP-SIDE MARKING
TS2PCIE2212ZAHR
ZAH PACKAGE
(BOTTOM VIEW)
5 mm
J
H
G
F
E
D
C
B
A
5 mm
12 3 4 5 6 7 8 9
TERMINAL ASSIGNMENTS
1
2
A
CTRL0
TxSB:0P
B
RxSA:0P
C
GND
3
TxSB:0N
4
5
6
TxSA:0P
GND
TxDA:0P
TxSA:0N
VDD
TxDA:0N
7
TxDB:0N
8
9
TxDB:0P
NC
GND
RxDA:0P
RxSA:0N
RxDA:0N
D
RxSB:0P
RxSB:0N
RxDB:0N
E
GND
VDD
VDD
GND
F
TxSA:1P
TxSA:1N
TxDA:1N
TxDA:1P
G
TxSB:1N
H
TxSB:1P
GND
J
NC
RxSA:1P
RxDB:0P
TxDB:1N
RxSA:1N
RxSB:1N
VDD
RxDB:1N
RXSB:1P
GND
RXDB:1P
RxDA:1N
GND
TxDB:1P
RxDA:1P
CTRL1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PCI Express is a trademark of PCI-SIG.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006, Texas Instruments Incorporated
TS2PCIE2212
PCI Express™ SIGNAL SWITCH
www.ti.com
SCDS209 – JUNE 2006
PIN DESCRIPTION
NAME
FUNCTION
TxSA:nP, TxSA:nN
Source A transmit pair
RxSA:nP, RxSA:nN
Source A receive pair
TxSB:nP, TxSB:nN
Source B transmit pair
RxSB:nP, RxSB:nN
Source B receive pair
TxDA:nP, TxDA:nN
Destination A transmit pair
RxDA:nP, RxDA:nN
Destination A receive pair
TxDB:nP, TxDB:nN
Destination B transmit pair
RxDB:nP, RxDB:nN
Destination B receive pair
CTRL0
Control signal for bank 0
CTRL1
Control signal for bank 1
VDD
Positive supply voltage
GND
Ground (0 V)
NC
No internal connection
LOGIC DIAGRAM
CTRL0
TxSA:0
2
2
2
2
TxSB:0
TxDB:0
2
2
RxDA:0
RxSA:0
2
2
RxDB:0
RxSB:0
TxSA:1
2
2
TxDA:1
2
2
TxSB:1
TxDB:1
2
2
RxSA:1
RxSB:1
RxDA:1
2
2
RxDB:1
CTRL1
2
TxDA:0
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TS2PCIE2212
PCI Express™ SIGNAL SWITCH
www.ti.com
SCDS209 – JUNE 2006
FUNCTION TABLE
CTRLn
FUNCTION
L
SA:n = DA:n, SB:n = DB:n
H
SA:n = DB:n, DA:n = open, SBin = open
Absolute Maximum Ratings (1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
VDD
Supply voltage range
–0.5
2.5
UNIT
V
VIN
Control input voltage range (2) (3)
–0.5
2.5
V
VI/O
Switch I/O voltage
range (2) (3) (4)
–0.5
2.5
V
IIK
Control input clamp current
VIN < 0 and VI/O < 0
50
mA
II/OK
I/O port clamp current
VIN < 0 and VI/O < 0
50
mA
II/O
ON-state switch current (5)
±100
mA
Continuous current through VDD or GND
±100
mA
θJA
Package thermal impedance (6)
TBD
°C/W
Tstg
Storage temperature range
150
°C
(1)
(2)
(3)
(4)
(5)
(6)
–65
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltages are with respect to ground, unless otherwise specified.
The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
VI and VO are used to denote specific conditions for VI/O.
II and IO are used to denote specific conditions for II/O.
The package thermal impedance is calculated in accordance with JESD 51-7.
Recommended Operating Conditions
MIN
TYP
MAX
1.7
1.8
1.9
UNIT
VDD
Supply voltage
VIH
High-level control input voltage
CTRL
VIL
Low-level control input voltage
CTRL
VIO
Data input/output voltage
0
VDD
V
TA
Operating free-air temperature
0
85
°C
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0.65 VDD
V
V
0.35 VDD
V
3
TS2PCIE2212
PCI Express™ SIGNAL SWITCH
www.ti.com
SCDS209 – JUNE 2006
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TA = 0°C to 85°C
TEST CONDITIONS
MIN
VIK
Control inputs
VDD = 1.7 V,
IIN = –18 mA
IIN
Control inputs
VDD = 1.9 V,
VIN = VDD or GND
IOZ
VDD = 1.9 V,
VO = 0 to 1.9 V,
VI = 0,
Switch OFF
ICC
VDD = 1.9 V,
VIN = VDD or GND,
II/O = 0,
Switch ON or OFF
Cin
Control inputs
TYP
UNIT
MAX
–1.8
V
±1
µA
±5
µA
160
300
µA
VDD = 1.9 V,
VIN = VDD or GND
0.5
1.0
pF
CIO(OFF) SB or DA port
VI/O = 0 V,
Switch OFF
1.4
1.5
pF
CIO(ON)
VI/O = 0 V,
Switch ON
3.5
4
pF
VDD = 1.7 V,
VI = 0 V,
IO = 10 mA
10
14
VDD = 1.7 V,
VI = 1.5 V,
IO = –10 mA
12
17
VDD = 1.7 V,
IO = 10 mA,
VI = 1.5 V ± 0.4 V
2.5
5
ron
∆ron(flat)
Ω
Ω
Switching Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
DR
Data rate per TX or RX pair
tpd
Propagation delay, Sx to Dx
See Figure 7
tsk
TA = 0°C to 85°C
MIN
TYP
MAX
UNIT
2.5
Gbps
250
ps
Intra-pair skew
f =1.25 GHz, See Figure 7
5
ps
ten (tPZL, tPZH)
Switch turn-on delay, CTRL to DA
See Figure 6
5
ns
tdis (tPLZ, tPHZ)
Switch turn-off delay, CTRL to DA
See Figure 6
2.5
ns
ILOSS
Differential insertion loss
f =1.25 GHz, RLOAD = 50 Ω,
See Figure 1
–3.2
dB
RLOSS
Differential return loss
f =1.25 GHz, RLOAD = 50 Ω,
See Figure 2
Common-mode insertion loss
f =1.25 GHz, RLOAD = 50 Ω,
See Figure 3
Differential OFF isolation
f =1.25 GHz, RLOAD = 50 Ω,
See Figure 4
Differential crosstalk
f =1.25 GHz, RLOAD = 50 Ω,
See Figure 5
ILOSS(CM)
OIFF
XTALK
4
DESCRIPTION
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–2.5
–7.2
–9.5
dB
–2
dB
–33
–38
dB
–33
–39
dB
TS2PCIE2212
PCI Express™ SIGNAL SWITCH
www.ti.com
SCDS209 – JUNE 2006
OPERATING CHARACTERISTICS
0
0
−5
−2
Decibel (dB)
Decibel (dB)
−1
−3
−4
−10
−15
−20
−5
−6
0.01
0.10
1.00
−25
0.01
10.00
0.10
Frequency (GHz)
1.00
10.00
Frequency (GHz)
Figure 1. Differential Insertion Loss vs Frequency
Figure 2. Differential Return Loss vs Frequency
0
0
−2
Decibel (dB)
−6
−8
−40
−60
−10
−12
0.01
0.10
1.00
−80
0.01
10.00
0.10
Frequency (GHz)
1.00
10.00
Frequency (GHz)
Figure 3. Common-Mode Insertion Loss vs Frequency
Figure 4. Differential OFF Isolation vs Frequency
0
−20
Decibel (dB)
Decibel (dB)
−20
−4
−40
−60
−80
0.01
0.10
1.00
10.00
Frequency (GHz)
Figure 5. Differential Crosstalk vs Frequency
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5
TS2PCIE2212
PCI Express™ SIGNAL SWITCH
www.ti.com
SCDS209 – JUNE 2006
PARAMETER MEASUREMENT INFORMATION
(Enable and Disable Times)
VDD
Input Generator
VIN
50 Ω
CTRL
50 Ω
VG1
TEST CIRCUIT
DUT
2 × VDD
Input Generator
VI
50 Ω
RL
VO
SA
S1
VG2
CL
(see Note A)
RL
TEST
VCC
S1
RL
VI
CL
V∆
tPLZ/tPZL
1.8 V ± 0.1 V
2 × VDD
100 Ω
GND
No Load
0.3 V
tPHZ/tPZH
1.8 V ± 0.1 V
GND
100 Ω
VDD
No Load
0.3 V
Output Control
(VIN)
VDD
VDD/2
Output
Waveform 1
S1 at 2 y VDD tPZL
(see Note B)
VDD/2
0V
tPLZ
VOH
VDD/2
tPZH
Output
Waveform 2
S1 at GND
(see Note B)
Open
GND
VOL + 0.3 V
VOL
tPHZ
VDD/2
VOH − 0.3 V
VOH
VOL
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
Figure 6. Test Circuit and Voltage Waveforms
6
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TS2PCIE2212
PCI Express™ SIGNAL SWITCH
www.ti.com
SCDS209 – JUNE 2006
PARAMETER MEASUREMENT INFORMATION
VDD
TS2PCIE2212
T1(1)
A1
Sx:nP
Input
Generator
CTRL0
GND
Dx:nP
VI
VO
Sx:nN
VDD
100 Ω
Dx:nN
TEST PATH
T1(1)
SA:n = DA:n, SB:n = DB:n
GND
SA:n = DB:n, DA:n = open
VDD
(1) T1 is an external terminal.
VCOM + 400 mV
Input
Waveform
VCOM
VCOM
VCOM − 400 mV
tPLH
tPHL
VOH
Output
Waveform
VCRS
VCRS
VOL
VCOM = 1.5 V
VCRS is the cross point of the differential signal.
tsk = |tPLHn – tPHLn|
Figure 7. Test Circuit for Propagation Delay and Intra-Pair Skew
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7
TS2PCIE2212
PCI Express™ SIGNAL SWITCH
www.ti.com
SCDS209 – JUNE 2006
PARAMETER MEASUREMENT INFORMATION (continued)
VDD
TS2PCIE2212
A1
VDD
CTRL0
SA:nP
DA:nP
SA:nN
DA:nN
GND
50 Ω
50 Ω
Network
Analyzer
SB:nP
DB:nP
SB:nN
DB:nN
50 Ω
50 Ω
TEST
VNA
MEASUREMENT
Differential insertion loss
S21
Differential return loss
S11
Common-mode insertion loss
S21
Figure 8. Differential Insertion Loss, Differential Return Loss,
and Common-Mode Insertion Loss Test Circuit
8
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TS2PCIE2212
PCI Express™ SIGNAL SWITCH
www.ti.com
SCDS209 – JUNE 2006
PARAMETER MEASUREMENT INFORMATION (continued)
VDD
TS2PCIE2212
A1
TxSA:0P
TxSA:0N
A4
A6
CTRL0
VDD
GND
TxDA:0P
50 Ω
TxDA:0N
B4
B6
A2
A8 TxDB:0P
B3
B7
50 Ω
Network
Analyzer
TxSB:0P
T1(1)
50 Ω
TxSB:0N
TxDB:0N
50 Ω
TEST
T1(1)
Differential crosstalk
GND
Differential OFF isolation
VDD
(1) T1 is an external terminal.
Figure 9. Differential Crosstalk and OFF Isolation Test Circuit
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9
PACKAGE OPTION ADDENDUM
www.ti.com
25-Nov-2008
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TS2PCIE2212ZAHR
ACTIVE
NFBGA
ZAH
48
3000
TS2PCIE2212ZAHRG1
ACTIVE
NFBGA
ZAH
48
3000 Green (RoHS &
no Sb/Br)
Pb-Free
(RoHS)
Lead/Ball Finish
MSL Peak Temp (3)
SNAGCU
Level-3-260C-168 HR
SNAGCU
Level-3-260C-168 HR
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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Addendum-Page 1
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