ONSEMI MC74LVX50DG

MC74LVX50
Hex Buffer
The MC74LVX50 is an advanced high speed CMOS buffer
fabricated with silicon gate CMOS technology.
The internal circuit is composed of three stages, including a buffered
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V
systems to 3.0 V systems.
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MARKING
DIAGRAMS
Features
•
•
•
•
•
•
•
•
High Speed: tPD = 4.1 ns (Typ) at VCC = 3.3 V
Low Power Dissipation: ICC = 2 mA (Max) at TA = 25°C
High Noise Immunity: VNIH = VNIL = 28% VCC
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2.0 V to 3.6 V Operating Range
Low Noise: VOLP = 0.5 V (Max)
These Devices are Pb−Free and are RoHS Compliant
14
SOIC−14
D SUFFIX
CASE 751A
14
1
LVX50G
AWLYWW
1
14
14
1
TSSOP−14
DT SUFFIX
CASE 948G
1
LVX
50
ALYWG
G
14
14
1
LVX50
ALYWG
SOEIAJ−14
M SUFFIX
CASE 965
1
LVX50 = Specific Device Code
A
= Assembly Location
WL, L = Wafer Lot
Y
= Year
WW, W = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2011
May, 2011 − Rev. 4
1
Publication Order Number:
MC74LVX50/D
MC74LVX50
A1
A2
1
2
3
4
5
A3
6
Y1
Y2
Y3
Y=A
9
A4
8
11
A5
10
13
A6
12
Y4
Y5
Y6
Figure 1. Logic Diagram
VCC
14
A6
13
Y6
12
A5
11
Y5
10
A4
9
A1
1
A2
1
A3
1
A4
1
A5
1
A6
1
Y1
Y2
Y3
Y4
Y5
Y6
Figure 2. Logic Symbol
Y4
8
1
2
3
4
5
6
7
A1
Y1
A2
Y2
A3
Y3
GND
FUNCTION TABLE
A Input
Y Output
L
H
L
H
14−Lead Pinout (Top View)
ORDERING INFORMATION
Package
Shipping†
MC74LVX50DG
SOIC−14
(Pb−Free)
55 Units / Rail
MC74LVX50DR2G
SOIC−14
(Pb−Free)
2500 Tape & Reel
MC74LVX50DTG
TSSOP−14*
96 Units / Rail
MC74LVX50DTR2G
TSSOP−14*
2500 Tape & Reel
MC74LVX50MG
SOEIAJ−14
(Pb−Free)
50 Units / Rail
MC74LVX50MELG
SOEIAJ−14
(Pb−Free)
2000 Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
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2
MC74LVX50
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
VCC
DC Supply Voltage
*0.5 to )7.0
V
VIN
DC Input Voltage
*0.5 to )7.0
V
*0.5 to VCC )0.5
V
VI < GND
*20
mA
VO < GND
$20
mA
VOUT
DC Output Voltage
IIK
DC Input Diode Current
IOK
DC Output Diode Current
IOUT
DC Output Sink Current
$25
mA
ICC
DC Supply Current per Supply Pin
$50
mA
*65 to )150
_C
260
_C
TSTG
Storage Temperature Range
TL
Lead Temperature, 1 mm from Case for 10 Seconds
TJ
Junction Temperature under Bias
qJA
Thermal Resistance
MSL
Moisture Sensitivity
FR
Flammability Rating
VESD
ILatchup
)150
(Note 1)
SOIC
TSSOP
125
170
Level 1
Oxygen Index: 30% − 35%
ESD Withstand Voltage
Latchup Performance
_C
_C/W
UL 94−V0 @ 0.125 in
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
> 2000
> 200
2000
V
Above VCC and Below GND at 85_C (Note 5)
$300
mA
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow.
2. Tested to EIA/JESD22−A114−A.
3. Tested to EIA/JESD22−A115−A.
4. Tested to JESD22−C101−A.
5. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
Parameter
Min
Max
Unit
2.0
3.6
V
(Note 6)
0
5.5
V
(HIGH or LOW State)
0
VCC
V
*40
)85
_C
0
100
ns/V
Supply Voltage
VI
Input Voltage
VO
Output Voltage
TA
Operating Free−Air Temperature
Dt/DV
Input Transition Rise or Fall Rate
VCC = 3.0 V $0.3 V
6. Unused inputs may not be left open. All inputs must be tied to a high− or low−logic input voltage level.
NOTE: The qJA of the package is equal to 1/Derating. Higher junction temperatures may affect the expected lifetime of the device per the table
and figure below.
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3
MC74LVX50
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
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ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
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ÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
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ÎÎÎÎÎÎÎÎ
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ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
DC ELECTRICAL CHARACTERISTICS
Symbol
Parameter
Test Conditions
TA = 25°C
VCC
(V)
Min
1.5
2.0
2.4
VIH
High−Level Input Voltage
2.0
3.0
3.6
VIL
Low−Level Input Voltage
2.0
3.0
3.6
VOH
High−Level Output Voltage
(VIN= VIH or VIL)
IOH = −50 mA
IOH = −50 mA
IOH = −4 mA
2.0
3.0
3.0
VOL
Low−Level Output Voltage
(VIN= VIH or VIL)
IOL = 50 mA
IOL = 50 mA
IOL = 4 mA
2.0
3.0
3.0
IIN
Input Leakage Current
VIN = 5.5 V or GND
ICC
Quiescent Supply Current
VIN = VCC or GND
Typ
TA ≤ 85°C
Max
Min
Max
1.5
2.0
2.4
V
0.5
0.8
0.8
1.9
2.9
2.58
0.5
0.8
0.8
2.0
3.0
0.0
0.0
Unit
1.9
2.9
2.48
V
V
0.1
0.1
0.36
0.1
0.1
0.44
V
0 to
3.6
±0.1
±1.0
mA
3.6
2.0
20.0
mA
AC ELECTRICAL CHARACTERISTICS Input tr = tf = 3.0 ns
TA = 25°C
Symbol
tPLH,
tPHL
tOSHL
tOSLH
CIN
Parameter
Propagation Delay,
Input A to Y
Output−to−Output Skew
(Note 7)
Test Conditions
Min
TA ≤ 85°C
Typ
Max
Min
Max
Unit
ns
VCC = 2.7 V
CL = 15 pF
CL = 50 pF
5.4
7.9
10.1
13.6
1.0
1.0
12.5
16.0
VCC = 3.3 V ± 0.3 V
CL = 15 pF
CL = 50 pF
4.1
6.6
6.2
9.7
1.0
1.0
7.5
11.5
VCC = 2.7 V
CL = 50 pF
1.5
1.5
VCC = 3.3 V ±0.3V
CL = 50 pF
1.5
1.5
10
10
Input Capacitance
4
ns
pF
Typical @ 25°C, VCC = 3.3 V
CPD
15
Power Dissipation Capacitance (Note 8)
pF
7. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (tOSHL) or LOW−to−HIGH (tOSLH); parameter
guaranteed by design.
8. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no−load dynamic
power consumption; PD = CPD VCC2 fin + ICC VCC.
NOISE CHARACTERISTICS Input tr = tf = 3.0ns, CL = 50pF, VCC = 3.3 V
TA = 25°C
Symbol
Characteristic
Typ
Max
Unit
VOLP
Quiet Output Maximum Dynamic VOL
0.3
0.5
V
VOLV
Quiet Output Minimum Dynamic VOL
−0.3
−0.5
V
VIHD
Minimum High Level Dynamic Input Voltage
2.0
V
VILD
Maximum Low Level Dynamic Input Voltage
0.8
V
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4
MC74LVX50
TEST POINT
VCC
A
50%
tPLH
Y
OUTPUT
DEVICE
UNDER
TEST
GND
tPHL
CL *
50% VCC
*Includes all probe and jig capacitance
Figure 3. Switching Waveforms
Figure 4. Test Circuit
INPUT
Figure 5. Input Equivalent Circuit
EMBOSSED CARRIER DIMENSIONS (See Notes 9 and 10)
Tape
Size
B1
Max
8 mm
4.35 mm
(0.179”)
12 mm
8.2 mm
(0.323”)
16 mm
24 mm
D
D1
E
F
K
P
P0
P2
R
T
W
1.5 mm
+ 0.1
−0.0
(0.059”
+0.004
−0.0)
1.0 mm
Min
(0.179”)
1.75 mm
±0.1
(0.069
±0.004”)
3.5 mm
±0.5
(1.38
±0.002”)
2.4 mm
Max
(0.094”)
4.0 mm
±0.10
(0.157
±0.004”)
4.0 mm
±0.1
(0.157
±0.004”)
2.0 mm
±0.1
(0.079
±0.004”)
25 mm
(0.98”)
0.6 mm
(0.024)
8.3 mm
(0.327)
5.5 mm
±0.5
(0.217
±0.002”)
6.4 mm
Max
(0.252”)
4.0 mm
±0.10
(0.157
±0.004”)
8.0 mm
±0.10
(0.315
±0.004”)
12.1 mm
(0.476”)
7.5 mm
±0.10
(0.295
±0.004”)
7.9 mm
Max
(0.311”)
4.0 mm
±0.10
(0.157
±0.004”)
8.0 mm
±0.10
(0.315
±0.004”)
12.0 mm
±0.10
(0.472
±0.004”)
16.3 mm
(0.642)
20.1 mm
(0.791”)
11.5 mm
±0.10
(0.453
±0.004”)
11.9 mm
Max
(0.468”)
16.0 mm
±0.10
(0.63
±0.004”)
24.3 mm
(0.957)
1.5 mm
Min
(0.060)
30 mm
(1.18”)
12.0 mm
±0.3
(0.470
±0.012”)
9. Metric Dimensions Govern−English are in parentheses for reference only.
10. A0, B0, and K0 are determined by component size. The clearance between the components and the cavity must be within 0.05 mm min to
0.50 mm max. The component cannot rotate more than 10° within the determined cavity
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5
MC74LVX50
P0
K
t
10 PITCHES
CUMULATIVE
TOLERANCE ON
TAPE
±0.2 mm
(±0.008”)
TOP
COVER
TAPE
P2
D
E
A0 SEE NOTE 11
K0
B1
+
SEE
NOTE
11
+
B0
F
+
P
EMBOSSMENT
FOR MACHINE REFERENCE
ONLY
INCLUDING DRAFT AND RADII
CONCENTRIC AROUND B0
W
USER DIRECTION OF FEED
CENTER
LINES
OF CAVITY
D1
FOR COMPONENTS
2.0 mm × 1.2 mm
AND LARGER
*TOP COVER
TAPE THICKNESS (t1)
0.10 mm
(0.004”) MAX.
R MIN.
BENDING RADIUS
10°
TAPE AND COMPONENTS
SHALL PASS AROUND RADIUS “R”
WITHOUT DAMAGE
EMBOSSED
CARRIER
100 mm
(3.937”)
MAXIMUM COMPONENT ROTATION
EMBOSSMENT
1 mm MAX
TYPICAL
COMPONENT CAVITY
CENTER LINE
TAPE
1 mm
(0.039”) MAX
TYPICAL
COMPONENT
CENTER LINE
250 mm
(9.843”)
CAMBER (TOP VIEW)
ALLOWABLE CAMBER TO BE 1 mm/100 mm NONACCUMULATIVE OVER 250 mm
11. A0, B0, and K0 are determined by component size. The clearance between the components and the cavity must be within 0.05 mm min to
0.50 mm max. The component cannot rotate more than 10° within the determined cavity
Figure 6. Carrier Tape Specifications
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6
MC74LVX50
t MAX
1.5 mm MIN
(0.06”)
A
13.0 mm ±0.2 mm
(0.512” ±0.008”)
20.2 mm MIN
(0.795”)
50 mm MIN
(1.969”)
FULL RADIUS
G
Figure 7. Reel Dimensions
REEL DIMENSIONS
Tape Size
T&R Suffix
A Max
G
t Max
8 mm
T1, T2
178 mm
(7”)
8.4 mm, +1.5 mm, −0.0
(0.33” + 0.059”, −0.00)
14.4 mm
(0.56”)
8 mm
T3, T4
330 mm
(13”)
8.4 mm, +1.5 mm, −0.0
(0.33” + 0.059”, −0.00)
14.4 mm
(0.56”)
12 mm
R2
330 mm
(13”)
12.4 mm, +2.0 mm, −0.0
(0.49” + 0.079”, −0.00)
18.4 mm
(0.72”)
16 mm
R2
360 mm
(14.173”)
16.4 mm, +2.0 mm, −0.0
(0.646” + 0.078”, −0.00)
22.4 mm
(0.882”)
24 mm
R2
360 mm
(14.173”)
24.4 mm, +2.0 mm, −0.0
(0.961” + 0.078”, −0.00)
30.4 mm
(1.197”)
DIRECTION OF FEED
BARCODE LABEL
POCKET
Figure 8. Reel Winding Direction
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7
HOLE
MC74LVX50
CAVITY
TAPE
TOP TAPE
TAPE TRAILER
(Connected to Reel Hub)
NO COMPONENTS
160 mm MIN
TAPE LEADER
NO COMPONENTS
400 mm MIN
COMPONENTS
DIRECTION OF FEED
Figure 9. Tape Ends for Finished Goods
User Direction of Feed
Figure 10. TSSOP and SOIC R2 Reel Configuration/Orientation
TAPE UTILIZATION BY PACKAGE
Tape Size
SOIC
TSSOP
QFN
12 mm
8−Lead
8−, 14−, 16−Lead
8−, 14−, 16−Lead
16 mm
14−, 16−Lead
20−, 24−Lead
20−, 24−Lead
24 mm
18−, 20−, 24−, 28−Lead
48−, 56−Lead
48−, 56−Lead
8 mm
SC88A / SOT−353
SC88/SOT−363
5−, 6−Lead
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8
MC74LVX50
PACKAGE DIMENSIONS
SOIC−14
D SUFFIX
CASE 751A−03
ISSUE J
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.127
(0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
−A−
14
8
−B−
P 7 PL
0.25 (0.010)
B
M
7
1
G
−T−
D 14 PL
0.25 (0.010)
T B
S
A
DIM
A
B
C
D
F
G
J
K
M
P
R
J
M
K
M
F
R X 45 _
C
SEATING
PLANE
M
S
SOLDERING FOOTPRINT
7X
7.04
14X
1.52
1
14X
0.58
1.27
PITCH
DIMENSIONS: MILLIMETERS
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9
MILLIMETERS
MIN
MAX
8.55
8.75
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0_
7_
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.337 0.344
0.150 0.157
0.054 0.068
0.014 0.019
0.016 0.049
0.050 BSC
0.008 0.009
0.004 0.009
0_
7_
0.228 0.244
0.010 0.019
MC74LVX50
PACKAGE DIMENSIONS
TSSOP−14
DT SUFFIX
CASE 948G−01
ISSUE B
14X K REF
0.10 (0.004)
0.15 (0.006) T U
M
T U
V
S
S
N
2X
14
L/2
0.25 (0.010)
8
M
B
−U−
L
PIN 1
IDENT.
N
F
7
1
0.15 (0.006) T U
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
S
S
DETAIL E
K
A
−V−
ÉÉÉ
ÇÇÇ
ÇÇÇ
ÉÉÉ
K1
J J1
SECTION N−N
−W−
C
0.10 (0.004)
−T− SEATING
PLANE
D
H
G
DETAIL E
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
MILLIMETERS
MIN
MAX
4.90
5.10
4.30
4.50
−−−
1.20
0.05
0.15
0.50
0.75
0.65 BSC
0.50
0.60
0.09
0.20
0.09
0.16
0.19
0.30
0.19
0.25
6.40 BSC
0_
8_
SOLDERING FOOTPRINT
7.06
1
0.65
PITCH
14X
0.36
14X
1.26
DIMENSIONS: MILLIMETERS
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10
INCHES
MIN MAX
0.193 0.200
0.169 0.177
−−− 0.047
0.002 0.006
0.020 0.030
0.026 BSC
0.020 0.024
0.004 0.008
0.004 0.006
0.007 0.012
0.007 0.010
0.252 BSC
0_
8_
MC74LVX50
PACKAGE DIMENSIONS
SOEIAJ−14
CASE 965−01
ISSUE B
14
LE
8
Q1
E HE
M_
L
7
1
DETAIL P
Z
D
VIEW P
A
e
DIM
A
A1
b
c
D
E
e
HE
L
LE
M
Q1
Z
A1
b
0.13 (0.005)
c
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE
MOLD FLASH OR PROTRUSIONS AND ARE
MEASURED AT THE PARTING LINE. MOLD FLASH
OR PROTRUSIONS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
0.10 (0.004)
MILLIMETERS
MIN
MAX
--2.05
0.05
0.20
0.35
0.50
0.10
0.20
9.90
10.50
5.10
5.45
1.27 BSC
7.40
8.20
0.50
0.85
1.10
1.50
10 _
0_
0.70
0.90
--1.42
INCHES
MIN
MAX
--0.081
0.002
0.008
0.014
0.020
0.004
0.008
0.390
0.413
0.201
0.215
0.050 BSC
0.291
0.323
0.020
0.033
0.043
0.059
10 _
0_
0.028
0.035
--0.056
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MC74LVX50/D