ONSEMI NVTFS5820NL

NVTFS5820NL
Power MOSFET
60 V, 11.5 mW, Single N−Channel, m8FL
Features
•
•
•
•
•
Small Footprint (3.3x3.3 mm) for Compact Design
Low RDS(on) to Minimize Conduction Losses
Low QG and Capacitance to Minimize Driver Losses
AEC−Q101 Qualified
These are Pb−Free Devices*
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V(BR)DSS
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
60
V
Gate−to−Source Voltage
VGS
"20
V
ID
29
A
Continuous Drain Current RYJ−mb (Notes 1,
2, 3, 4)
Power Dissipation
RYJ−mb (Notes 1, 2, 3)
Continuous Drain Current RqJA (Notes 1 &
3, 4)
Power Dissipation
RqJA (Notes 1, 3)
Pulsed Drain Current
Tmb = 25°C
Steady
State
Tmb = 100°C
Tmb = 25°C
Steady
State
PD
Current limited by package
(Note 4)
TA = 25°C
Operating Junction and Storage Temperature
Source Current (Body Diode)
Single Pulse Drain−to−Source Avalanche
Energy (TJ = 25°C, VDD = 50 V, VGS = 10 V,
IL(pk) = 37 A, L = 0.1 mH, RG = 25 W)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
D
G
10
ID
A
11
S
8.0
PD
MARKING DIAGRAM
W
3.2
TA = 100°C
TA = 25°C, tp = 10 ms
N−Channel
W
21
TA = 100°C
TA = 25°C
1.6
1
S
S
S
G
1
IDM
247
A
IDmaxPkg
70
A
TJ, Tstg
−55 to
175
°C
IS
17
A
EAS
48
mJ
TL
260
°C
WDFN8
(m8FL)
CASE 511AB
5820
A
Y
WW
G
Junction−to−Ambient − Steady State (Note 3)
Symbol
Value
Unit
RYJ−mb
7.3
°C/W
RqJA
47
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Psi (Y) is used as required per JESD51−12 for packages in which
substantially less than 100% of the heat flows to single case surface.
3. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad.
4. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
© Semiconductor Components Industries, LLC, 2011
July, 2011 − Rev. 1
D
D
D
D
= Specific Device Code
= Assembly Location
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
Device
Package
Shipping†
NVTFS5820NLTAG
WDFN8
(Pb−Free)
1500/Tape &
Reel
NVTFS5820NLTWG
WDFN8
(Pb−Free)
5000/Tape &
Reel
THERMAL RESISTANCE MAXIMUM RATINGS (Note 1)
Junction−to−Mounting Board (top) − Steady
State (Note 2, 3)
5820
AYWWG
G
(Note: Microdot may be in either location)
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
Parameter
29 A
15 mW @ 4.5 V
20
Tmb = 100°C
TA = 25°C
ID MAX
11.5 mW @ 10 V
60 V
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
RDS(on) MAX
1
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
*For additional information on our Pb−Free strategy and
soldering details, please download the ON
Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
Publication Order Number:
NVTFS5820NL/D
NVTFS5820NL
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 250 mA
60
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/TJ
Typ
Max
Unit
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
57
IDSS
Gate−to−Source Leakage Current
V
VGS = 0 V,
VDS = 60 V
mV/°C
TJ = 25°C
1.0
TJ = 125°C
10
IGSS
VDS = 0 V, VGS = ±20 V
VGS(TH)
VGS = VDS, ID = 250 mA
±100
mA
nA
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage
Negative Threshold Temperature
Coefficient
VGS(TH)/TJ
Drain−to−Source On Resistance
RDS(on)
Forward Transconductance
1.5
2.3
6.2
gFS
VGS = 10 V
ID = 8.7 A
10.1
11.5
VGS = 4.5 V
ID = 7.3 A
13.0
15
VDS = 5 V, ID = 10 A
V
mV/°C
mW
24.6
S
1462
pF
CHARGES, CAPACITANCES AND GATE RESISTANCE
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Total Gate Charge
QG(TOT)
VGS = 0 V, f = 1.0 MHz, VDS = 25 V
150
96
VGS = 10 V, VDS = 48 V, ID = 10 A
28
VGS = 4.5 V, VDS = 48 V, ID = 10 A
15
nC
Threshold Gate Charge
QG(TH)
1
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
Plateau Voltage
VGP
3
V
Gate Resistance
RG
0.62
W
td(on)
10
ns
VGS = 4.5 V, VDS = 48 V, ID = 10 A
4
8
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
tr
td(off)
VGS = 4.5 V, VDS = 48 V,
ID = 10 A, RG = 2.5 W
tf
28
19
22
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
VSD
TJ = 25°C
0.79
TJ = 125°C
0.65
tRR
Charge Time
ta
Discharge Time
tb
Reverse Recovery Charge
VGS = 0 V,
IS = 10 A
19
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 10 A
QRR
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2
V
ns
13
6
15
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
1.2
nC
NVTFS5820NL
TYPICAL CHARACTERISTICS
50
3.6 V
40
3.4 V
30
60
50
40
30
20
3.2 V
10
3.0 V
10
0
2.8 V
0
1
2
3
4
5
1
TJ = −55°C
2
3
4
5
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
0.025
0.020
0.015
0.010
2
4
6
8
10
12
VGS, GATE−TO−SOURCE VOLTAGE (V)
0.016
TJ = 25°C
0.014
VGS = 4.5 V
0.012
VGS = 10 V
0.010
0.008
5
10
15
20
25
30
35
40
ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
2.3
1.9
TJ = 125°C
VGS, GATE−TO−SOURCE VOLTAGE (V)
ID = 10 A
TJ = 25°C
2.1
TJ = 25°C
20
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
0.030
0.005
VDS ≥ 10 V
70
100,000
VGS = 0 V
VGS = 10 V
ID = 10 A
IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
TJ = 25°C
3.8 V
60
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)
4.0 V
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
ID, DRAIN CURRENT (A)
70
80
VGS = 5 V
10 V
ID, DRAIN CURRENT (A)
80
10,000
1.7
1.5
1.3
1.1
0.9
TJ = 150°C
1,000
TJ = 125°C
0.7
0.5
−50
−25
0
25
50
75
100
125
150
175
100
10
20
30
40
50
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
60
NVTFS5820NL
TYPICAL CHARACTERISTICS
10
VGS = 0 V
TJ = 25°C
1600
C, CAPACITANCE (pF)
VGS, GATE−TO−SOURCE VOLTAGE (V)
1800
1400
Ciss
1200
1000
800
600
400
Coss
200
0
Crss
0
10
20
30
40
50
60
IS, SOURCE CURRENT (A)
t, TIME (ns)
2
0
VDS = 48 V
ID = 10 A
TJ = 25°C
0
5
10
15
20
25
Qg, TOTAL GATE CHARGE (nC)
td(off)
tf
td(on)
10
1
10
100
30
30
VGS = 0 V
TJ = 25°C
20
10
0
0.5
0.6
0.7
0.8
0.9
RG, GATE RESISTANCE (W)
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
1000
1.0
60
VGS = 10 V
Single Pulse
TC = 25°C
100 ms
EAS, SINGLE PULSE DRAIN−TO−
SOURCE AVALANCHE ENERGY (mJ)
ID, DRAIN CURRENT (A)
Qgd
Qgs
40
tr
10 ms
1 ms
10
10 ms
0.1
4
Figure 8. Gate−to−Source Voltage vs. Total
Charge
100
1
6
DRAIN−TO−SOURCE VOLTAGE (V)
VDD = 48 V
ID = 10 A
VGS = 4.5 V
100
8
Figure 7. Capacitance Variation
1000
1
QT
RDS(on) Limit
Thermal Limit
Package Limit
0.1
dc
1
10
VDS, DRAISN VOLTAGE (V)
100
ID = 37 A
50
40
30
20
10
0
25
50
75
100
125
150
TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
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4
175
NVTFS5820NL
RqJ(t) (°C/W) EFFECTIVE TRANSIENT
THERMAL RESISTANCE
TYPICAL CHARACTERISTICS
10
Duty Cycle = 0.5
0.2
1
0.1
0.05
0.02
0.1
0.01
Single Pulse
0.01
0.000001
0.00001
0.0001
0.001
0.01
0.1
PULSE TIME (sec)
Figure 13. Thermal Response
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5
1
10
100
1000
NVTFS5820NL
PACKAGE DIMENSIONS
WDFN8 3.3x3.3, 0.65P
CASE 511AB−01
ISSUE B
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH
PROTRUSIONS OR GATE BURRS.
0.20 C
D
A
D1
B
2X
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
K
L
L1
M
q
0.20 C
8 7 6 5
4X
E1 E
1 2 3 4
q
c
TOP VIEW
A1
0.10 C
A
0.10 C
e
SIDE VIEW
0.10
8X b
C A B
0.05
c
L
C
6X
DETAIL A
SEATING
PLANE
DETAIL A
INCHES
NOM
0.030
−−−
0.012
0.008
0.130 BSC
0.116
0.120
0.078
0.083
0.130 BSC
0.116
0.120
0.058
0.063
0.026 BSC
0.012
0.016
0.025
−−−
0.012
0.017
0.002
0.005
0.055
0.059
0_
−−−
MIN
0.028
0.000
0.009
0.006
MAX
0.031
0.002
0.016
0.010
0.124
0.088
0.124
0.068
0.020
−−−
0.022
0.008
0.063
12 _
SOLDERING FOOTPRINT*
8X
0.42
e/2
1
4
E2
0.65
PITCH
PACKAGE
OUTLINE
K
4X
0.66
M
5
8
G
MILLIMETERS
MIN
NOM
MAX
0.70
0.75
0.80
0.00
−−−
0.05
0.23
0.30
0.40
0.15
0.20
0.25
3.30 BSC
2.95
3.05
3.15
1.98
2.11
2.24
3.30 BSC
2.95
3.05
3.15
1.47
1.60
1.73
0.65 BSC
0.30
0.41
0.51
0.64
−−−
−−−
0.30
0.43
0.56
0.06
0.13
0.20
1.40
1.50
1.60
0_
−−−
12 _
D2
L1
3.60
BOTTOM VIEW
0.75
2.30
0.57
0.47
2.37
3.46
DIMENSION: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
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NVTFS5820NL/D