SANYO LV25200M_10

Ordering number : ENA0976
LV25200M
Bi-CMOS IC
Single chip Tuner IC for Car Radio
Overview
LV25200M is a tuner IC for car radio, which incorporates the AM/FM Tuner, PLL, AM/FM Noise Canceller (NC), FM
Stereodecoder (MPX) , Multipath-noise Rejection Circuit (MRC) .
This IC enables development of the low-cost analog tuner for OEM.
Functions
• AM+FM-FE+IF+NC+MPX+MRC+PLL
Features
• World-wide compatible tuners
A single tuner module is enough to supply the world-wide compatible tuners.
FM is compatible with US EURO, Japan bands while AM is compatible with LW, MW, SW, Weather-Band.
With the image cancel mixer incorporated in FM MIX, the external RF AMP can be deleted.
Compatible with RDS. PLL fast locking.
• Self-contained type IF band variable filter incorporated
Detects any neighboring interfering station and varies the IF filter band, enabling superior selectivity characteristic.
• Auto alignment EEPROM necessary
FM RF, VCO, Null-voltage, Mute-on, Mute-ATT, SNC, HCC, Station detector, Gain AGC sensitivity,
CCB bus compatible
• Reduced parts quantity
Parts quantity reduced from our conventional products
• Other functions
AM noise canceller (genuine compatible)
•
•
CCB is a registered trademark of SANYO Electric Co., Ltd.
CCB is SANYO Semiconductor's original bus format. All bus addresses are managed by SANYO
Semiconductor for this format.
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer' s products or
equipment.
D2607 TI IM 20071004-S00024 No.A0976-1/45
LV25200M
Specifications
Maximum Ratings at Ta = 25°C
Parameter
Symbol
Maximum supply voltage
Conditions
VCC_H max
PIN 5, 77
Ratings
Unit
8.7
V
V
VCC_L max
PIN 21, 27, 50
5.7
Maximum input current
VIN max
PIN 17, 18, 19
-0.3 to +5.0
V
Maximum output current
VO max
PIN 20
-0.3 to +6.5
V
Allowable power dissipation
Pd max
(Ta≤85°C)
950
mW
Operating temperature
Topr
-40 to +85
°C
Storage temperature
Tstg
-40 to +150
°C
Recommended Operating Conditions at Ta = 25°C
Parameter
Symbol
Recommended supply voltage
VCC_H
Operating supply voltage range
VCcop_H
Conditions
Ratings
Unit
PIN 5, 66, 75, 76, 77
VCC_L
PIN 21, 27, 50
VCcop_L
8.0
V
5.0
V
PIN 5, 66, 75, 76, 77
7.5 to 8.5
V
V
PIN 21, 27, 50
4.5 to 5.5
Input High level voltage
VIH
PIN 17, 18, 19
2.5 to 4.0
V
Input Low level voltage
VIL
PIN 17, 18, 19
0 to 0.8
V
Input amplitude voltage
VIN
PIN 17, 18, 19
0 to 4.0
Vp-p
PIN 19
0.45 or more
μs
Setup time
Tsetup
PIN 17, 18, 19
0.45 or more
μs
Hold time
Thold
PIN 17, 18, 19
0.45 or more
μs
tφW
Input pulse width
Package Dimensions
Reset at Power ON
unit : mm (typ)
3255
V cop_H
17.2
0.8
14.0
60
41
61
V cop_L
40
V DD 4
14.0
17.2
V hmin
Voff
21
80
tPOR
1
0.65
0.25
20
0.15
(2.7)
0.1
3.0max
(0.83)
SANYO : QFP80(14X14)
Recommended Operating Conditions at Ta=25°C, GND=0V
Parameter
Symbol
Conditions
Ratings
Unit
Operating supply voltage
Vcop_H
PIN 5, 66, 75, 76, 77
7.5 to 8.5
Vcop_L
PIN 21, 27, 50
4.5 to 5.5
V
PIN 13
3.7 to 4.3
V
VDD4 to 2.2
V
V
Internal logic voltage
VDD4
Internal register hold voltage
Vhmin
Internal register reset voltage
Voff
PIN 27, 50, Design reference value
0 to 0.2
V
tPOR
PIN 27, 50, Design reference value
30 to 3000
μs
Internal register reset power ON time
PIN 13, Design reference value
No.A0976-2/45
LV25200M
AC Characteristics
Operating Characteristics at Ta=25°C, VCC=8.0V, VDD=5.0V
with the designated measuring circuit outside standard.
Except that this measurement was made with the IC socket [Yamaichi Denki Kogyo Co., Ltd. IC51-0644-807].
Audio filter: IHF BPF used
[FM characteristics] FM FE MIX input (NO-Dummy)
CCB Command
IN3-5
Unit
IN3-4
max
IN3-3
typ
IN3-2
No input FM mode
min
IN3-1
Icco-8V
Conditions
IN2
1-1 Current drain -8V
Symbol
IN1
Parameter
19
37
25
25
25
25
25
50
62
74
mA
19
37
25
25
25
25
25
44.5
51
58
mA
19
37
25
25
25
25
25
220
277
350 mVrms
19
37
25
25
25
25
25
270
340
425 mVrms
19
37
25
25
25
25
25
-1
0
1
dB
19
37
25
25
25
25
25
0.2
1
%
19
37
25
25
25
25
25
0.3
2.5
%
19
37
25
25
25
25
25
60
67
dB
19
37
25
25
25
25
25
54
58
dB
19
37
25
25
25
25
25
54
61
dB
19
37
25
25
14
25
25
-30
-25
-20
dB
19
37
25
35
25
25
25
-20
-16
-11.2
dB
19
37
25
35
25
25
25
-11
-6
-1
dB
19
37
25
25
25
25
25
27
38
19
37
25
25
25
25
25
1.9
4.1
19
37
25
25
25
25
25
1
3
19
37
25
25
25
25
25
19
37
25
25
25
25
25
19
37
25
25
25
25
19
37
25
25
25
19
37
25
25
19
37
25
25
I5+I66+I75+I76+I77
1-2 Current drain -5V
Icco-5V
No input FM mode
I21+I27+I50
1-3 Demodulation
Vo-FM
output
1-4 Pin 52 RDS
Vo-52
98.1MHz, 60dBμV, 1kHz,
100%mod, pin 52
demodulation output
1-5 Channel balance
98.1MHz, 60dBμV, 1kHz,
100%mod, pin 25
CB
98.1MHz, 60dBμV, 1kHz,
pins 25 and 26
1-6 Total harmonic
distortion factor
1-7 Total harmonic
distortion
THD-
98.1MHz, 60dBμV, 1kHz,
Fmmono (1)
100%mod, pin 25
THD-
98.1MHz, 60dBμV, 1kHz,
Fmmono (2)
150%mod, pin 25
1-8 Signal to noise ratio S/N-FM(MONO)
MONO
1-9 Signal to noise ratio S/N-FM-ST
(ST)
1-10 AM suppression
98.1MHz, 60dBμV, 1kHz,
100%mod,
98.1MHz, 60dBμV, 1kHz,
100%mod, pin 25, pilot=10%
AMR
ratio
98.1MHz, 60dBμV, 1kHz,
100%mod, 30% in AM mode,
fm=1kHz, pin 25
1-11 Muting attenuation (1)
Att-1
98.1MHz, 60dBμV, 1kHz, with
V33=0→2V, pin 25 attenuation
1-12 Muting attenuation (2)
Att-2
98.1MHz, 60dBμV, 1kHz, with
V33=0→2V, pin 25 attenuation
1-13 Muting attenuation (3)
Att-3
98.1MHz, 60dBμV, 1kHz, with
V33=0→1V, pin 25 attenuation
1-14 Separation
Separation
98.1MHz, 60dBμV, mod=30%,
dB
pilot=10%, pin 25 output ratio
[IN3-5 D0-5] Separation control adj
1-15 Stereo ON level
ST-ON
Pilot demodulation at which
6.3
%
V39<0.5V is established
1-16 Stereo OFF level
ST-OFF
Pilot demodulation at which
%
V39>3.5V is established
1-17 Main distortion
THD-Main L
factor
1-18 SNC output
98.1MHz, 60dBμV, L+R=90%,
0.3
1.2
%
-10
-6
-2
dB
25
-6
-3
-0.5
dB
25
25
-14.5
-10.5
-6.5
dB
25
25
25
-6
-1
1
dBμV
25
25
25
0.1
5
9.9
dBμV
pilot=10%, pin 25
AttSNC
attenuation
98.1MHz, 60dBμV, L-R=90%,
pilot=10%, V28=3V→0.6V,
pin 25; standard for single block
1-19 HCC output
FM HCC
attenuation (1)
98.1MHz, 60dBμV, 10kHz,
L+R=90%, pilot=10%,
V29=3V→0.6V,
pin 25; standard for single block
1-20 HCC output
FM HCC
attenuation (2)
98.1MHz, 60dBμV, 10kHz,
L+R=90%, pilot=10%,
V29=3V→0.1V,
pin 25; standard for single block
1-21 Input limiting
Vi-lim
voltage
98.1MHz, 60dBμV, 30%mod,
MIX input at which the input
reference output is down
by -3dB, V42=0V, V29=0V,
with MUTE=OFF
1-22 Muting sensitivity
Vi-mute
MIX input level at V42=1V,
non-mod
Continued on next page.
No.A0976-3/45
LV25200M
Continued from preceding page.
CCB Command
IN3-5
Unit
IN3-4
max
IN3-3
typ
IN3-2
MIX input level at which SD pin is
min
IN3-1
SD-senFM
Conditions
IN2
1-23 SD sensitivity
Symbol
IN1
Parameter
20
37
25
25
25
25
25
20
20
37
25
19
25
25
25
16
19
37
25
25
25
25
25
19
37
25
25
25
25
25
19
37
25
A1
25
25
25
19
37
25
25
25
25
25
19
37
25
25
25
25
25
4.8
V
19
37
25
25
25
25
25
0.45
V
19
37
25
25
25
25
25
19
37
25
25
25
25
25
19
37
25
25
25
25
25
19
37
25
25
25
25
25
19
37
25
25
25
25
25
0.85
19
37
25
25
25
25
25
1
19
37
25
25
25
25
25
19
37
25
25
25
25
25
19
37
25
25
33
25
19
37
25
25
35
21
37
25
25
28
37
25
20
37
20
28
25
30
dBμV
ON, shifter-adj, non-mod
IF count sensitivity
1-24 S-meter DC output
IF-count-
IF count sensitivity at MIX input,
sens.FM
non-mod
VSMFM-1
No input,
dBμV
0.5
V
pin 38 DC output non-mod
VSMFM-2
10dBμV,
0.75
V
pin 38 DC output non-mod
VSMFM-3
30dBμV, pin 38 DC output non-
1.8
1.85
1.9
V
mod [IN3-2 D0-4] S-meter shift-adj
VSMFM-4
50dBμV,
3.3
V
pin 38 DC output non-mod
VSMFM-5
80dBμV,
pin 38 DC output non-mod
1-24 S-meter AC pin DC
VSMFM-A1
output
No input,
pin 40 DC output non-mod
VSMFM-A2
10dBμV,
0.85
V
pin 40 DC output non-mod
VSMFM-A3
30dBμV,
1.51
1.78
2.1
V
pin 40 DC output non-mod
VSMFM-A4
50dBμV,
3.05
V
pin 40 DC output non-mod
VSMFM-A5
80dBμV,
4.8
V
1.1
1.4
V
1.45
1.9
V
0.15
0.3
V
-14
-9
-4
dB
25
66
75
84
dBμV
25
25
82
90
98
dBμV
25
25
25
15
dB
25
25
25
25
15
dB
23
25
37
25
25
70
100
130
kHz
37
23
25
38
25
25
130
200
270
dB
37
25
25
25
25
25
85
130
200 mVrms
pin 40 DC output non-mod
1-25 S-meter inclination
S-curve1
standard - 1
Holds [IN3-2 D0-4] data,
which was obtained by deducting
(VSMFM-2) from VSM (VSMFM-3)
1-26 S-meter inclination
S-curve2
standard - 2
Holds [IN3-2 D0-4] data,
which was obtained by deducting
(VSMFM-3) from VSM (VSMFM-4)
1-27 Mute drive output
VMUTE-60
60dBμV,
pin 42 output DC output non-mod
1-28 Noise convergence - 1
FM NOISE-20
60dBμV.98.1MHz, 30%mod,
input reference, output level of
the input -20dBμV,
MUTE=OFF(42pin=GND)
1-29 N-AGC ON input
VNAGC
98.1MHz, non-mod, MIX input
level at which pin 1 becomes
0.6V or more
1-30 W-AGC ON input
VWAGC
98.1MHz, non-mod,
pin 38 =1.0V applied (Keyed on),
MIX input level at which pin 1
becomes 0.6V or more
1-31 Image obstruction
Removal amount of
ratio-1
108.1M +21.4MHz
1-32 Image obstruction
Removal amount of
ratio-2
SD bandwidth - 1
90M -21.4MHz
BW-mute1
98.1MHz, non-mod, 50dBμV,
Bandwidth at which SD pin is
turned ON
SD bandwidth - 2
BW-mute2
98.1MHz, non-mod, 50dBμV,
Bandwidth at which SD pin is
turned ON
1-33 Conversion gain
A.V.
98.1MHz, 60dBμV, non-mod,
FECF output
Continued on next page.
No.A0976-4/45
LV25200M
[FM IF Filter characteristics] FM IF input
CCB Command
IN3-3
IN3-4
IN3-5
typ
IN3-2
70dBμV, pin 54 AC (450kHz)
min
IN3-1
FIL-G-N
gain-narrow band
Conditions
IN2
2-1 IF variable filter
Symbol
IN1
Parameter
19
37
21
25
25
25
25
79
19
37
21
25
25
25
25
2
19
37
23
25
25
25
25
84
max
Unit
89
output non-mod,
After CF adjustment, fit in
through BW/G adjustment.
Narrow-Fix MODE
2-2 IF variable filter
FIL-BW-N
Pin 54 -AC output monitor.
dB
Confirm the 2dB or more level down
at the ±25kHz point with reference to
the center frequency of 450kHz.
-3dB bandwidth. Narrow-Fix MODE
2-3 IF variable filter
FIL-BW-W
Pin 54-AC output monitor.
3
dB
Confirm no level down exceeding
3 dB at the ±80kHz point with
reference to the center frequency
of 450kHz.
-3dB bandwidth.
Wide-Fix MODE
[NC block] NC input (48pin), S-meter AC input (40pin)
CCB Command
IN3-5
Unit
IN3-4
max
IN3-3
typ
IN3-2
NC input, pulse cycle=1kHz,
min
IN3-1
FM τGATE
Conditions
IN2
3-1 FM NC gate time
Symbol
IN1
Parameter
19
37
25
25
25
25
25
36
40
44
μs
19
37
25
25
25
25
25
17
30
43
mVp-o
19
37
25
25
25
25
25
36
37
26
26
26
26
26
36
37
26
26
26
26
26
38pin=2V applied,
pulse width=1μs,
at 100mVp-o pulse input (after
MVCO adjustment)
3-2 FM NC noise
SN-DETOUT
sensitivity
NC input (pin 48),
38pin=2V applied,
measure the pulse input level at
which the noise canceller starts
operation, pulse cycle=1kHz,
pulse width=1μs
3-3 FM NC noise
SN-Vsm
sensitivity
S-meter (AC) input (pin 40),
46
mVp-o
38pin=0V applied,
measure the pulse input level at
which the noise canceller starts
operation, pulse cycle=1kHz,
pulse width=1μs
3-4 AM NC gate time
AM τGATE(1)
S-meter (AC) input (pin 40),
345
450
555
μs
pulse cycle=1kHz,
pulse width=1μs,
measurement at pin 33.
38pin=1.5
3-5 AM NC noise
SN
sensitivity
S-meter (AC) input (pin 40),
24
mVp-o
measure the pulse input level at
which the noise canceller starts
operation, pulse cycle=1kHz,
pulse width=1μs
[Multipath-noise rejection circuit] MRC input (pin 41)
CCB Command
IN3-3
IN3-4
IN3-5
typ
IN3-2
Pin 39 voltage when 3.5 V is
min
IN3-1
VMRC
Conditions
IN2
4-1 MRC output
Symbol
IN1
Parameter
19
37
25
25
25
25
25
2.76
2.96
19
37
25
25
25
25
25
50
71
max
3.16
Unit
V
applied to V38
4-2 MRC operation level
MRC-ON
SG (AG5) out level when pin 38
100 mVrms
=5V and pin 39=2.6V, f=70kHz
No.A0976-5/45
LV25200M
[AM characteristics] AM AMANT input
CCB Command
IN3-5
Unit
IN3-4
max
IN3-3
typ
IN3-2
1MHz, 30dBμV, fm=1kHz,
min
IN3-1
S/N-30
Conditions
IN2
5-1 Practical sensitivity
Symbol
IN1
Parameter
36
37
26
26
26
26
26
20
36
37
26
26
26
26
26
84
105
36
37
26
26
26
26
26
50
54.5
36
37
26
26
26
26
26
51
60
36
37
26
26
26
26
26
0.3
1
%
36
37
26
26
26
26
26
0.5
1.5
%
36
37
26
26
26
26
26
9
13
dB
dB
30%mod, pin 25
5-2 Detection output
Vo-AM
1MHz, 74dBμV, fm=1kHz,
131 mVrms
30%mod, pin 25
5-3 AGC-F.O.M
VAGC-FOM
1MHz, 74dBμV,
59
dB
output reference,
input width at which the output
decreases by 10dB,
pin 25
5-4 Signal-to-noise ratio
S/N-AM
1MHz, 74dBμV, fm=1kHz,
dB
30%mod
5-5 Total harmonic
THD-AM-1
distortion ratio - 1
5-6 Total harmonic
THD-AM-2
distortion ratio - 2
5-7 AM HCC output
1MHz, 120dBμV, fm=1kHz,
80%mod
AM HCC
attenuation
5-8 S-meter DC output
1MHz, 74dBμV, fm=1kHz,
80%mod
1MHz, 74dBμV, fm=4kHz,
5
30%mod, V29=3V→0.6V, 25pin
VSMAMDC-1
No input, 38pin DC output
36
37
26
26
26
26
26
0
0.1
0.5
V
VSMAMDC-2
1MHz, 30dBμV, non-mod,
36
37
26
26
26
26
26
1.2
1.5
1.9
V
36
37
26
26
26
26
26
2.85
3.6
4.9
V
0.5
38pin DC output
VSMAMDC-3
1MHz, 130dBμV, non-mod,
38pin DC output
5-9 S-meter AC output
VSMAMAC-1
No input, 40pin DC output
36
37
26
26
26
26
26
0
VSMAMAC-2
1MHz, 74dBμV, non-mod,
36
37
26
26
26
26
26
0.75
V
W-AGCsen1 1.4MHz, input at V48=0.7V
36
37
26
26
26
26
26
82
92
102
dBμV
SD-senAM
37
37
26
26
26
26
26
25
30
35
dBμV
V
40pin DC output
5-10 Wide band AGC
sensitivity
5-11 SD sensitivity
1MHz, ANT input level at which
the SD pin is turned ON
Function
1. AM / FM front-end block
FM Image rejection Mixer
AM Double balance Mixer
Pin diode drive AGC output
Keyed AGC adjustment
4 bit DAC
Differential IF amplifier
Wide AGC sensitivity setting
4 bit DAC
Narrow AGC sensitivity setting
4 bit DAC
Local oscillator
160MHz to 260MHz
FM Local OSC divider
1/1 1/2 1/3
AM Local OSC divider
1/10, 1/8, 1/6, 1/4
2. FM IF block
IF Limiter Amplifier 6 stages
S-meter shifter
5 bit DAC
S-meter output (DC/AC)
Multipath detector (dedicated FM S-meter)
Quadrature detector
Vnull adj-5bit, QDP adj-4bit
450kHz
AF preamplifier (Audio mute)
AFC output
Variable bandwidth control
CF adj-5bit DAC
BW/Gain adj-5bit DAC
Gain adj-3bit DAC
(for setting filter)
Continued on next page.
No.A0976-6/45
LV25200M
Continued from preceding page.
Soft mute setting
5 bit DAC
Mute attenuation setting
6 bit DAC
IF counter buffer (FM circuits)
10.7MHz
SD (IF counter buffer activation level) setting
5 bit DAC
-0.5dB to -25dB
SD output (active-high) (also used by AM circuits)
IF output Driver for DSP (AF out, non-muting)
SD: Station Detector
IF Gain
4 bit DAC
3. AM Block (back end of AM tuner)
Double balance 2nd mixer
IF amplifier
4 bit DAC
AM detector
RF Narrow AGC
4 bit DAC
Wide AGC
4 bit DAC
Pin diode drive AGC output
S-meter output
2 bit DAC
IF counter buffer
SD (IF counter buffer activation level) setting
450kHz
5 bit DAC
SD output (active-high)
Detector output frequency adjusting pin (Low-cut, De-emphasis)
4. FM NC
High-Pass-Filter (1st-order)
Delay circuit of Low-Pass-Filter (4th order)
Noise-AGC (Sensitivity:2 Bit-control)
2 bit DAC
Pilot signal compensation
Noise sensitivity setting
Modulation index
5. AM NC
AM Noise canceller Gate-Time
6 bit DAC
AM Noise canceller OFF Level
5 bit DAC
6. MPX
VCO (Free-Run Frequency:6 Bit-control)
6 bit DAC
Level following pilot canceller
2 bit (3 step adj.)
304kHz
Automatic stereo/mono switching
VCO oscillator stop (AM mode)
Forced monaural
Stereo indicator (active-low)
Anti-birdie filter (f=114kHz, 190kHz)
SNC (stereo noise control)
5 bit DAC
HCC (high-cut control)
5 bit DAC
Separation setting
6 bit
64 steps
2 bit
4 step
2 bit
4 step
7. MRC (Multipath-noise Rejection Circuit)
Noise Amplifier Gain (sensitivity setting)
DC Level-Shifter
SNC driving
Time constant control circuit
No.A0976-7/45
LV25200M
Pin Function
Pin No.
Block
Pin-No.
1
FM-ANT-D
Function name
FE
41
Function name
Block
2
FM-RF-AGC
FE
3
GND (FE)
---
4
AM-MIX-IN2
AM
44
QD-Cap.
IF
5
OSC-VCC
---
45
QD-Cap.
IF
Common
MRC-AC-IN
MRC
42
Mute-Drive
IF
43
AFC
IF
6
AM/FM-OSC (B)
FE
46
Vref 2.7V
7
AM/FM-OSC (C)
FE
47
IF-Det-OUT
IF
8
PLL-LPF
PLL
48
NC-IN
NC
9
FM FET
PLL
49
Mod.-Index
NC
10
AM FET
PLL
50
VCC 5V (Analog)
---
11
CPAM
PLL
51
Interfering signal detected
FIL
12
CPFM
Common
52
RDS-OUT
IF
13
PLL VDD
MPX
53
PLL-TEST
PLL
14
ST/SD, VCO monitor and PLL-TEST
PLL
54
IF Filter OUT
FIL
15
Sep.-ADJ.
MPX
55
AM-IFAGC (load for Vt setting)
AM
16
GND (Analog)
---
56
Pilot-Det/AM-LC
17
CE
PLL
57
IF-AGC
MPX/AM
18
DI
PLL
58
AM-W-AGC
AM
19
CL
PLL
59
AM-RF-AGC (BYPASS)
AM
20
DO
PLL
60
AM-IF-IN
AM
21
VCC (X'tal)
---
61
AM-IN-IN2
AM
22
X'tal-OUT
X'tal
62
FM-IF-IN (BYPASS)
IF
23
X'tal-IN
X'tal
63
FM-IF-IN
IF
AM-2nd-MIX-IN
AM
24
GND (X'tal)
---
64
AM-RF-AGC
AM
AM
25
MPX-L-OUT
MPX
65
1st-IF-OUT
FE
26
MPX-R-OUT
MPX
66
AM-MIX2-OUT
AM
27
VCC 5V (Digital)
28
SNC
---
67
Vref 4.9V
Common
MPX
68
RF-DAC1
FM
29
HCC
MPX
69
AM-2nd-MIX-IN (BYPASS)
AM
30
MPX-PCO1
MPX
70
RF-DAC2
FM
31
MPX-PCO2
MPX
71
IF-IN(BIAS)
FE
32
GND (Digital)
---
72
FM-1st-IF-IN
FE
33
NC-Gate- monitor
NC
73
AM-ANT-D and PLL-TEST
AM
34
MPX-PLL-IN
MPX
74
N-AGC-IN
FE
35
HCC capacity
MPX
75
MIX-OUT
FE
36
Noise-Sens.
NC
76
MIX-OUT
FE
37
Noise-AGC
NC
77
VCC (8V)
---
38
Vsm (Main)
IF
78
AM-MIX-IN
AM
39
MRC-OUT
MRC
79
FM-MIX-IN
FE
40
Vsm2 (Sub)
IF
80
FM-MIX-IN
FE
No.A0976-8/45
LV25200M
Block Diagram
No.A0976-9/45
LV25200M
Pin Discription
Unit (Resistance: Ω, Capacitance: F)
Pin
1
Function
Discription
Antenna
Pin 2: Antenna damping current flows when the RF
Damping
AGC voltage becomes VCC-Vbe.
Internal Equivalent Circuit
Drive pin
2
RF AGC
RF AGC voltage.
Voltage=Hi (around 8V) with AGC OFF.
The voltage lowers when a level is inserted into the
AGC circuit. AGC is applied at the voltage of VCCVbe.
3
FE.GND
5
OSC VCC
OSC dedicated VCC
6
FM/AM OSC IN
OSC pin
7
FM/AM OSC OUT
FE GND(F.E.)
8V VCC (VCO.)
Continued on next page.
No.A0976-10/45
LV25200M
Unit (Resistance: Ω, Capacitance: F)
Continued from preceding page.
Pin
Function
Discription
8
Tuning voltage output
FM:
LPF output
PLL filter formed with pins 9 to 12
Internal Equivalent Circuit
(Pins 10 and 11 to be left OPEN)
9
FET for FM
AM:
PLL filter formed with pins 10 and 11. In this case,
10
FET for AM
the low pass filter is formed with the internal
impedance (100kΩ) and external capacity.
11
Charge pump for FM
Simultaneous use of AM and FM filters (pins 9 to
12) is possible through mode changeover. In this
case, internal impedance (100kΩ) is short-circuited.
12
Charge pump for AM
13
VDD for PLL
PLL regulator output (4V)
14
AM/FM SD pin
STEREO indicator at reception:
STEREO indicator
&
Low: STEREO
High: MONO
VCO Monitor
At SEEK:
AM/FM SD
ON=High
OFF=Low
Pin 14 output is output from DO (for SD information
output).
VCO monitor (at IN3-5 D6=H)
Saw-tooth wave of MPX-VCO frequency is output,
which is monitored for VCO adjustment
(Adjust with IN3-5 D0-5.)
15
Separation adjustment
The input level of sub-decoder is varied through
pin
BIT control.
(The output level of MONO and MAIN remains
unchanged.)
Continued on next page.
No.A0976-11/45
LV25200M
Unit (Resistance: Ω, Capacitance: F)
Continued from preceding page.
Pin
16
Function
Discription
Internal Equivalent Circuit
N.C, MPX, MRC
And PLL-GND
17
CE
Pin to set the high level during serial data input
(D1) to LV25200M or serial data output (DO).
18
DI
Input pin for serial data for transfer from the
controller to LV25200M
19
CL
Clock for synchronization with the data during
serial data input (DI) to LV25200M or serial data
output (DO)
20
DO
Output pin of serial data to be transferred from
LV25200M to the controller
21
VCC 5V
X’tal-OSC dedicated VCC
22
X’tal-OSC-OUT
Connect X’tal oscillator for 20.5MHz between pins
22 and 23.
23
X’tal-OSC-IN
Connect capacitors, each 12pF, between pins 22
and 23 and GND.
24
GND
X’tal-OSC dedicated GND
Continued on next page.
No.A0976-12/45
LV25200M
Unit (Resistance: Ω, Capacitance: F)
Continued from preceding page.
Pin
Function
Discription
25
MPX output (LEFT)
MPX output
26
MPX output (RIGHT)
Output impedance changed over with the
Internal Equivalent Circuit
de-Emphasis changeover Bit (IN3-4 D20)
Low=3.3kΩ
High=5kΩ
(The figure in the right shows a case of 5kΩ.)
(50/75μs changeover with the external capacity of
0.015μF)
27
VCC2 (5V)
28
SNC control input pin
VCC for PLL and Digital system VCC
With the pin 28 input voltage, the attenuation of
(L-R) Decode is controlled.
↓
Decrease Separation.
↓
The noise felt in the Stereo mode is reduced.
(Threshold can be controlled with 5Bit.)
29
HCC control input pin
With the pin 29 input voltage, attenuation of the
high pass component is controlled.
↓
At weak input, high pass is cut to reduce the noise
feeling.
Same control for FM/AM HCC
(f characteristics changed over automatically
between AM and FM modes.)
(Threshold can be controlled with 5Bit.)
30
Phase-Comparator for
31
MPX
32
GND
33
NC-Gate
Normal: High (VDD potential)
Trigger-OUT
Gate: Low (0V)
Note)
Monitor output is not made unless the Bit setting of
Pilot-Cancel is set to 11 (PICAN=OFF).
Continued on next page.
No.A0976-13/45
LV25200M
Unit (Resistance: Ω, Capacitance: F)
Continued from preceding page.
Pin
Function
34
MPX-PLL input
Discription
Internal Equivalent Circuit
LPF formed with internal resistance 30kΩ and
pin 34 eternal capacity
↓
HPF formed by subtracting the above LPS passage
signal from the Composite signal.
↓
Supply to MPX-PLL circuit
35
HCC capacitor pin
With pin 35 external capacity,
High-Cut frequency characteristics are set.
The value of internal resistance R35 is changed
over in AM/FM mode:
FM mode: R35=30kΩ
AM mode: R35=100kΩ
36
Noise detection
With the noise sensitivity setting pin of pin 36, set
sensitivity
the medium electric field (about 50dBμ). Then, with
the AGC-Adj pin of pin 37, carry out setting in the
37
AGC adj pin
weak field (20 to 30dBμ).
38
AM/FM S-meter (DC)
Current drive type S-meter output
Pin 38:
Eliminate the AC component by external capacity
40
AM/FM S-meter (AC)
Pin 40:
Leaves the AC component
(Pin for NC noise extraction and for multipath noise
extraction)
Continued on next page.
No.A0976-14/45
LV25200M
Unit (Resistance: Ω, Capacitance: F)
Continued from preceding page.
Pin
39
Function
Discription
MRC output
Time constant for Multipath-Noise Detector is
(for SNC Control)
determined with the following:
Internal Equivalent Circuit
100Ω and C2 during discharge
Iconst and C2 during charge
Iconst can be changed over with 2Bit
(MRC-Time-Constant)
41
MRC AC input pin
From AC-S-meter (pin 40), enter the AC
component.
Amp-Gain, and frequency characteristics are
determined with
C41, (R41+1kΩ [internal resistance]) and 30kΩ
(internal resistance).
Amp-Gain can be controlled with 2Bit.
42
Mute Drive
1 The MUTE time constant is determined as
follows by CR:
• Attack time
TA=10kΩ (R1) × C42
• Release time
TR=50kΩ (R2) × C42
2 Noise convergence adjustment
3 MUTE OFF function
MUTE is turned OFF when pin 42 is shortcircuited with GND.
43
AFC
Null voltage
As compared with pin 46 2.7V
Continued on next page.
No.A0976-15/45
LV25200M
Unit (Resistance: Ω, Capacitance: F)
Continued from preceding page.
Pin
Function
Discription
FM DET capacity
FM quadrature detection capacity
46
Vreg (2.7V)
2.7V regulator
47
FM/AM DET OUT
AM/FM detection output
44
Internal Equivalent Circuit
45
Output impedance
Low impedance in the FM mode
10kΩ in the AM mode
48
Noise canceller input
Noise Canceller Input
Input impedance
50kΩ
Continued on next page.
No.A0976-16/45
LV25200M
Unit (Resistance: Ω, Capacitance: F)
Continued from preceding page.
Pin
49
Function
MOD INDEX
Discription
Internal Equivalent Circuit
Set the detection output level as DC output.
C49 is the DC smoothing capacitor.
(Used for control of the IF band variable filter)
50
VCC (5V)
Analog system
51
Undesire Det
Set the over-100kHz detection output noise level
as DC output.
C51 is the DC smoothing capacitor.
(Used for control of the IF band variable filter)
52
RDS OUT
FM detection output that is not passed through
Mute AMP.
* This output is not affected by the time constant
due to muting.
53
PLL TEST PIN
Test pin
Continued on next page.
No.A0976-17/45
LV25200M
Unit (Resistance: Ω, Capacitance: F)
Continued from preceding page.
Pin
54
Function
PLL TEST PIN
Discription
Internal Equivalent Circuit
IN3-1 Monitor
(IF band variable filter
• IF_FIL
output)
IF band variable filter output monitor (AC output)
55
AM IFAGCBYPASS
IF AGC voltage DC smoothing capacitor pin
57
AM IF AGC
TR1; Time constant changeover at Seek
switch diode; 2.2μF
Discharging diode
1 At reception
Time constant depends on the external LPF
composition of pins 55 to 57.
2 Seek
Time constant is 57pin (C57) × 10Ω
56
AM LC
AM LC;
FM Pilot Det
Frequency characteristics of unnecessary voice
band of 100Hz or less is changed to produce the
clear sound in the AM mode.
AM LC f characteristic; Fc=1/(2π *2.5K*C56)
Pilot Det;
Insertion of 1MΩ between pin 56 and GND causes
the forced MONO mode.
For C56, 0.47μF or more is recommended.
58
AM W-AGC
AMP for W-AGC pickup incorporated
Continued on next page.
No.A0976-18/45
LV25200M
Unit (Resistance: Ω, Capacitance: F)
Continued from preceding page.
Pin
59
Function
Discription
AM RFAGC
RF AGC rectifier capacitor
BYPASS
Determination of the distortion ratio during
Internal Equivalent Circuit
low-frequency modulation
Increase C59 and C64;
Distortion → improved
Response → slow
Decrease C59 and C64;
Distortion → worse
Response → quick
64
RF AGC
RF AGC rectifier capacitor
Determination of distortion ratio during
low-frequency modulation
Increase C59 and C64;
Distortion → improved
Response → slow
Decrease C59 and C64;
Distortion → worse
Response → quick
60
AM IF AMP IN
61
AM 450kHz AMP input
Input impedance=2kΩ
62
FM 2nd MIX input
FM 2nd MIX
63
FM AMP input
10.7MHz → 450kHz
FM AMP (10.7MHz)
AMP for S-meter voltage
65
AM/FM 1st IF AMP
Output impedance=330Ω
OUTPUT
Continued on next page.
No.A0976-19/45
LV25200M
Unit (Resistance: Ω, Capacitance: F)
Continued from preceding page.
Pin
66
Function
AM 2nd MIX OUT
Discription
Internal Equivalent Circuit
MIX coil connected to pin 66 MIX output must be
connected to (VCC).
67
Vref 4.9V
4.9V regulator
63
AM 2nd MIX input
AM MIX input
69
/AM AGC pick up
AMP for AM N-AGC pickup
Input impedance 10kΩ
68
RF DAC1
8bit DAC
70
RF DAC2
8bit DAC
71
FM/AM 1st IF
10.7M AMP for FM/AM
72
AMP IN
Input impedance=330Ω
Continued on next page.
No.A0976-20/45
LV25200M
Unit (Resistance: Ω, Capacitance: F)
Continued from preceding page.
Pin
Function
Discription
73
AM antenna damping
For pin diode drive
output
I73=6mA
Internal Equivalent Circuit
ANT damping current
74
FM N-AGC IN
AMP for N-AGC pickup incorporated
75
FM/AM 1st MIX OUT
FM/AM MIX OUT (common)
76
77
VCC (8V)
FM FE, AM
78
AM 1st MIX IN
AM MIX input
Input impedance=10kΩ
79
FM MIX IN
FM MIX input
80
FM W-AGC pick up
FM W-AGC pickup
Input impedance=10kΩ
No.A0976-21/45
LV25200M
FM/AM level Diagram
No.A0976-22/45
LV25200M
Serial Bus Data Timing
CE: Chip enable
CL: Clock
DI: Input data
DO: Output data
≈
<<CL stopped at “L” level >>
VIH
tCL
VIH
VIL
CL
VIH
VIH
tHD
VIL
DO
Internal data
latch
VIL
tES
≈ ≈ ≈ ≈ ≈ ≈
tSU
VIH
tEL
DI
VIL
VIL
tDC
VIH
≈ ≈ ≈ ≈ ≈ ≈ ≈
tCH
≈ ≈
CE
tEH
tDH
tLC
Old
New
≈
<<CL stopped at “H” level >>
VIH
VIH
VIH
VIH
DI
VIL
tSU
tHD
VIL
DO
Internal data
latch
Parameter
≈ ≈ ≈ ≈ ≈ ≈ ≈
CL
≈
tCH
VIH
VIL
Symbol
Pin
VIH
VIL
tEL
tES
tDC
Conditions
tEH
≈ ≈ ≈ ≈ ≈ ≈
tCL
VIL
≈
CE
tDH
tLC
Old
min
typ
New
max
unit
Data setup time
tSU
DI, CL
0.45
μs
Data hold time
tHD
DI, CL
0.45
μs
Clock L level time
tCL
CL
0.45
μs
Clock H level time
tCH
CL
0.45
μs
CE wait time
tEL
CE, CL
0.45
μs
CE setup time
tES
CE, CL
0.45
μs
CE hold time
tEH
CE, CL
0.45
Data latch change time
tLC
Data output time
tDC
DO, CL
Varies depending on the pull-
tDH
DO, CE
up resistance
μs
0.45
μs
0.2
μs
No.A0976-23/45
LV25200M
Serial Data I/O Method
This is the Sanyo Audio IC serial bus format. Data I/O is made with CCB (Computer Control Bus).
LV25200M is the 8-bit address type CCB.
Address
I/O
mode
B0
B1
B2
B3
A0
A1
A2
A3
[1]
IN1
0
0
0
1
0
1
0
0
[2]
IN2
1
0
0
1
0
1
0
0
[3]
IN3
1
0
0
1
0
1
1
0
[4]
OUT
0
1
0
1
0
1
0
0
Description
• Control data input (serial data input) mode. PLL setting
• 32-bit data input
• Control data input (serial data input) mode. PLL setting
• 32-bit data input
• Control data input (serial data input) mode, set by the tuner
• 32-bit data input with sub-address
• Output data (serial data output) mode
• Output of data corresponding to the clock amount. Max 48 bits
I/O mode determination
CE
CL
DI
B0
B1
B2
B3
A0
A1
A2
A3
First Data IN1/2
DO
First Data OUT
i) Serial data input (IN1/IN2/IN3) tSU, tHD, tES, tEL, tEH, > 0.45μs tLC < 0.45μs
t ES
tE L
t EH
CE
CL
tSU
DI
t HD
B0
B1
B2
B3
A0
A1
A2
A3
P0
P1
P2
P3
*
CTS GT0 GT1
t LC
Internal data
ii) Serial data output (OUT) tSU, tHD, tES, tEL, > 0.45μs tDC, tDH < 0.2μs (*1)
t ES
tE L
t EH
CE
CL
t HD
t SU
DI
B0
B1
B2
B3
A0
A1
A2
A3
t DC
DO
(*2)
I5
I4
t DH
AD13 A D12 AD11 AD10
(*2)
(*1) As the DO pin is the Nch open drain pin, so that the data change time varies depending on the pull-up resistance
and substrate capacity.
(*2) Normally, keep the DO pin in the OPEN state.
No.A0976-24/45
LV25200M
bit specification
IN1 setting
B B B B
0 1 2 3
0
0
0
OSC dividing ratio control for AM
A
0
1
A
1
0
A
2
1
A
3
0
OSD D1 OSC D2
0
0
1
1
Dividing ratio
0
1
0
1
CTE
0
1
IF count reset
IFcount start
DVS
0
1
Program-CTR stop
Program-CTR normal operation
10-division
8-division
6-division
4-division
0
Address Code
D1-1
D1-2
D1-3
D1-4
D1-5
D1-6
D1-7
D1-8
D1-9
D1-10
D1-11
D1-12
D1-13
D1-14
D1-15
D1-16
D1-17
D1-19
D1-20
D1-21
D1-22
D1-23
D1-24
D1-25
D1-26
D1-27
D1-28
D1-29
D1-30
D1-31
P0
P1
P2
P3
P4
P5
P6
P7
P8
P9
P10
P11
P12
P13
P14
P15
OSC D1
OSC D2
CTE
R0
R1
R2
R3
DVS
AM/FM
SEEK1
SEEK2
MODE1
MODE2
WEATHER
DIV_SW3
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
H
L
L
L
L
L
L
(1)
(2)
Setting Program-CTR divisions (272 to 65535 divisions)
00 0 0 1 0 0 0 1 0 0 0 0 0 0 0
272-division
:
:
00 1 0 1 1 1 1 1 0 0 0 0 0 0 0
500-division
:
:
00 0 1 0 1 1 1 1 1 0 0 0 0 0 0
1000-division
:
:
00 0 0 1 0 1 1 1 1 1 0 0 0 0 0
2000-division
:
:
10 1 0 1 0 1 0 1 0 1 0 1 0 1 0
21845-division
:
:
01 0 1 0 1 0 1 0 1 0 1 0 1 0 1
43690-division
:
:
11 1 1 1 1 1 1 1 1 1 1 1 1 1 1
65535-division
D1-18
D1-0
Initial data
at power ON
(3)
(4)
(5) (6)
(7)
(8)
(9)
Reference frequency setting
00 0 0
Do not use
10 0 0
100kHz
01 0 0
50kHz
11 0 0
25kHz
00 1 0
12.5kHz
10 1 0
6.25kHz
01 1 0
3.125kHz
11 1 0
3.125kHz
00 0 1
10kHz
10 0 1
Do not use
01 0 1
5kHz
11 0 1
1kHz
00 1 1
Do not use
10 1 1
Do not use
01 1 1
Do not use
11 1 1
Do not use
AM/FM
0
FM
1
AM
PLL filter changeover
MODE1
MODE2 AM/FM SEEK1 SEEK2 AM filter FM filter
Tuner mode changeover
SEEK1
SEEK2
IFBC output
0
0
1
1
Do not use
STOP
RDS
SEEK
0
0
0
*
*
OFF
ON
0
0
1
*
*
ON
OFF
1
0
0
1
1
OFF
ON
1
0
0
0
1
OFF
ON
1
0
0
1
0
ON
OFF
OSC ratio control for AM/FM/WB
1
0
1
*
*
ON
OFF
WEATHER DIV_SW3
0
1
0
1
1
OFF
ON
0
1
0
0
1
OFF
ON
0
1
0
1
0
ON
ON
0
1
1
*
*
ON
ON
0
1
0
1
0
0
1
1
0
1
0
1
Dividing ratio
2-division
3-division
1-division
1-division
* Select “1” for WB: Weather Band
* Don’t care
No.A0976-25/45
LV25200M
Dead zone control
IN2
B
0
B
1
1
0
B
3
A
0
A
1
A
2
0 1 0 1
Address Code
0
0
FM AGC ON
0 Normal
1 ON
Dead zone
0
0
1
1
DZA
DZB
DZC
DZD
D2-14
D2-15
D2-16
D2-17
D2-18
D2-19
D2-20
D2-21
D2-22
D2-23
D2-24
D2-25
D2-26
D2-27
D2-28
D2-29
D2-30
D2-31
AMAGC_ON
CTC
CTP
GT0
GT1
DT0
DT1
ULD
UL0
UL1
CTS
PDC0
PDC1
DZ0
DZ1
DLC
TEST0
TEST1
TEST2
SDSPEED
(12)
D2-13
X_SW_2
L
IL1
D2-8
X_SW_1
L
FMAGC_ON
D2-7
X_SW_0
L
D2-12
D2-6
0
L
D2-11
D2-5
0
L
0
D2-4
0
H
Charge pump control
0
Normal
1
Low-level
IL0
D2-3
0
L
AM AGC ON
0 Normal
1 ON
D2-10
D2-2
0
L
(11)
DZ1
0
1
0
1
D2-9
D2-1
L
(10)
DZ0
AM-SD-SPEED
0 Normal
1 fast
A
3
D2-0
Initial data
at power ON
B
2
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
(13)
(14)
(15)
(16)
(17)
(18)
(19)
(20)
(21)
LSI internal signal
I/O port
Control data
(22)
(23)
LSI test mode
Normally,
TEST0=0
TEST1=0
TEST2=0
0: Input 1: Output
Normally, 0
IF count input sensitivity
X’tal OSC ADJ
0 0 0 High(+390Hz)
10 0
↓
01 0
↓
1 1 0 20.5MHz (center value)
00 1
↓
10 1
↓
01 1
↓
1 1 1 Low (-350Hz)
0
Normal
1
Worse
PDC
* 0
01
11
CTS
0
1
DO pin control data
DT1
DT0
DO pin
UL0
UL1
0
0
0
0
0
0
1
1
0
1
0
1
Low when unlocked
end-AD
end-UC
(See IN below)
0
1
0
1
0
0
1
1
1
1
1
1
0
0
1
1
0
1
0
1
Open
end-AD
end-UC
(See IN below)
DO pin control data 2
IL1
0
1
0
1
0
0
1
1
IF count stop
IF count normal operation
Unlock detection changeover
ULD
IL0
High impedance
Charge pump operation (unlocked)
Charge pump operation (normal)
Stop
0
±0.5μs
±1μs
Detection pin output
Open
φE output directly
φE extended by 1 to 2ms
φE extended by 1 to 2ms
IF count measuring time setting
Frequency measurement
GT1
GT0
0
0
1
1
0
1
0
1
IN
Open
SD pin state (PIN13)
Pin I2 state (not used)
Do not use
φE detection width
Measurement
time
4
8
32
64
Wait time
CTP=0
CTP=1
3 to 4ms
3 to 4
7 to 8
7 to 8
1 to 2ms
1 to 2
1 to 2
1 to 2
Frequency
measurement
mode
1 cycle
1 cycle
2 cycles
2 cycles
No.A0976-26/45
LV25200M
IN3-1 tuner setting 2
Address 69h, Subaddress[ 0 0 ]
B B B B A A A A
0 1 2 3 0 1 2 3
1
0
0
1
0
1
1
0
0
Address Code
0
Sub Address Code
D31-18
D31-19
D31-20
D31-21
D31-22
D31-23
D31-24
D31-25
D31-26
D31-27
D31-28
D31-29
D31-30
D31-31
(24)
D31-17
D31-8
L
D31-16
D31-7
L
D31-15
D31-6
L
D31-14
D31-5
L
D31-13
D31-4
L
D31-12
D31-3
L
D31-11
D31-2
L
D31-9
D31-1
L
D31-10
D31-0
Initial data
at power ON L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
(25)
Internal monitor changeover
0 IF-Filter
1 No use
RF- DAC
000000000
100000000
010000000
110000000
001000000
101000000
011000000
111000000
000100000
•
•
010111111
110111111
001111111
101111111
011111111
111111111
0
0.3V
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
7.1V
(26)
(27)
MSLOP
0 Mute_D (steep inclination)
1 Mute_D (gentle inclination)
ANT- DAC
000000000
100000000
010000000
110000000
001000000
101000000
011000000
111000000
000100000
•
010111111
110111111
001111111
101111111
011111111
111111111
000
100
010
•
000
100
010
Test-PAD--2
D4 D3
OUT
0 0
W_AGC
0 1
N_AGC
1 0 A_IFGAIN
1 1 QDP_ADJ
Max (220k)
•
•
•
101
011
111
101
011
111
Max (80k)
(65)
Test-PAD--1
D2 D1 D0
OUT
0 0 0
VSM_SHIFTER
0 0 1
FM-Mute-ON-Adj
0 1 0
NC_GT(DACOUT)
0 1 1 SNC_DAC / ARAG(H)
1 0 0
HCC_DAC
1 0 1
SD_ADJ
1 1 0 Mute_ATT(DACOUT2)
1 1 1
Mute-ANG
D23 D24 D25
Min (40k)
(30)
TEST for DAC
0: Normal
1: Test-Mode
Band variable filter
Narrow/wide Min (Max) value control
Wide LMT Cont
Narrow LMT Cont
D20 D21 D22
(29)
Filter-Fix_SW
D26 D27
Filter-Mode
0
0
Variable
1
0
Narrow-Fix
0
1
Wide-Fix
1
1
Dont Care
0.3V
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
7.1V
•
(28)
Test-PAD--3
D7 D6 D5
OUT
0 0 0
F_IFGAIN
0 0 1
NULL_VOL
0 1 0 AFC_BW(TSOUT=-2VBE)
0 1 1
AM_RFAGC(S)
1 0 0
KEYD_AGC
Min (150k)
No.A0976-27/45
LV25200M
IN3-2 tuner setting2
Address 69h, Subaddress[ 0 0 1 ]
B
B
B
B
A
A
A
A
0
1
2
3
0
1
2
3
1
0
0
1
0
1
1
0
0
Address Code
0
1
Sub Address Code
D32-18
D32-19
D32-20
D32-21
D32-22
D32-23
D32-24
D32-25
D32-26
D32-27
D32-28
D32-29
D32-30
D32-31
(31)
D32-17
D32-8
L
D32-16
D32-7
L
D32-15
D32-6
L
D32-14
D32-5
L
D32-13
D32-4
L
D32-12
D32-3
L
D32-11
D32-2
L
D32-9
D32-1
L
D32-10
D32-0
Initial data
at power ON L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
(32)
(33)
FM Mute-ON-Adj.
/AM NC stop
00000
0.135
10000
↓
01000
11000
00100
10100
01100
•
•
10011
01011
11011
00111
10111
01111
11111
S-Meter Shift(TSOUT)
00000
177μA
10000
↓
01000
↓
11000
↓
00100
↓
10100
↓
01100
↓
11100
↓
↓
•
↓
•
01011
↓
11011
↓
00111
↓
10111
↓
01111
↓
11111
221μA
(34)
(35)
Weak input Mute changeover
(Mute-ANG)
000
0.2
100
010
110
001
101
011
111
0.8
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
1.7
FM Mute-ATT.
/AM NC Gate-Time
000000
0.1
100000
010000
110000
001000
101000
011000
•
•
100111
010111
110111
001111
101111
011111
111111
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
1.89
0.14
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
2.7
(36)
(37)
(65)
Tuner OFF mode
0 Normal
1 Tuner-OFF
FM-IF-Gain
/AM NC Gain
0000
2.2
1000
0100
1100
0010
1010
0110
1110
0001
1001
0101
1101
0011
1011
0111
1111
2.8
FM/AM SD Adjust (at SEEK)
NC-AGC threshold voltage setting (at reception)
00000
0.25
10000
↓
01000
↓
11000
↓
00100
↓
10100
↓
01100
↓
11100
↓
↓
•
↓
•
01011
↓
11011
↓
00111
↓
10111
↓
01111
↓
11111
2.65
No.A0976-28/45
LV25200M
IN3-3 tuner setting2
Address 69h, Subaddress[ 0 1 0 ]
B
B
B
B
A
A
A
A
0
1
2
3
0
1
2
3
1
0
0
1
0
1
1
0
0
Address Code
0
D33-0
D33-1
D33-2
D33-3
D33-4
D33-5
D33-6
D33-7
D33-8
D33-9
D33-10
D33-11
D33-12
D33-13
D33-14
D33-15
D33-16
D33-17
D33-18
D33-19
D33-20
D33-21
D33-22
D33-23
D33-24
D33-25
D33-26
D33-27
D33-28
D33-29
D33-30
D33-31
Initial data
at power ON
1
Sub Address Code
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
(38)
(39)
FM/AM
W-AGC
Sensitivity
0 0 0 0 0.14
1000
0100
1100
0010
1010
0110
1110
0001
1001
0101
1101
0011
1011
0111
1 1 1 1 2.57
FM/AM
N-AGC
Sensitivity
0000
1000
0100
1100
0010
1010
0110
1110
0001
1001
0101
1101
0011
1011
0111
1111
(40)
Keyed-AGC
/AM-IF-Gain
0000
0.14
1000
0100
1100
0010
1010
0110
1110
0001
1001
0101
1101
0011
1011
0111
1111
2.2
0.2
2.5
(41)
(42)
(43)
(44)
(45)
(65)
Vref 2.7V ADJ
00
10
01
11
Null Voltage
00000
0.87
10000
01000
11000
00100
10100
01100
Low
Typ
Little High
High
•
•
10011
01011
11011
00111
10111
01111
11111
1.8
SD detection band width setting (at FM-SEEK)
Band variable filter start point setting
(FM reception)
0000
0.54
1000
0100
1100
0010
1010
0110
1110
0001
1001
0101
1101
0011
1011
0111
1111
2.19
Mute-ATT-SW/AM-Vsm-Shift
0 0 Low(Steep inclination)
10
01
1 1 High(Gentle inclination)
QD P-ADJ
0000
1000
0100
1100
0010
1010
0110
1110
0001
1001
0101
1101
0011
1011
0111
1111
0.83
1.39
No.A0976-29/45
LV25200M
IN3-4 tuner setting2
Address 69h, Subaddress[ 0 1 1 ]
B
B
B
B
A
A
A
A
0
1
2
3
0
1
2
3
1
0
0
1
0
1
1
0
Pi-Can
(Pilot Cancel Level Control)
0 0 Center (AM-NC=OFF )
1 0 Low
(same as above)
0 1 High
(same as above)
1 1 OFF
( AM-NC=ON)
0
Address Code
1
Sub Address Code
D34-0
D34-1
D34-2
D34-3
D34-4
D34-5
D34-6
D34-7
D34-8
D34-9
D34-10
D34-11
D34-12
D34-13
D34-14
D34-15
D34-16
D34-17
D34-18
D34-19
D34-20
D34-21
D34-22
D34-23
D34-24
D34-25
D34-26
D34-27
D34-28
D34-29
D34-30
D34-31
Initial data
at power ON
1
Noise-AGC
0 No Limit
1 Limit
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
(46)
(47)
(48)
SNC DAC/(AM-RF-AGC)
Amp threshold
(gentle inclination side)
00000
0.07(1.35)
(1 0 0 0 0
↓
01000
↓
11000
↓
00100
↓
10100
↓
01100
↓
11100
↓
↓
•
↓
•
01011
↓
11011
↓
00111
↓
10111
↓
01111
↓
11111
1.15(2.46)
Separation control
000000
L-R Level Max.
100000
↓
010000
↓
110000
↓
001000
↓
101000
↓
011000
↓
111000
↓
↓
•
↓
•
010111
↓
110111
↓
001111
↓
101111
↓
011111
↓
111111
L-R Level Min.
(49)
(50)
(51) (52)
Force MONO
0 Normal
1 Forced MONO
•
•
01011
11011
00111
10111
01111
11111
(55) (56) (57)
(65)
AC-S meter load
changeover
0 Hi
1 Low
De-emphasis
0 50μs
1 75μs
0.5
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
1.5
(54)
NC-forced AGC
application point
changeover
0 For AM
1 For FM
SNC inclination
00
10
01
11
FM/AM
HCC DAC.
00000
10000
01000
11000
00100
10100
01100
11100
(53)
Noise-Sens setting
00
Easy to detect
10
↓
01
↓
11
Difficult to detect
Noise-AGC
Threshold voltage forced application
0 OFF(Normal)
1 ON(controlled with SD-ADJ-DAC)
No.A0976-30/45
LV25200M
IN3-5 tuner setting2
Address 69h, Subaddress[ 1 0 0 ]
B
B
B
B
A
A
A
A
0
1
2
3
0
1
2
3
1
0
0
1
0
1
1
0
1
Address Code
0
D35-20
D35-21
D35-22
D35-23
D35-24
D35-25
D35-26
D35-27
D35-28
D35-29
D35-30
D35-31
(59) (60)
D35-19
(58)
D35-18
L
D35-17
D35-8
L
D35-16
D35-7
L
D35-15
D35-6
L
D35-14
D35-5
L
D35-13
D35-4
L
D35-12
D35-3
L
D35-11
D35-2
L
D35-9
D35-1
L
D35-10
D35-0
Initial data
at power ON
0
Sub Address Code
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
(61)
(62)
(63)
(64)
(65)
MRC
Sensitivity
0 0 Low
10
↓
01
↓
1 1 High
VCO ON
During
measurement: Hi
HCC SW
1 FM
0 AM
MRC Time constant
(Attack: Release Time)
0 0 Short
10
01
1 1 Long
MPX VCO
(Free-Run Freq. Control)
000000
Freq=Low
100000
↓
010000
↓
110000
↓
001000
↓
101000
↓
011000
↓
111000
↓
↓
•
↓
•
010111
↓
110111
↓
001111
↓
101111
↓
011111
↓
11111
Freq=High
“Filter-Wide fixed“
Filter-initial adjustment
sensitivity/AM-RF-AGC
D12-14
Gain
Gain adjustment
Amp threshold
D15-19
CF
CF adjustment
(steep inclination side)
0000
0.37
D20-24
BW/G
BW/G adjustment
1000
0100
1100
“Gain adjustment“
“BW/G adjustment“
“CF adjustment“
0010
D12 13D D14
D20 • • • D24.
D15 • • • D19.
1010
111
1 1 1 1 1 CF Left Shift
1 1 1 1 1 BW(W)G↓
Gain Low
0110
011
01111
01111
1110
101
10111
10111
0001
000
Typical
•
•
1001
100
•
•
0101
010
01001
01001
1101
110
Gain High
10001
10001
0011
0 0 0 0 0 Typical
0 0 0 0 0 Typical
1011
10000
10000
0111
01000
01000
1111
2.04
•
•
•
•
10110
01110
11110
10110
01110
11110
CF Right Shift
BW(N)G↑
No.A0976-31/45
LV25200M
BIT Control Standard: Reference Value
1. FM S-meter shifter
LSB
MSB
D32-0
D32-1
D32-2
D32-3
D32-4
Function
0
0
0
0
0
Vsm(DC)=1.85V: +8dB
↑
0
0
0
0
1
Vsm(DC)=1.85V: 0dB
1
1
1
1
1
Vsm(DC)=1.85V: -7dB
↓
2-1. FM Mute-ON-adj
LSB
2-2. AM NC stop
MSB
LSB
0
-3dB Limitting sens: -6dB
D32-9
D32-9
0
D32-8
D32-8
0
D32-7
D32-7
0
D32-6
D32-6
0
D32-5
D32-5
Function
MSB
Function
0
0
0
0
0
Vsm (DC) for AM NC STOP=0.3V
↑
1
1
1
1
0
-3dB Limitting sens: 0dB
↑
0
0
0
0
1
Vsm (DC) for AM NC STOP=2.3V
1
1
1
1
1
Vsm (DC) for AM NC STOP=4.2V
↓
1
1
1
1
1
-3dB Limitting sens: +10dB
3-1. FM Mute-ATT
LSB
↓
3-2. AM NC Gate-Time
MSB
LSB
0
MUTE attenuation: -0.5dB
D32-15
D32-15
0
D32-14
D32-14
0
D32-13
D32-13
0
D32-12
D32-12
0
D32-11
D32-11
0
D32-10
D32-10
Function
MSB
Function
0
0
0
0
0
0
INPUT=60dBμV: 1000μs
↑
0
0
0
0
0
1
MUTE attenuation: -13dB
↑
0
0
0
0
0
1
INPUT=60dBμV: 350μs
1
1
1
1
1
1
INPUT=60dBμV: 200μs
↓
1
1
1
1
1
1
MUTE attenuation: -25dB
↓
4. FM weak input Mute changeover
(FM Mute-ON-adj:0000)
LSB
MSB
D32-16
D32-17
D32-18
Function
0
0
0
INPUT=-20dBμV V42: 1.45V
1
1
0
INPUT=-20dBμV V42: 2.0V
↑
↓
1
1
1
INPUT=-20dBμV V42: 2.7V
No.A0976-32/45
LV25200M
5-1. FM SD Adjust
LSB
5-2. AM SD Adjust
MSB
LSB
0
SD on level: -19dB
0
0
0
0
1
SD on level: 0dB
D32-23
D32-23
0
D32-22
D32-22
0
D32-21
D32-21
0
D32-20
D32-20
0
D32-19
D32-19
Function
MSB
Function
0
0
0
0
0
SD on level: -13dB
0
0
0
0
1
SD on level: 0dB
↑
↑
↓
1
1
1
1
1
SD on level: +20dB
↓
1
1
1
1
1
SD on level: +25dB
6-1. FM IF-Gain
LSB
MSB
D32-24
D32-25
D32-26
D32-27
Function
0
0
0
0
450kHz limit AMP: -6dB
0
0
0
1
450kHz limit AMP: 0dB
↑
↓
1
1
1
1
450kHz limit AMP: +6dB
7-1. FM W-AGC
LSB
7-2. AM W-AGC
MSB
LSB
0
W-AGC on level: -2dB
D33-3
D33-3
0
D33-2
D33-2
0
D33-1
D33-1
0
D33-0
D33-0
Function
MSB
Function
0
0
0
0
N-AGC on level: -9.5dB
0
0
0
1
N-AGC on level: 0dB
1
1
1
1
W-AGC on level: +6dB
↑
0
0
0
1
W-AGC on level: 0dB
1
1
1
1
W-AGC on level: +2dB
↑
↓
8-1. FM N-AGC
LSB
↓
8-2. AM N-AGC
LSB
MSB
0
N-AGC on level: -9dB
D33-7
D33-7
0
D33-6
D33-6
0
D33-5
D33-5
0
D33-4
D33-4
Function
MSB
Function
0
0
0
0
N-AGC on level: -10dB
↑
0
0
0
1
N-AGC on level: 0dB
↑
0
0
0
1
N-AGC on level: 0dB
1
1
1
1
N-AGC on level: +6.5dB
↓
1
1
1
1
N-AGC on level: +6dB
↓
No.A0976-33/45
LV25200M
9-1. FM Keyed-AGC
LSB
9-2. AM IF-Gain
MSB
LSB
0
V38 for Keyed AGC ON: 0.12V
D33-11
D33-11
0
D33-10
D33-10
0
D33-9
D33-9
0
D33-8
D33-8
Function
MSB
Function
0
0
0
0
AM 450kHz AMP Gain: -7.5dB
0
0
0
1
AM 450kHz AMP Gain: 0dB
1
1
1
1
AM 450kHz AMP Gain: -4.5dB
↑
0
0
0
1
V38 for Keyed AGC ON: 1.2V
1
1
1
1
V38 for Keyed AGC ON: 2.1V
↑
↓
10-1. FM Mute-ATT-SW
LSB
↓
10-2. AM Vsm-shifter
MSB
LSB
MSB
D33-25
D33-26
Function
D33-25
D33-26
Function
0
0
MUTE attenuation at V42=1V: -6dB
0
0
Vsm(DC)=1.5V ANT IN: 30dBμV
1
0
MUTE attenuation at V42=1V: -8dB
1
0
Vsm(DC)=1.5V ANT IN: 38dBμV
0
1
MUTE attenuation at V42=1V: -13dB
0
1
Vsm(DC)=1.5V ANT IN: 45dBμV
1
1
MUTE attenuation at V42=1V: -19dB
1
1
Vsm(DC)=1.5V ANT IN: 55dBμV
11-1. FM SNC DAC
LSB
MSB
D34-10
0
0
SEPARATION=15dB INPUT: -26dB
0
1
0
SEPARATION=15dB INPUT: -6dB
0
0
0
0
1
SEPARATION=15dB INPUT: 0dB
0
0
0
1
1
SEPARATION=15dB INPUT: +5dB
1
1
1
1
1
SEPARATION=15dB INPUT: +11dB
D34-9
0
0
D34-8
0
0
D34-7
0
D34-6
Function
12-1. FM HCC DAC
LSB
12-2. AM HCC DAC
MSB
LSB
0
V29 at 10kHz mod, -6dB: 0.4V
D34-15
D34-15
0
D34-14
D34-14
0
D34-13
D34-13
0
D34-12
D34-12
0
D34-11
D34-11
Function
MSB
Function
0
0
0
0
0
V29 at 4kHz mod, -6dB: 0.04V
0
0
0
0
1
V29 at 4kHz mod, -6dB: 0.82V
1
1
1
1
1
V29 at 4kHz mod, -6dB: 1.3V
↑
0
0
0
0
1
V29 at 10kHz mod, -6dB: 0.85V
1
1
1
1
1
V29 at 10kHz mod, -6dB: 1.3V
↑
↓
↓
13-1. MRC Time constant
LSB
MSB
D35-27
D35-28
Function
0
0
Pin 39 output current: 2.9μA
1
0
Pin 39 output current: 2.2μA
0
1
Pin 39 output current: 1.5μA
1
1
Pin 39 output current: 0.8μA
No.A0976-34/45
LV25200M
Description Of Control Data
No.
Control block/data
(1)
Programmable divider data
¤ Data to set the dividing ratio of the programmable divider.
P0 to P15
Binary value with P0 as LSB and P15 as MSB
AM OSC dividing ratio
¤ OSC dividing ratio determination for AM OSC D1 and OSC D2
(2)
Description
(3)
General-purpose counter
AM/FM
OSC D1,D2
OSC D1
OSC D2
Dividing ratio
0
0
10-division
0
1
8-division
1
0
6-division
1
1
4-division
OSC D1,OSC D2
Related data
¤ General-purpose counter measurement start data
CTS
measurement start control
GT0,GT1
CTE
CTE
(4)
Reference divider data
R0 to R3
(5)
Stop of programmable
divider
DVS
AM/FM
P0 to P15
=1: Count start
CTP
=0: Count reset
CTC
¤ Reference frequency (fref) selection data
R3
R2
R1
R0
Reference frequency (kHz)
0
0
0
0
Do not use
0
0
0
1
100
0
0
1
0
25
0
0
1
1
25
0
1
0
0
12.5
0
1
0
1
6.25
0
1
1
0
3.125
0
1
1
1
3.125
1
0
0
0
10
1
0
0
1
Do not use
1
0
1
0
5
1
0
1
1
1
1
1
0
0
Do not use
1
1
0
1
Do not use
1
1
1
0
Do not use
1
1
1
1
Do not use
CTS
¤ DVS=0: PLL-IN pin in IC stopped (pulled-down)
GT0,GT1
1: PLL-IN pin in IC selected
Set number of divisions (N): 272 to 65536
CTP
Input frequency range: 120 to 270MHz
CTC
* For details, refer to “Programmable Divider Composition.”
(6)
Tuner mode changeover
AM/FM
(7)
Tuner mode changeover
SEEK1, SEEK2
¤ AM/FM mode changeover
P0 to P15
1=AM 0=FM
OSC D1,D2
MODE1,
¤ Data to determine the mode of tuner
SEEK1
SEEK2
IF buffer control output
0
0
Do not use
1
0
STOP
0
1
RDS
1
1
SEEK
MODE2
Continued on next page.
No.A0976-35/45
LV25200M
Continued from preceding page.
No.
(8)
Control block/data
PLL filter changeover
MODE1,MODE2
(9)
OSC dividing ratio control
Description
¤ Data to select/changeover the PLL filter
* don’t care
AM/FM
MODE1
MODE2
AM/FM
SEEK1
SEEK2
AM filter
FM filter
SEEK1,
0
0
0
*
*
OFF
ON
SEEK2
0
0
1
*
*
ON
OFF
1
OFF
ON
1
0
0
1
1
0
0
0
1
OFF
ON
1
0
0
1
0
ON
OFF
1
0
1
*
*
ON
OFF
0
1
0
1
1
OFF
ON
0
1
0
0
1
OFF
ON
0
ON
ON
*
ON
ON
0
1
0
1
0
1
1
*
¤ Data to set the OSC dividing ratio at reception of AM/FM/WB
WEATHER
DIV_SW3
Dividing ratio
0
0
2-division
0
1
3-division
1
0
1-division
1
1
1-division
WEATHER
DIV_SW3
(10)
Related data
IC internal signal I/O port
Data to designate I/O of the I/O port
Control data
“Data” =0: input port
AM/FM
P0 to P15
OSC D1,
OSC D2
Select “0” normally.
=1: output port Select “1” for IC test
* Select “0” for cases other than IC test.
(11)
X-TAL OSC
Data to detune the reference frequency X’tal=20.5MHz when beat has occurred
Fine adjustment data
Variable by about 100Hz per bit in eight steps of 0 to 7 bits
X’tal to be loaded with the external capacity at the 3-bit (110) setting
X’tal OSC ADJ
(12)
AMSD speedup
000
+390Hz
100
+250Hz
010
+110Hz
110
X’tal (center value)
001
-100Hz
101
-190Hz
011
-280Hz
111
-350Hz
Data to speed up the SD rise time in the AM mode
“SDSPEED”=0: NORMAL mode
SDSPEED
(13)
DO pin
Control data
IL0,IL1
=1: speedup mode
¤ Data to control the DO pin output
IL1
Il0
0
0
Open
IN
0
1
SD pin state (PIN13)
1
0
Pin I2 state (not used)
1
1
Do not use
Open when I/O-1 and I/O-2 pins are designated as output ports.
Note) Do not use with X’tal OSC STOP (DO does not change)
(14)
AM/FM-AGC ON
Data to make AGC of each of AM and FM effective
Control data
“FMAGC_ON”=0: NORMAL mode
For FM
=1: Forced ON mode
FMAGC_ON
AMAGC_ON
(15)
“AMAGC_ON”=0: NORMAL mode
=1: Forced ON mode
For AM
IF count sensitivity
¤ Decrease the input sensitivity with CTC=1.
deterioration control data
* Do not attempt change of bits during count (except for EVR).
CTC
Continued on next page.
No.A0976-36/45
LV25200M
Continued from preceding page.
No.
(16)
Control block/data
Description
Related data
General-purpose counter
¤ Data to determine the general-purpose counter measurement time
Control data
(frequency mode) and number of cycles (cycle mode).
Frequency measurement
GT0, GT1
CTP
GT1
GT0
0
0
Cycle measurement
Wait time
Measurement
mode
time
CTP=0
CTP=1
4ms
3 to 4ms
1 to 2ms
1 cycle
0
1
8ms
3 to 4ms
1 to 2ms
1 cycle
1
0
32ms
7 to 8ms
1 to 2ms
2 cycles
1
1
64ms
7 to 8ms
1 to 2ms
2 cycles
¤ CTP=0: General-purpose counter input stopped at counter reset (CTE=0)
=1: General-purpose counter input not stopped and the wait time shortened at
counter reset (CTE=0)
Except that Immediately after setting of CTP=1, it is necessary to wait for counter start
till the general-purpose counter input pin is biased.
(17)
DO pin control data
ULD
DT0, DT1
¤ Data to determine the output of DO pin.
ULD
DT1
DT0
DO pin
0
0
0
Low when unlocked
0
0
1
Do not use
0
1
0
end-UC
0
1
1
IN (*1)
1
0
0
Open
1
0
1
Do not use
1
1
0
end-UC
1
1
1
IN (*1)
≈
end-UC: Count over of the general-purpose counter
≈
DO
Start
(18)
Unlock detection data
End
(I-1 change)
CE:Hi
¤ Data to select the phase error (φE) detection width in order to check PLL for locking.
ULD
Phase error exceeding the φE detection width shown in the table below is determined to
UL0, UL1
DT0, DT1
indicate unlock. At unlock, the detection pin (DO) becomes Low.
UL1
UL0
φE detection width
Detection pin output
0
0
Stop
Open
0
1
0
φE output directly
1
0
±0.5μs
φE extended by 1 to 2ms
1
1
±1μs
φE extended by 1 to 2ms
≈
φE
DO
Extension
≈
1 to 2ms
Unlock output
(19)
IF count operation control
data
CTS
(20)
Sub-charge pump control
data
PDC0, PDC1
¤ Data to select the general-purpose counter input pin (HCTR) in IC
CTS=1: HSTR pin in IC selected
0: HCTR pin in IC pulled down
¤ Data to control the sub-charge pump
PDC1
PDC0
UL0, UL1,
DLC
Sub-charge pump state
0
*
High impedance
1
0
Charge pump operating (unlocked)
1
1
Charge pump operating (normal)
(*: don’t care)
* The sub-charge pump output is connected internally with the LPF FET gate.
The sub-charge pump and the PD (main charge pump) pin are combined to form the fast
lockup circuit.
* Except that this may not be effective depending on the filter multiplier (lighter filter).
Continued on next page.
No.A0976-37/45
LV25200M
Continued from preceding page.
No.
(21)
Control block/data
Phase comparator control
Description
Related data
¤ Data to control the dead band of phase comparator
data
DZ0, DZ1
DZ1
DZ0
Deadban mode
0
0
DZA
0
1
DZB
1
0
DZC
1
1
DZD
* DZA at power ON and power reset
(22)
Charge pump control data
¤ Data to set the charge pump output to the low level (VSS level) in a forced manner.
DLC=1: Low level
DLC
=0: Normal operation
* When the VCO control voltage (Vtune) is deadlocked because VCO stops oscillation at
0V, this data sets the charge pump output to the low level and Vtune to VCC, enabling
escape from the deadlock state. Normal operation mode at power ON and power reset
(23)
IC test data
¤ IC test data
Set as follows:
TEST0
TEST0=0
TEST1
TEST1=0
TEST2
TEST2=0
* All of test data is set to “0” at power ON and power reset.
(24)
(25)
RF-DAC control
¤ Causes application of the control voltage to the RF tuning circuit (varactor).
D31-0 to D31-8
9BIT
Internal monitor changeover
¤ Data to changeover the internal monitor.
data
1BIT
D31-9
(26)
(27)
ANT-DAC control
¤ Causes application of the control voltage to the ANT tuning circuit (varactor).
D31-10 to D31-18
9BIT
MSLOP Control changeover
¤ Data to change over the FM MUTE curve inclination.
MSLOP
1BIT
data
D31-19
(28)
Band variable filter control
data
0
Mute_D (steep inclination)
1
Mute_D (gentle inclination)
¤ Narrow/wide band - (MIN/MAX) data to set the band variable filter
Each 3bits for narrow and wide bands
Band variable filter
D31-20 to D31-25
Narrow/wide band MIN/MAC control value
Wide LMT Cont
Narrow LMT Cont
D20 D21 D22
000
100
010
•
•
101
011
111
(29)
(30)
Min (40k)
Max (80k)
D23 D24 D25
Max (220k)
000
100
010
•
•
101
011
Min (150k)
111
Band variable filter mode
¤ Data to set the mode of band variable filter.
setting
2BIT
D31-26 to D31-27
Filter-Fix_SW
DAC TEST select data
D26
D27
Filter-Mode
0
0
Variable
1
0
Narrow-Fix
0
1
Wide-Fix
1
1
Dont Care
¤ Data to select the output circuit of internal DAC circuit
D31-29
(31)
(32)
S-meter shifter control
¤ Controls the output value of FM S-METER shifter circuit.
D32-0 to D32-4
5BIT
FM MUTE-ON-adj/
¤ FM: Controls FM MUTE-ON-adj characteristic.
AM NC stop control
(33)
AM: Controls the sensitivity of AM NC stop.
D32-5 to D32-9
5BIT
FM MUTE-ATT/
¤ FM: Controls FM MUTE-ATT characteristic.
AM NC Gate-Time control
D32-10 to D32-15
AM: Controls the width of AM NC Gate-Time characteristic.
6BIT
Continued on next page.
No.A0976-38/45
LV25200M
Continued from preceding page.
No.
(34)
Control block/data
Description
Weak input
¤ Changes over weak input MUTE.
MUTE changeover
3BIT
Related data
D31-16 to D31-18
(35)
AM/FM SD-adj
NC-AGC threshold voltage
setting data
¤ Controls SD characteristic of AM/FM.
Sets the threshold voltage of NC-AGC.
5BIT
D31-19 to D32-23
(36)
FM IF-Gain
/AM NC Gain control data
(37)
¤ Controls Gain of FM IF limiter AMP.
Controls also Gain of IF limiter AMP in the AM mode similarly to the FM mode.
D32-24 to D32-27
4BIT
TUNER OFF setting data
¤ Data to set the mode to turn OFF the tuner.
D32-28
1BIT
Tuner OFF mode
(38)
(39)
(40)
Normal operation
1
Tuner-OFF
AM/FM WAGC setting data
¤ Data to set the AM/FM WAGC sensitivity.
D33-0 to D33-3
4BIT
AM/FM NAGC setting data
¤ Data to set the AM/FM NAGC sensitivity.
D33-4 to D33-7
4BIT
Keyed-AGC/
¤ Controls FM Keyed-AGC sensitivity.
AM-IF-Gain setting data
(41)
0
Controls AM-IF-GAIN.
D33-8 to D33-11
4BIT
SD detection bandwidth
¤ Used to set the SD detection bandwidth at FM-SEEK.
setting/band variable filter
start point setting data
Used to set the start point of band variable filter at FM reception.
4BIT
D33-12 to D33-15
(42)
(43)
(44)
Null Voltage setting data
¤ Controls the FM Null voltage.
D33-16 to D33-20
5BIT
QDP-ADJ setting data
¤ Controls the FM QDP voltage.
D33-21 to D33-24
4BIT
FM MUTE-ATT SW/AM
¤ FM: Controls FM MUTE-ATT-SW characteristic.
S-meter shifter control
D33-25 to D33-26
AM: Controls S-meter shifter circuit output value.
Mute-ATT-SW/AM-Vsm-Shift
2BIT
00
Low (steep inclination)
10
01
11
(45)
(46)
(47)
High (gengle inclination)
VREF2.7V adj control
¤ Sets the Vref2.7V output voltage to the target value.
D33-27 to D33-28
2BIT
Vref2.7V ADJ
00
Low
10
Typ
01
Little High
11
High
Separation control
¤ Controls separation of L/R output level in the FM stereo mode.
D34-0 to D34-5
6BIT
FM SNC/
¤ Sets FM SNC characteristic.
AM-RF-AGC AMP
Threshold value (gentle
Sets AM-RF-AGC AMP (gentle inclination side) threshold voltage.
5BIT
inclination side) setting data
D34-6 to D34-10
(48)
(49)
FM/AM HCC setting data
¤ Sets HCC characteristic of FM and AM.
D34-11 to D34-15
5BIT
SNC inclination setting data
¤ Sets inclination of SNC voltage (sets the separation curve).
D34-16 to D34-17
2BIT
SNC inclination
00
10
↓
01
↓
11
Continued on next page.
No.A0976-39/45
LV25200M
Continued from preceding page.
No.
(50)
Control block/data
Description
Pilot cancel control
¤ Data to control the pilot cancel degree.
D34-18 to D34-19
2BIT
Pi-Can (Pilot Cancel Level Control)
00
(51)
(52)
(53)
Center (AM-NC=OFF)
10
Low (same as above)
01
High (same as above)
11
OFF (AM-NC=ON)
De-emphasis select data
¤ Data to select the De-Emphasis constant of L/R output.
D34-20
1BIT
De-emphasis
0
50μs
1
75μs
Force NOMO setting data
¤ Data to force L/R output to the MONO mode.
D34-21
1BIT
Noise-AGC
Threshold voltage forced
application data
Noise sensitivity setting data
D34-24 to D34-25
0
Normal
1
Forced MONO
¤ Data to change the sensitivity by applying the Noise-AGC Threshold voltage in a forced
manner.
1BIT
Noise-AGC
Threshold voltage forced application
D34-23
(54)
0
OFF (Normal)
1
ON(control with SD-ADJ-DAC)
¤ Controls the noise detection sensitivity.
Noise-Sens setting
2BIT
00
Easy to detect
↓
10
↓
01
11
(55)
AC S-meter
Load changeover data
D34-26
(56)
(57)
Related data
Difficult to detect
¤ S-meter output (Vsm2_sub):
Data to change over the output impedance (internal load resistance) of pin 40
1BIT
AC-S meter load changeover
0
Hi (7kΩ)
1
Low (3.5kΩ)
Noise-AGC limit setting data
¤ Data to changeover the AGC limiter of noise canceller.
D34-27
1BIT
D34-28
Noise-AGC
0
No Limit (AGC easy to be effective)
1
Limit (AGC difficult to be effective)
0
0 : Normal setting
¤ No function
1BIT
1
(58)
(59)
MPX VCO control data
¤ Data for control to the MPX-VCO block free-run oscillation frequency of 304kHz
D35-0 to D35-5
6BIT
VCO ON measurement bit
¤ MPX-VCO block free-run oscillation frequency
D35-6
During measurement: High
1BIT
(60)
(61)
HCC SW changeover bit
¤ Data to change the HCC function AM/FM mode
D35-6
1BIT
Filter-Wide fixed sensitivity/
AM-RF-AGC AMP
Threshold value (steep
HCC SW
1
FM
0
AM
¤ Sets the Filter-Wide fixed sensitivity.
Sets the AM-RF-AGC AMP (steep inclination side) threshold voltage.
4BIT
inclination side) setting data
D35-8 to D35-11
(62)
Filter initial adjustment bit
¤ Data for various initial settings of the filter
D35-12 to D35-24
13BIT
D12-14
Gain
D15-19
CF
Gain adjustment
CF adjustment
D20-24
BW/G
BW/G adjustment
Continued on next page.
No.A0976-40/45
LV25200M
Continued from preceding page.
No.
(63)
Control block/data
Description
MRC Sensitivity
¤ Data for sensitivity setting of MRC
MRC sensitivity
2BIT
Setting data
D35-25 to D35-26
(64)
Related data
00
Low
10
↓
01
↓
11
High
MRC Time constant
¤ MRC time constant (Attack/Release Time) setting data
setting data
2BIT
MRC time constant
D35-27 to D35-28
(Attack: Release Time)
00
Short
10
01
11
(65)
D31-29 to D31-31
Long
¤ Sub-Code Address
D32-29 to D32-31
D33-29 to D33-31
Each 3 bits
D34-29 to D34-31
DO Output Data (Serial Data Output) Composition
[3] OUT
Address
DI
0 1 0 1 0 1 0 0
(1)
C0
C1
C2
C4
C3
C5
C6
C7
C8
C9
C10
C11
C12
(2) U-CTR
(1) IN-PORT
No.
C13
C14
C15
C16
C17
C18
C19
I1
I2
I4
I5
DO
SD
First Data OUT
Control block/data
Description
I/O port data
Related data
¤ I/O port; Data latching the state of pin 14 and other pins become I1 to I5. Latched when the
data output mode becomes effective.
I5 to I1
TEST-BIT
(I/O-PORT)
Pin state=Hi: 1
=Low: 0
Currently, only pin 14 (SD state)
(2)
General-purpose
¤ Data latching the content of general-purpose counter (20-bit binary counter) becomes
counter binary data
C19 to C0
CTS0
C19 to C0.
CTS1
C19 ← MSB of binary counter
CTE
C0 ← LSB of binary counter
Programmable Divider Composition
4bits
12bits
fvco/N
PLLIN
Swallow
Counter
DVS
Programmable
Divider
PD
φE
ferf
fvco=ferf × N
DVS
Set number of divisions (N)
Input frequency range (f [MHz])
PULL-IN pin in IC
1
272 to 65535
120 ≤ f ≤ 270
Selected
0
-
-
Stopped
* The input sensitivity is not shown here because the IC inside is closed.
No.A0976-41/45
LV25200M
Composition of The General-Purpose Counter
The general-purpose counter consists of 20-bit binary counters.
The count result can be read from MSB through the DO pin.
General-purpose counter
(20-bit binary counter)
1
2
HCTR
CTS
L
S
B
0 to 3
(FIF)
M
S
B
4 to 7 8 to 11 12 to 15 16 to 19
DO pin
CTE
4/8/32/64ms
C=FIF × GT
GT
GT1, GT0
On the basis of GT0 and GT1 data, the measurement time for frequency measurement using the general-purpose
counter can be selected from four types: 4,8,32,64 ms. By determining how many pulses are entered in the generalpurpose counter within one of these periods, the frequency of signal entered in HCTR in IC can be determined.
CTP data: Data to determine the general-purpose counter input pin (HCTR) state at reset of this counter (CTE=0)
CTP = 0: General-purpose counter input pin turned OFF (pulled down)
= 1: General-purpose counter input pin not pulled down, but the wait time reduced to 1- 2 ms.
When setting CTP=1, it must be set first not later than 4 ms before count start (CTE=1).
When the counter is not to be used, set CTP=0.
Frequency measurement mode
GT1
GT0
Wait time
Measurement time
0
0
4ms
0
1
8ms
1
0
32ms
1
1
64ms
CTP=0
CTP=1
3 to 4ms
7 to 8ms
1 to 2ms
IF Counter Operation
Before count start with the general-purpose counter, set CTE=0 to reset the counter beforehand.
The general-purpose counter starts counting by setting the serial data to CTE=1.
Then, the count result of the counter must be read out while CTE=1.
(With CTE=0, the general-purpose counter is reset.)
The signal entered in the HCTR pin in IC is divided into one half internally, and transmitted to the general-purpose
counter.
Accordingly, the count result of general-purpose counter is the one-half value of the actual frequency entered in the
HCTR pin in IC.
CE
CTE=1
data
Wait time
Frquency measurement time
Measurement time
HCTR
Input signal
No.A0976-42/45
LV25200M
For the integrating counter
* CTE=1
* CTE=1
* CTE=0
CE
Internal data latch (CTE)
GT
General-purpose counter
(Integration)
Start
end-UC
(DO)
* CTE: 0 →
1→
Reset
Restart
Count end
Count end
• General-purpose counter Reset
• General-purpose counter Start
• Restart with new “1”
During integrating counting, the counts are accumulated in the general-purpose counter.
Take care not to allow overflow of the counter.
Count value: OH to FFFFFH (1,048,575)
When the serial data (IN1) is re-transmitted while keeping CTE=1, the general-purpose counter restarts measurement
and the integrating count results are added.
Phase Comparator/Charge Pump
(1) Phase comparator/charge pump operation
In the PLL circuit block shown in Fig. 1, the phase comparator compares the phase difference of the reference
frequency(fr) and comparative frequency (fp) and outputs the phase difference components from the charge pump.
RF
Reference Divider
Programmable Divider
Leak in case of
strong input
fr
fp
Mixer
Phase
Detector
Charge
Pump
LPF
VCO
Fig. 1 PLL circuit block
No.A0976-43/45
LV25200M
Output characteristics of the phase comparator/charge pump are shown in Fig. 2.
The phase comparator outputs the output Vφ that is proportional to the phase differenceφ between fr and fp. By
changing the setting of phase comparator dead zone mode, characteristics of phase comparator can be changed.
Namely, the modes (DZA, DZB) to turn ON both P-CH and N-CH transistors of charge pump in case of extremely
small phase difference and the mode (DZD) not to output the phase difference output in case of extremely small
phase difference can be set.
Fig. 2 Phase comparator/charge pump characteristics
Vφ[V]
Vφ[V]
DZA mode
fp > fr
DZB mode
fp > fr
φ err [ns]
fr > fp
Dead Zone (--)
φ err [ns]
Dead Zone(-)
fr > fp
Vφ[V]
Vφ[V]
DZC mode
DZD mode
fp > fr
fp > fr
φ err [ns]
φ err [ns]
fr > fp
Dead Zone≈0
Dead Zone (+)
fr > fp
(2) Characteristics of the Dead Zone mode
The table below outlines characteristics in each dead zone mode.
Set data
Charge pump at phase difference 0
Dead zone width
(Pch/Nch)
(Reference data)
DZA
ON/ON
-- (-15[ns])
DZB
ON/ON
- (-8[ns])
0
DZC
ON or OFF
≈0 (0[ns])
1
DZD
OFF/OFF
+ (+8[ns])
DZ1
DZ0
0
0
0
1
1
1
Dead zone mode
Remarks
Do not use
No.A0976-44/45
LV25200M
(3) Guideline and cautions for selecting the Dead Zone mode
Features of each Dead Zone mode and criteria for selection are described below:
1) DZA mode
In the DZA mode, the correction signal is output from the charge pump even when the phase difference agrees
between the reference frequency (fr) and comparative frequency (fp), which is advantageous in obtaining the high
S/N ratio with ease. On the other hand, the side band of reference frequency component may occur, readily
causing beats in case of strong input. This is a phenomenon occurring because the PLL loop reacts sensitively due
to leak components through the mixer, modulating VCO. Occurrence of side band of reference frequency
component in the local oscillator also causes leakage of reference components to IF, which tends to worsen the
interference characteristics.
2) DZB mode
The DZB mode is characterized by the reduced voltage of correction signal from the DZA mode though, similarly
to the case of the DZA mode, the charge pump outputs the correction signal even when the phase difference
agrees between the reference frequency (fr) and comparative frequency (fp). This mode features in easier
achievement of high S/N ratio than DZC/DZD and improved beat and interference resistances.
3) DZC mode
In the DZC mode, the correction signal is output from the charge pump according to the phase difference between
the reference frequency (fr) and comparative frequency (fp). Extremely small noise may occur when the phase
difference is around 0 [ns]. Do not use this mode at low temperature (-30°C or less) because the S/N ratio may be
deteriorated.
4) DZD mode
In the DZD mode, the correction signal is output from the charge pump according to the phase difference
between the reference frequency (fr) and comparative frequency (fp). The correction signal is not output when
the phase difference is ± several [ns]. Accordingly, the S/N ratio becomes lower than other dead-zone modes, but
beat and interference resistances can be improved.
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Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed
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to change without notice.
PS No.A0976-45/45