Ordering number : ENA2027A Bi-CMOS LSI LV5604TA Eight-Channel Switching Regulator Controller Overview The LV5604TA is a eight-channel switching regulator controller. Features • Low-voltage (3V) operation • Independent standby functions for each of the eight channels • Synchronous rectification : channel 1 and channel 2 • Reference voltage precision : ±1% • Is capable of driving MOS transistors • Supports inverting step-up operation. Specifications Maximum Ratings at Ta = 25°C Parameter Symbol Maximum supply voltage VCC max Allowable power dissipation Pd max Operating temperature Storage temperature Conditions Ratings Unit 16 V 1 W Topr -30 to +85 °C Tstg -55 to +125 °C Caution 1) Absolute maximum ratings represent the value which cannot be exceeded for any length of time. Caution 2) Even when the device is used within the range of absolute maximum ratings, as a result of continuous usage under high temperature, high current, high voltage, or drastic temperature change, the reliability of the IC may be degraded. Please contact us for the further details. Recommended Operating Conditions at Ta = 25°C Parameter Symbol Conditions Ratings Unit Supply voltage VCC 3 to 15 Supply voltage VBIAS 3 to 15 V Timing resistor RT 7 to 30 kΩ Timing capacitor CT 100 to 1000 pF Triangle wave frequency fOSC 0.1 to 1.3 V MHz Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment. The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for new introduction or other application different from current conditions on the usage of automotive device, communication device, office equipment, industrial equipment etc. , please consult with us about usage condition (temperature, operation time etc.) prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' s products or equipment. 32812 SY/31412 SY 20120217-S0002 No.A2027-1/12 LV5604TA Electrical Characteristics at Ta = 25°C, VCC = VBIAS = 3.6V, SCP = 0V Ratings Parameter Symbol Conditions Unit min typ max Error amplifier 1 IN+ pin internal bias voltage VB Value added to the error amplifier 0.509 0.515 0.521 V 0.2 V offset at the error amplifier + side Output low voltage ch1 to ch8 VLow FB voltage IN- = 2.0V, IFB = 20μA Output high voltage ch1 to ch8 VHi FB IN- = 0V IFB1 = -20μA 2.0 V Error amplifier 2 IN5-RE pin offset voltage VOF Output low voltage VLow FB5RE IN5- RE = 2.0V, IFB = 20μA Output high voltage VHi FB5RE FB5RE ; H, IFB = 500μA -6 6 0.2 1.95 mV V V Protection circuit Threshold voltage VSCP SCP pin current ISCP Short circuit detection signal pin VSCPOUT 1.1 1.25 1.4 Open collector V μA 4 0.2 V ISCPOUT = 100μA Software start block (ch1 to ch8) Soft start current ch1 to ch8 ISF Soft start resistance ch1 to ch8 RSF CSOFT1 to 8 = 0V 3.2 4 4.8 μA 160 200 240 kΩ Fixed duty Maximum on duty 1 ch1 to ch4 Duty MAX 1 to 4 Out monitor, IN- = 0V 100 80 85 90 % 80 85 90 % % Maximum on duty 2 ch5 Duty MAX 5 Out monitor, IN- = 0V Maximum on duty 3 ch6 to ch8 Duty MAX 6 to 8 Out monitor, IN- = 0V OUT pin high side on resistance ROUT SOUR IO = 10mA 25 Ω OUT pin high side on resistance ROUT SINK IO = 10mA 10 Ω Current setting pin voltage VT RT RT = 10kΩ 0.57 V Output current IOH CT 220 μA Output current ratio ΔIO CT CT pin, ISOURCE/ISINK Oscillation frequency fOSC1 RT = 10kΩ, CT = 270pF Output block 1 to 6 Triangle wave oscillator block 2.5 390 490 570 kHz 10 mV Reference voltage block Reference voltage VREF Line regulation VLN REF 1.230 VCC = 3V to 15V V Control circuit On state voltage VON CTL OFF state voltage VOFF CTL Pin input current IIN CTL 2.0 V VCTL = 2V 0.6 V 60 μA Standby circuit On voltage VON STBY 2.0 Off voltage VOFF STBY Pin input current IIN STBY VSTBY = 2V VCC current consumption ICC IN1- to IN8- = 1V Standby mode current consumption IOFF V 0.6 V 60 μA 7.5 mA 1 μA All circuits VSTBY = VCTL = 0V 6 IOFF = ICC + IBIAS No.A2027-2/12 LV5604TA Package Dimensions unit : mm (typ) 3425 W Allowable power dissipation, Pd max - 9.0 7.0 0.5 7.0 64 1 2 0.4 Pd max -- Ta 1.2 9.0 0.125 0.18 (0.5) Specified board : 50.0×50.0×1.6mm3 glass epoxy 1 0.8 0.6 0.40 0.4 0.2 (1.0) 0 —30 —20 0 20 40 60 0.1 1.2 MAX Ambient temperature, Ta - 80 100 C SANYO : TQFP64(7X7) CLK_OUT (NC) OUT8 OUT7 OUT6 GND_P2(VS2) OUT5 OUT4 OUT3 GND_P1(VS1) OUT2N OUT2 OUT1 OUT1N (NC) SYNC1 Pin Assignment 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 1 48 CLK_IN VBIAS1 2 47 VBIAS2 STBY1 3 46 VCC STBY2 4 45 STBY8 STBY3 5 44 STBY7 STBY4 6 43 STBY6 CSOFT1 7 42 STBY5 CSOFT2 8 41 CSOFT8 CSOFT3 9 40 CSOFT7 39 CSOFT6 SCP 11 38 CSOFT5 SCP_OUT 12 37 CTL IN1- 13 36 SEL_CH8 FB1 14 35 FB8 IN2- 15 34 IN8- FB2 16 33 FB7 LV5604TA SYNC2 CSOFT4 10 IN7- FB6 IN6- IN5+RE IN5-RE FB5RE FB5 IN5- GND_S VREF RT CT FB4 IN4- FB3 IN3- 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Top view No.A2027-3/12 LV5604TA Block Diagram and Sample Application Circuit CTL VREF (NC) (NC) SCP_OUT SCP SCP CTL Pre-output stage power supply VBIAS1 FB1A + + + - IN1- Signal system power supply VCC OUT1 VBAT Step-down FB1A (DOWN) FB1 CSOFT1 OUT1N FB2A + + + - IN2- SYNC1 L: Synchronous rectification H: Diode rectification VO1 3.3V/100mA SYNC1 OUT2 Step-down FB2A (DOWN) FB2 CSOFT2 OUT2N FB3A IN3- + + - + + + - + SYNC2 L: Synchronous rectification H: Diode rectification VO2 3.3V/100mA SYNC2 OUT3 FB3A Step-down FB4A Step-down (DOWN) FB3 CSOFT3 FB4A IN4- OUT4 FB4 FB5A CSOFT4 IN5-RE IN5+RE (DOWN) VO2 3.3V/100mA GND_P(VS1) VBIAS2 + FB5RE IN5FB5 FB5A + + + - Inversion (INVENT) OUT5 VO3 -4V/100mA CSOFT5 FB6A FB6A + - + + - IN6- OUT6 FB6 Step-up (UP) CSOFT6 ON/OFF setting FB7A FB7A + - + + - IN7- OUT7 FB7 Step-up (UP) CSOFT7 SEL_CH8 MODE Step-down; Connect to VBIAS Step-up; Connect to GND2 FB8A + - + + - IN8FB8 CSOFT8 ON/OFF setting SEL_CH8 FB8A OUT8 STBY CLK CLK_OUT OSC CLK_IN RT CT STBY8 STBY7 STBY6 STBY5 STBY4 STBY3 STBY2 STBY1 GND_P(VS2) ON/OFF setting Step-up (UP) GND_S Channel 8 step-up/step-down is selected by SEL_CH8 No.A2027-4/12 LV5604TA Pin Function Block Pin No. ch1 (Step-down) 3 STBY1 Standby input. H/ch1 ; ON, L/ch1 ; OFF 13 IN1- Error amplifier Inverting input 14 FB1 Error amplifier output 61 OUT1 Output. External transistor P-channel gate connect 62 OUT1N Output. External transistor N-channel gate connection 7 CSOFT1 Soft start setting capacitor connection. Connect to GND through a capacitor. ch2 (Step-down) ch3 (Step-down) ch4 (Step-down) ch5 (Inversion) ch6 (Step-up) ch7 (Step-up) ch8 (Step-down) (Step-up) Pin Name Functions 4 STBY2 Standby input. H/ch2 ; ON, L/ch2 ; OFF 15 IN2- Error amplifier Inverting input 16 FB2 Error amplifier output 60 OUT2 Output. External transistor P-channel gate connection 59 OUT2N Output. External transistor N-channel gate connection 8 CSOFT2 Soft start setting capacitor connection. Connect to GND through a capacitor. 5 STBY3 Standby input. H/ch3 ; ON, L/ch3 ; OFF 17 IN3- Error amplifier Inverting input 18 FB3 Error amplifier output 9 CSOFT3 Soft start setting capacitor connection. Connect to GND through a capacitor. 57 OUT3 Output. External transistor P-channel gate connection 6 STBY4 Standby input. H/ch4 ; ON, L/ch4 ; OFF 19 IN4- Error amplifier Inverting input 20 FB4 Error amplifier output 10 CSOFT4 Soft start setting capacitor connection. Connect to GND through a capacitor. 56 OUT4 Output. External transistor P-channel gate connection 42 STBY5 Standby input. H/ch5 ; ON, L/ch5 ; OFF 28 IN5-RE Inversion step-up error amplifier, - (Inverting) input 29 IN5+RE Inversion step-up error amplifier, + (noninverting) input 27 FB5RE Inversion step-up error amplifier output 25 IN5- Error amplifier Inverting input 26 FB5 Error amplifier output 38 CSOFT5 Soft start setting capacitor connection. Connect to GND through a capacitor. 55 OUT5 Output. External transistor P-channel gate connection 43 STBY6 Standby input. H/ch6 ; ON, L/ch6 ; OFF 30 IN6- Error amplifier Inverting input 31 FB6 Error amplifier output 39 CSOFT6 Soft start setting capacitor connection. Connect to GND through a capacitor. 53 OUT6 Output. External transistor N-channel gate connection 44 STBY7 Standby input. H/ch7 ; ON, L/ch7 ; OFF 32 IN7- Error amplifier Inverting input 33 FB7 Error amplifier output 40 CSOFT7 Soft start setting capacitor connection. Connect to GND through a capacitor. 52 OUT7 Output. External transistor N-channel gate connection 45 STBY8 Standby input. H/ch8 ; ON, L/ch8 ; OFF 34 IN8- Error amplifier Inverting input 35 FB8 Error amplifier output 41 CSOFT8 Soft start setting capacitor connection. Connect to GND through a capacitor. 51 OUT8 Output. External transistor (Step-up / N-channel, Step-down / P-channel) gate connection Continued on next page. No.A2027-5/12 LV5604TA Continued from preceding page. Block Pin No. MODE 64 SYNC1 Synchronous rectification/diode rectification switching, L : synchronous rectification H : diode rectification 1 SYNC2 Synchronous rectification/diode rectification switching, L : synchronous rectification H : diode rectification POWER CONTROL OSC OTHER Pin Name Functions 36 SEL_CH8 Channel 8 step-up/step-down switching, L (GND) : step-up H (VBIAS2) : step-down 46 VCC Power supply input (signal system) 2 VBIAS1 Power supply input (ch1 to ch4, pre-output stage) 47 VBIAS2 Power supply input (ch5 to ch8, pre-output stage) 24 GND_S Ground (signal system) 58 GND_P1 (VS1) Ground (ch1 to ch4, pre-output stage) 54 GND_P2 (VS2) Ground (ch5 to ch8, pre-output stage) 23 VREF Reference voltage output 37 CTL Power supply control 11 SCP Connection pin for the delay time setting capacitor of short circuit detection circuit 12 SCP_OUT Short circuit detection circuit output 21 CT Triangle wave oscillation frequency setting capacitor connection 22 RT Triangle wave oscillation frequency setting resistor connection 48 CLKIN External clock input 49 CLKOUT Clock output 63 (NC) No connection 50 (NC) No connection No.A2027-6/12 LV5604TA Equivalent Circuits Pin No. Pin Name Description CTL : Controls operation of all channels. 37 CTL 3 STBY1 STBY* : Independently controls operation of 4 STBY2 the corresponding channel. 5 STBY3 Operation is high active. 6 STBY4 High : Circuit operation ON 42 STBY5 Low : Circuit operation OFF 43 STBY6 44 STBY7 45 STBY8 IN1- 13 15 17 19 25 IN2IN3- 32 34 IN8- CTL/STBY* 120kΩ 30kΩ Error amplifier inverting input. VREG (Internal constant voltage) The regulator output is divided by a resistor and connected to IN*- IN4IN5IN6IN7- 30 Equivalent Circuit IN*- 500Ω 5kΩ 5kΩ GND_S 14 FB1 Error amplifier output. 16 FB2 These pins, in combination with IN*-, 18 FB3 configure the error amplifier filters 20 FB4 26 FB5 31 FB6 33 FB7 35 FB8 VREG (Internal constant voltage) 20Ω FB* 500Ω GND_S 29 28 IN5+RE IN5-RE Inversion step-up (Channel 5) error amplifier VREG (Internal constant voltage) input. These pins, in combination with FB5R, configure the operational amplifier (independent) IN5-RE 500Ω IN5+RE 500Ω 5kΩ 5kΩ GND_S 27 FB5RE Inversion step-up (Channel5) error amplifier VREG (Internal constant voltage) output. This pin, in combination with IN5+RE and IN5-RE, configures the operational amplifier (independent). FB5RE GND_S 7 CSOFT1 Soft start. 8 CSOFT2 Connect to GND via a capacitor to set the soft start time. 9 CSOFT3 10 CSOFT4 38 CSOFT5 39 CSOFT6 40 CSOFT7 41 CSOFT8 VREG (Internal constant voltage) 500Ω CSOFT* 10kΩ 200kΩ GND_S Continued on next page. No.A2027-7/12 LV5604TA Continued from preceding page. Pin No. Pin Name 61 OUT1 62 OUT1N 60 OUT2 59 OUT2N 57 OUT3 56 OUT4 55 OUT5 53 OUT6 52 OUT7 51 OUT8 22 RT Description Equivalent Circuit Output. Connect external FET. VBIAS* VOUT* VOUT*N GND_P*(VS*) Connect to GND through a resistor. VREG (Internal constant voltage) This pin, together with CT, sets the oscillation frequency. 500Ω RT 500Ω GND_S 21 CT Connect to GND through a capacitor. VREG (Internal constant voltage) This pin, together with RT, sets the oscillation frequency. CT GND_S 11 SCP Connect to GND via a capacitor to set the VREG (Internal constant voltage) short circuit detection circuit delay time. 1.5kΩ SCP 13kΩ GND_S 12 SCP_OUT Short circuit detection circuit output. When SCP exceeds the threshold voltage, the open collector goes OFF and this pin goes High. SCP_OUT VREG (Internal constant voltage) GND_S Continued on next page. No.A2027-8/12 LV5604TA Continued from preceding page. Pin No. Pin Name 23 VREF Description Equivalent Circuit Internal constant voltage circuit output. VREG (Internal constant voltage) Connect a stabilizing capacitor. VREF 14.8kΩ GND_S 48 CLK_IN External clock input. VREG (Internal constant voltage) Apply an external clock of the internal oscillation frequency or higher. CLKIN 300Ω GND_S 49 CLK_OUT Clock output. VREG (Internal constant voltage) This outputs the internal or external clock frequency pulse. 300Ω CLKOUT 300Ω GND_S 64 SYNC1 Channel 1 and channel 2 synchronous/diode 1 SYNC2 rectification switching. VREG (Internal constant voltage) Low : Synchronous rectification High : Diode rectification Switching operates independently for the corresponding channel. SYNC* 120kΩ SYNC* L : Synchronous rectification H : Diode rectification 30kΩ GND_S 36 SEL_CH8 Channel 8 step-up/step-down switching. VBIAS2 High : Sets step-down Low : Sets step-up SEL_CH8 GND_P2 (VS2) Channel 8 step-up/step-down switching H (VBIAS2) : step-down, L (GND) : step-up Continued on next page. No.A2027-9/12 LV5604TA Continued from preceding page. Pin No. Pin Name 46 VCC Signal system power supply Description 2 VBIAS1 Power system power supply 47 VBIAS2 (Output stage) 24 GND_S Signal system GND Equivalent Circuit VCC VBIAS* 58 GND_P1 (VS1) Output stage GND 54 GND_P2 (VS2) (Output stage GND) 50 (NC) Use prohibited 63 (NC) (Not connected pins) GND_S GND_P*(VS*) (NC) Notes (1) Channel 8 step-up/step-down selection function The channel 8 step-up or step-down converter selection is made by the SEL_8CH pin connection. Step-up/step-down is selected by SEL_CH8, but this selection cannot be switched during use, and is fixed to either step-up or step-down in the design stage. In addition, unlike other channels, channel 8 is not connected internally to a pull-up/pull-down resistor, so an external resistor must be connected instead. (Mode selection using SEL_CH8) Selected mode SEL_CH8 connection Step-down (DOWN converter) VBIAS2 Step-up (UP converter) GND_P2 (VS2) OUT8 resistor connection Connect to VBIAS2 via a resistor (between the PchTr gate and VBIAS2) Connect to GND_P2 (VS2) via a resistor (between the NchTr gate and GND_P2 (VS2)) (2) Soft start time setting method The soft start time is set with the capacitor connected between CSOFT* and GND_S. This IC has an independent soft start function for each channel, so a capacitor must be connected for each channel to set the soft start (time). (Description of soft start operation) (Outline of soft start pin) CSOFT* [V] CSOFT* voltage VREG (Internal constant voltage) VB ( = 0.515 [V] (TYP)) CSOFT* T [s] 200kΩ Soft start time (Tsoft [s]) CSOFT pin charging starts The output voltage reaches the set voltage (Output voltage constant) GND_S VB (0.515 [V]) (3) Setting the oscillation frequency The internal oscillation frequency is set by the resistor connected to the RT pin and the capacitor connected to the CT pin. The waveform generated on CT is a triangular wave with the charging/discharging waveform determined by RT and CT. 1 fOSC = CT × RT [Hz] The actual internal oscillation frequency deviates from the calculated value due to overshoot, undershoot and other factors, so the frequency should be confirmed in an actual set. No.A2027-10/12 LV5604TA (4) External input CLK function (CLK_IN) Switching operation can be synchronized with external clock input (CLK_IN) by using the CLK_IN pin. • External clock (CLK_IN) frequency and input level When using external clock (CLK_IN) input, input a frequency equal to the internal oscillation frequency +20% or more to CLK_IN. In addition, the CLK_IN configuration is shown in the figure “CLK_IN (input) equivalent circuit (outline)” below. The 0.8V reference voltage and CLK_IN are compared to determine the edges, so input a signal of 0.8V or more (VCC voltage or less) as the external clock (CLK_IN). • External/internal clock switching Set the CTL pin Low before switching between the external clock and the internal clock. • Maximum ON duty The maximum ON duty (Duty_MAX*) of channel 1 to channel 4 is the 85% (typ.) setting. When using the external clock (CLK_IN), the maximum ON duty (Duty_MAX*) becomes smaller, so care must be taken for the set output voltage. (CLK_IN (input) equivalent circuit (outline)) CLK_IN 0.8V (5) SCP function • Description of operation When FB1 to FB8 go High due to the load being shorted or other reason, charging to the SCP pin starts, and if output does not recover during the set time Tscp, the protective circuit (SCP) operates. When the protection circuit (SCP) operates, all channel outputs are turned OFF. When not using the protection function (SCP), the SCP pin must be shorted to GND_S with a line that is as short as possible. When the SCP function operates and SCP_OUT goes High, all outputs are latched OFF. This latched state is canceled by setting the CTL pin Low or by turning the power supply off. • SCP_OUT The SCP_OUT pin functions to notify an external microcontroller or other component of the SCP (short circuit protection) and CTL status. The output configuration is an open drain output, and a pull-up resistor is used. When not used, leave this pin open. • Switching time The SCP_OUT switching time is set by the capacitor connected to the SCP pin. (SCP charging operation) SCP [V] (SCP and SCP_OUT operation) Charging with Iscp = 4 [μA] CTL 1.25 [V] (TYP) SCP tscp Output short circuit Threshold voltage 1.25 (TYP) T [s] SCP_OUT SCP operation No.A2027-11/12 LV5604TA SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of SANYO Semiconductor Co.,Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor Co.,Ltd. product that you intend to use. Upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of March, 2012. Specifications and information herein are subject to change without notice. PS No.A2027-12/12