Ordering number : EN6042A Thick-Film Hybrid IC STK672-120-E Unipolar Fixed-Current Chopper (Self-Excited PWM) Scheme and Built-in Phase Signal Distribution IC Two-Phase Stepping Motor Driver (Square Wave Drive) Output Current 2.4A Overview The STK672-120-E is a unipolar fixed-current chopper type 2-phase stepping motor driver hybrid IC. It features power MOSFETs in the output stage and a built-in phase signal distribution IC. The incorporation of a phase distribution IC allows the STK672-120-E to control the speed of the motor based on the frequency of an external input clock signal. It supports two types of excitation for motor control: 2-phase excitation and 1-2 phase excitation. It also provides a function for switching the motor direction. Applications • Two-phase stepping motor drive in send/receive facsimile units • Paper feed in copiers, industrial robots, and other applications that require 2-phase stepping motor drive Features • The motor speed can be controlled by the frequency of an external clock signal (the CLOCK pin signal). • The excitation type is switched according to the state (low or high) of the MODE pin. The mode is set to 2-phase or 1-2 phase excitation on the rising edge of the clock signal. • A motor direction switching pin (the CWB pin) is provided. • All inputs are schmitt inputs and 40kΩ (typical: –50 to +100%) pull-up resistors are built in. • The motor current can be set by changing the Vref pin voltage. Since a 0.165Ω current detection resistor is built in, a current of 1A is set for each 0.165V of applied voltage. • The input frequency range for the clock signal used for motor speed control is 0 to 25kHz. • Supply voltage ranges: VCC = 10 to 42V, VDD = 5.0V ±5% • This IC supports motor operating currents of up to 2.4A at Tc = 105°C, and of up to 4.0A at Tc = 25°C. Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer' s products or equipment. 61108HKIM/12299RM (OT) No.6042-1/9 STK672-120-E Specifications Maximum Ratings at Tc = 25°C Parameter Symbol Conditions Ratings Unit Maximum supply voltage 1 VCC max No signal 52 V Maximum supply voltage 2 VDD max No signal -0.3 to +7.0 V Input voltage VIN max Logic input pins -0.3 to +7.0 V Output current IOH max VDD = 5V, CLOCK ≥ 200Hz 4.0 A Repeated avalanche capacity Ear max 36 mJ Allowable power dissipation Pd max 8.5 W Operating substrate temperature Tc max 105 °C Junction temperature Tj max 150 °C Storage temperature Tstg -40 to +125 °C With an arbitrarily large heat sink. Per MOSFET Allowable Operating Ranges at Ta = 25°C Parameter Symbol Conditions Ratings Unit Maximum supply voltage 1 VCC With signals applied 10 to 42 V Maximum supply voltage 2 VDD With signals applied 5.0 ± 5% V 0 to VDD V 2.4 A 3.0 A Input voltage VIH Output current 1 Tc = 105°C, CLOCK ≥ 200Hz IOH1 Output current 2 Tc = 80°C, CLOCK ≥ 200Hz IOH2 Clock frequency See the motor curren (IOH) derating curve fCL Phase driver withstand voltage Minimum pulse width: 20μs VDSS ID = 1mA (Tc = 25°C) 0 to 25 kHz 100 min V Electrical Characteristics at Tc = 25°C, VCC = 24V, VDD = 5V Parameters Symbols Rating Conditions min VDD supply current ICCO Output average current typ CLOCK = GND With R/L = 3Ω/3.8mH in each phase Ioave Vref = 0.176V FET diode forward voltage Vdf If = 1A (RL = 23Ω) Output saturation voltage Vsat RL = 23Ω High-level input voltage VIH Pins 6 to 9 (4 pins) Low-level input voltage VIL Pins 6 to 9 (4 pins) With pins 6 to 9 at the ground level. Input current IIL Vref input voltage VrH Pin 12 Vref input bias current IIB With pin 12 at 1V Pull-up resistance: 40kΩ (typical) 0.56 unit max 2.6 6 0.62 0.69 A 1.1 1.7 V 0.4 0.56 V 4.0 62 mA V 1.0 V 125 250 μA 3.5 V 50 500 nA 0 Note: A fixed-voltage power supply must be used. Package Dimensions unit:mm (typ) 4167 46.6 8.5 1 2.0 (9.6) 11 2=22 12 0.5 1.0 4.0 12.7 3.6 25.5 41.2 0.4 2.9 No.6042-2/9 9 7 6 CLOCK CWB RESETB SP 11 Vref 12 8 MODE VDD 10 Off time setting Phase advance counter Excitation mode selection Chopping circuit Phase excitation signal generation - + VrefA F1 SUB C1 - + R1 4 5 VrefB RsA F2 AB A C2 R2 RsB F3 3 B F4 2 BB 1 GND STK672-120-E Internal Equivalent Circuit Block Diagram ITF02596 No.6042-3/9 STK672-120-E Sample Application Circuit STK672-120-E 10μF VDD=5V CO3 + 10 CLOCK 9 MODE 8 CWB 7 RESETB 5V Two-phase stepping motor 5 4 3 6 5V 2 A AB VCC 24V B BB + RO3 RO1 D1 Vref 0.1μF + CO4 10μF RO2 12 1 GND CO2 At least 100μF P.GND 11 CO1 ITF02597 • To minimize noise in the 5V system, locate the ground side of capacitor CO2 in the above circuit as close as possible to pin 1 of the IC. • Insert resistor RO3 (47 to 100Ω) so that the discharge energy from capacitor CO4 is not directly applied to the CMOS IC in this hybrid device. If the diode D1 has Vf characteristics with Vf less than or equal to 0.6V (when If = 0.1A), this will be smaller than the CMOS IC input pin diode Vf. If this is the case RO3 may be replaced with a short without problem. • Standard or HC type input levels are used for the pin 7, 8, and 9 inputs. • If open-collector type circuits are used for the pin 7, 8, and 9 inputs, these circuit will be in the high-impedance state for high level inputs. As a result, chopping circuit noise may cause the input circuits to operate incorrectly. To prevent incorrect operation due to such noise, capacitors with values between 470 and 1000pF must be connected between pins 7 and 11, 8 and 11, and 9 and 11. (A capacitor with a value between 470 and 1000pF must be connected between pins 6 and 11 as well if an open-collector output IC is used for the RESETB pin (pin 6) input.) • Taking the input bias current (IIB) characteristics into account, the resistor RO1 must not exceed 100kΩ. • The following circuit (for a lowered current of over 0.2A) is recommended if the application needs to temporarily lower the motor current. Here, a value of close to 100kΩ must be used for resistor RO1 to make the transistor output saturation voltage as low as possible. 5V 5V RO1 Vref RO1 RO3 Vref RO2 RO3 RO2 No.6042-4/9 STK672-120-E Input Pin Functions (CMOS input levels) Pin Pin No. Function CLOCK 9 Reference clock for motor phase current switching MODE 8 Excitation mode selection Input conditions when operating Operates on the rising edge of the signal Low: 2-phase excitation High: 1-2 phase excitation CWB 7 Motor direction switching Low: CW (forward) RESETB 6 System reset and A, AB, B, and BB outputs cutoff. High: CCW (reverse) A reset is applied by a low level Applications must apply a reset signal for at least 20μs when power is first applied. • A simple reset function is formed from D1, CO4, and RO3 in this application circuit. With the CLOCK input held low, when the 5V supply voltage is brought up a reset is applied if the motor output phases A and BB are driven. If the 5V supply voltage rise time is slow (over 50ms), the motor output phases A and BB may not be driven. Increase the value of the capacitor CO4 and check circuit operation again. • See the timing chart for the concrete details on circuit operation. Usage Notes • 5V system input pins [RESETB and CLOCK (Input signal timing when power is first applied)] As shown in the timing chart, a RESETB signal input is required by the driver to operate with the timing in which the F1 gate is turned on first. The RESETB signal timing must be set up to have a width of at least 20μs, as shown below. The capacitor CO4 and the resistor RO3 in the application circuit form simple reset circuit that uses the RC time constant rising time. However, when designing the RESETB input based on CMOS levels, the application must have the timing shown in figure 1. Rise of the 5V supply voltage RESETB signal input At least 20μs CLOCK signal At least 10μs Figure 1 RESETB and CLOCK Signals Input Timing See the timing chart for details on the CLOCK, MODE, CWB, and other input pins. [Vref <Motor current peak value setting>] In the sample application circuit, the peak value of the motor current (IOH) is set by RO1, RO2, and VDD (5V) as described by the formula below. IOH 0 Figure 2 Motor Current IO Flowing into the Driver IC IOH = Vref ÷ Rs Here, Rs is hybrid IC internal current detection resistor Vref = (R02 ÷ (R01 + R02)) × 5V STK672-120-E: Rs = 0.165Ω No.6042-5/9 STK672-120-E • Allowable motor current operating range The motor current (IOH) must be held within the range corresponding to the area under the curve shown in figure 4. For example, if the operating substrate temperature Tc is 105°C, then IOH must be held under IOH = 2.4A, and in hold mode IOH must be held under IOH = 2.0A. • Thermal design [Operating range in which a heat sink is not used] Thermal design that lowers this hybrid IC’s operating substrate temperature can be effective in improving end product quality. The size of the heat sink required by this hybrid IC varies with the average power dissipation PD. The value of PD increases as the output current increases, as shown in figure 5. Since there are periods when current flows and periods when the current is off during actual motor operation, PD cannot be determined from the data presented in figure 5. Therefore, we calculate PD assuming that actual motor operation consists of repetitions of the operation shown in figure 3. IO1 Motor phase current (sink side) IO2 -IO1 T1 T2 T3 T0 Figure 3 Motor Current Timing T1: Motor rotation operation time T2: Motor hold operation time T3: Motor current off time T2 may be reduced, depending on the application. T0: Single repeated motor operating cycle IO1 and IO2: Motor current peak values Due to the structure of motor windings, the phase current is a positive and negative current with a pulse form. Note that figure 3 presents the concepts here, and that the on/off duty of the actual signals will differ. The hybrid IC internal average power dissipation PD can be calculated from the following formula. PD = (T1 × P1 + T2 × P2 + T3 × 0) ÷ T0 (I) (Here, P1 is the PD for IO1 and P2 is the PD for IO2) If the value calculated in formula (I) above is under 1.5W, then there will be no need to use a heat sink for ambient temperatures Ta up to 60°C. See figure 6 for operating substrate temperature rise data when a heat sink is not attached. If a heat sink is to be used, to lower Tc if PD increases, use formula (II) and the graph in figure 7 to determine the size of the heat sink. θc - a = (Tc max–Ta) ÷ PD Tc max: Maximum operating substrate temperature = 105°C Ta: The hybrid IC ambient temperature (II) While formulas (I) and (II) above are adequate for thermal design, note that figure 5 is merely a single example of one operating mode for a single motor. For example, while figure 5 shows a 2-phase excitation motor, if 1-2 phase excitation is used with a 500Hz clock frequency, the drive will be turned off for 25% of the time and the loss PD will be reduced to 75% of that in figure 5. It is extremely difficult for SANYO to calculate the internal average power dissipation PD for all possible end product conditions. After performing the above rough calculations, always install the hybrid IC in an actual end product and verify that the substrate temperature Tc does not rise above 105°C. No.6042-6/9 STK672-120-E Timing Chart 2-phase excitation MODE RESETB CWB CLOCK Gate F1 Gate F2 Gate F3 Gate F4 100% VrefA 100% VrefB ITF02605 1-2 phase excitation MODE RESETB CWB CLOCK Gate F1 Gate F2 Gate F3 Gate F4 100% VrefA 100% VrefB ITF02606 No.6042-7/9 STK672-120-E 1-2 phase excitation (CWB) MODE RESETB CWB CLOCK Gate F1 Gate F2 Gate F3 Gate F4 100% VrefA 100% VrefB ITF02607 Switching from 2-phase to 1-2 phase excitation MODE RESETB CWB CLOCK Gate F1 Gate F2 Gate F3 Gate F4 100% VrefA 100% VrefB ITF02608 No.6042-8/9 4.5 IOH - Tc Figure 4 Operating region when fCL≥200Hz 4.0 VCC=24V Motor: R=0.4Ω L=1.2mH Motor current, IOH - A 3.5 3.0 Operating region in hold mode 2.5 2.4 2.0 2.0 1.5 1.0 0.5 0 0 20 40 60 80 100 105 Operating substrate temperature, Tc - °C ΔTc - PD Figure 6 VCC=24V, VDD=5.0V Clock=500Hz Continuous 2-phase excitation operation Motor used: R=0.63Ω L=0.62mH The data are typical values. 16 14 12 10 8 6 4 2 0 0 0.5 1.0 1.5 50 40 30 20 10 0 2.5 3.0 3.5 4.0 ITF02610 S - θc-a Figure 7 60 2.0 Motor current, IOH - A 100 With no heat sink, the IC vertical, and convection cooling 70 PD - IOH Figure 5 18 ITF02609 Heat sink thermal resistance, θc-a - °C/W Substrate temperature rise, ΔTc - °C 80 120 Hybrid IC internal average power dissipation, PD - W STK672-120-E 7 5 3 2 Wit h no 10 7 Wit h 5 a bl surf ack su 3 ace f inis hin g rfac e fi nish 2 i ng 1.0 0 0.5 1.0 1.5 2.0 2.5 3.0 Hybrid IC internal average power disspation, PD - W 3.5 ITF02611 10 2 3 5 7 100 2 3 5 Heat sink area, S - cm2 7 1000 ITF02612 SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. 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SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellectual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of June, 2008. Specifications and information herein are subject to change without notice. PS No.6042-9/9