TI TL7700CPSRG4

SLVS220C − JULY 1999 − REVISED NOVEMBER 2004
D Adjustable Sense Voltage With Two
D
D
D
D
D
P, PS, OR PW PACKAGE
(TOP VIEW)
External Resistors
Adjustable Hysteresis of Sense Voltage
Wide Operating Supply-Voltage
Range . . . 1.8 V to 40 V
Wide Operating Temperature
Range . . . −40°C to 85°C
Low Power Consumption (ICC = 0.6 mA
TYP, VCC = 40 V)
Minimum External Components
CT
SENSE
NC
GND
1
8
2
7
3
6
4
5
RESET
NC
NC
VCC
NC − No internal connection
description/ordering information
The TL7700 is a bipolar integrated circuit designed for use as a reset controller in microcomputer and
microprocessor systems. The SENSE voltage can be set to any value greater than 0.5 V using two external
resistors. The hysteresis value of the sense voltage also can be set by the same resistors. The device includes
a precision voltage reference, fast comparator, timing generator, and output driver, so it can generate a
power-on reset signal in a digital system.
The TL7700 has an internal 1.5-V temperature-compensated voltage reference from which all function blocks
are supplied. Circuit function is very stable, with supply voltage in the 1.8-V to 40-V range. Minimum supply
current allows use with ac line operation, portable battery operation, and automotive applications.
ORDERING INFORMATION
−40°C to 85°C
ORDERABLE
PART NUMBER
PACKAGE†
TA
TOP-SIDE
MARKING
PDIP (P)
Tube of 50
TL7700CP
TL7700CP
SOP (PS)
Reel of 2000
TL7700CPSR
T7700
Tube of 150
TL7700CPW
Reel of 2000
TL7700CPWR
TSSOP (PW)
T7700
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2004, Texas Instruments Incorporated
!"# $%
$ ! ! & ' $$ ()% $ !* $ #) #$
* ## !%
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1
SLVS220C − JULY 1999 − REVISED NOVEMBER 2004
functional block diagram
VCC
Vs = 500 mV TYP
RESET
Reference
Voltage
+
−
SENSE
+
+
−
−
ICT†
High:
On
R
Q
S
IS†
GND
†ICT = 15 µA TYP; Is = 2.5 µA TYP
CT
Terminal Functions
TERMINAL
NAME
CT
1
Timing capacitor connection. This terminal sets the RESET output pulse duration (tpo). It is connected internally to a
15-µA constant-current source. There is a limit on the switching speed of internal elements; even if CT is set to 0,
response speeds remain at approximately 5 to 10 µs. If CT is open, the device can be used as an adjustable-threshold
noninverting comparator. If CT is low, the internal output-stage comparator is active, and the RESET output transistor
is on. An external voltage must not be applied to this terminal due to the internal structure of the device. Therefore, drive
the device using an open-collector transistor, FET, or 3-state buffer (in the low-level or high-impedance state).
GND
4
Ground. Keep this terminal as low impedance to reduce circuit noise.
NC
2
DESCRIPTION
NO.
3, 6, 7
No internal connection
RESET
8
Reset output. This terminal can be connected directly to a system that resets in the active-low state. A pullup resistor
usually is required because the output is an npn open-collector transistor. An additional transistor should be connected
when the active-high reset or higher output current is required.
SENSE
2
Voltage sense. This terminal has a threshold level of 500 mV. The sense voltage and hysteresis can be set at the same
time when the two voltage-dividing resistors are connected. The reference voltage is temperature compensated to inhibit
temperature drift in the threshold voltage within the operating temperature range.
VCC
5
Power supply. This terminal is used in an operating-voltage range of 1.8 V to 40 V.
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SLVS220C − JULY 1999 − REVISED NOVEMBER 2004
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 V
Sense input voltage range, Vs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 41 V
Output voltage, VOH (off state) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 V
Output current, IOL (on state) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 mA
Package thermal impedance, θJA (see Notes 2 and 3): P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85°C/W
PS package . . . . . . . . . . . . . . . . . . . . . . . . . . . 95°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . 149°C/W
Operating virtual junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values are with respect to the network ground terminal.
2. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can impact reliability.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions
VCC
IOL
Supply voltage
TA
Operating free-air temperature
MIN
MAX
1.8
40
V
3
mA
−40
85
°C
MIN
TYP
MAX
495
500
505
Low-level output current
UNIT
electrical characteristics, VCC = 3 V, TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
Vs
SENSE input voltage
Is
SENSE input current
Vs = 0.4 V
ICC
Supply current
VCC = 40 V,
IOL = 1.5 mA
TA = −40°C to 85°C
490
2
VOL
Low-level output voltage
IOH
ICT
High-level output current
IOL = 3 mA
VOH = 40 V,
Timing-capacitor charge current
Vs = 0.6 V
TA = −40°C to 85°C
Vs = 0.6 V,
No load
510
2.5
1.5
3
3.5
0.6
1
UNIT
mV
A
µA
mA
0.4
0.8
Vs = 0.6 V,
V
1
µA
11
15
19
µA
MIN
TYP
MAX
1
1.5
ms
TA = −40°C to 85°C
switching characteristics, VCC = 3 V, TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
UNIT
tpi
tpo
SENSE pulse duration
CT = 0.01 µF
2
Output pulse duration
CT = 0.01 µF
0.5
tr
tf
Output rise time
CT = 0.01 µF,
RL = 2.2 kΩ,
CL = 100 pF
15
µs
Output fall time
CT = 0.01 µF,
RL = 2.2 kΩ,
CL = 100 pF
0.5
µs
tpd
Propagation delay time, SENSE to output
CT = 0.01 µF
10
µs
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µs
3
SLVS220C − JULY 1999 − REVISED NOVEMBER 2004
PARAMETER MEASUREMENT INFORMATION
−
A
+
VCC
Vs
SENSE
0.6 V
VCC
GND
Figure 1. VCC vs ICC Measurement Circuit
VCC
Vs
CT
SENSE
VCC
+
0.6 V
A
−
GND
Figure 2. VCC vs ICT
Test
Point
VCC
RESET
Vs
3V
SENSE
CT
0.4 V
GND
0.01 µF
Figure 3. IOL vs VOL
4
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SLVS220C − JULY 1999 − REVISED NOVEMBER 2004
PARAMETER MEASUREMENT INFORMATION
2.2 kΩ
VCC
Test
Point
RESET
+
A
−
Vs
VCC
SENSE
CT
Vs
GND
0.01 µF
Figure 4. VS, IS Characteristics
2.2 kΩ
VCC
Test
Point
RESET
Vs
3V
SENSE
CT
GND
100 pF
Ct
Figure 5. Switching Characteristics
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5
SLVS220C − JULY 1999 − REVISED NOVEMBER 2004
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
I CC − Supply Current − mA
1.2
1.0
0.8
TA = 85°C
TA = 25°C
TA = −40°C
0.6
0.4
0.2
0
0
10
20
30
40
50
60
Timing-Capacitor Charge Current Supply − mV
TYPICAL CHARACTERISTICS†
TIMING-CAPACITOR CHARGE CURRENT
vs
SUPPLY VOLTAGE
16
TA = −40°C
15
14
TA = 25°C
13
TA = 85°C
12
11
10
0
VCC − Supply Voltage − V
10
20
50
60
Figure 7
VOL
vs
IOL
SENSE INPUT VOLTAGE
vs
TEMPERATURE
506
1.2
TA = 25°C
Vs = 500.8 mV
504
1.0
Vs − Sense Input Voltage − mV
VOL − Low-Level Output Voltage − V
40
VCC − Supply Voltage − V
Figure 6
TA = 85°C
0.8
TA = 25°C
0.6
TA = −40°C
0.4
0.2
502
500
498
496
TA = 25°C
Vs = 498.3 mV
494
492
490
0
0
1
2
3
4
5
6
488
−75 −50 −25
0
25
Figure 9
Figure 8
† Data at high and low temperatures are applicable only within the recommended operating conditions.
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50
75 100 125 150
TA − Free-Air Temperature − °C
IOL − Low-Level Output Current − mA
6
30
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SLVS220C − JULY 1999 − REVISED NOVEMBER 2004
TYPICAL CHARACTERISTICS†
SENSE INPUT CURRENT
vs
SENSE INPUT VOLTAGE
3.4
3.5
3.2
3.0
I s − Sense Input Current − µ A
I s − Sense Input Current − µ A
SENSE INPUT CURRENT
vs
TEMPERATURE
3.0
2.8
2.6
2.4
2.2
2.0
2.5
2.0
1.5
1.0
0.5
0
−0.5
1.8
1.6
−75 −50 −25
−1.0
0
25
50
0
75 100 125 150
TA − Free-Air Temperature − °C
0.1 0.2 0.3 0.4 0.5 0.6 1.0 10
40
Vs − Sense Input Voltage − V
Figure 10
Figure 11
OUTPUT PULSE DURATION
vs
TIMING CAPACITOR
t po − Output Pulse Duration − µ s
109
108
107
106
105
104
103
102
101
1
1
101 102 103 104 105 106 107 108 109
Ct − Timing Capacitor − pF
Figure 12
† Data at high and low temperatures are applicable only within the recommended operating conditions.
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7
SLVS220C − JULY 1999 − REVISED NOVEMBER 2004
TYPICAL CHARACTERISTICS
2.2 kΩ
240 kΩ
VCC
Test
Point 2
RESET
Vs
SENSE
6V
CT
30 kΩ
TP1
Y-Axis (TP1) = 1 V/Division
Y-Axis (TP2) = 2 V/Division
Test
Point 1
TP2
GND
100 pF
510 pF
X-Axis = 0.2 ms/Division
Test
Point 1
2.2 kΩ
240 kΩ
VCC
RESET
Vs
Test
Point 2
SENSE
6V
CT
30 kΩ
Figure 14. VCC vs Output Waveform 1
TP1
Y-Axis (TP1) = 1 V/Division
Y-Axis (TP2) = 2 V/Division
Figure 13. VCC vs Output Test Circuit 1
TP2
GND
100 pF
510 pF
X-Axis = 0.2 ms/Division
Figure 15. VCC vs Output Test Circuit 2
8
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Figure 16. VCC vs Output Waveform 2
• DALLAS, TEXAS 75265
SLVS220C − JULY 1999 − REVISED NOVEMBER 2004
TYPICAL CHARACTERISTICS
2.2 kΩ
240 kΩ
VCC
Test
Point 2
RESET
Vs
SENSE
CT
30 kΩ
TP1
Y-Axis (TP1) = 1 V/Division
Y-Axis (TP2) = 2 V/Division
Test
Point 1
TP2
GND
100 pF
510 pF
X-Axis = 0.2 ms/Division
Figure 18. VCC vs Output Waveform 3
Figure 17. VCC vs Output Test Circuit 3
detailed description
sense-voltage setting
The SENSE terminal input voltage, Vs, of the TL7700 typically is 500 mV. By using two external resistors, the
circuit designer can obtain any sense voltage over 500 mV. In Figure 19, the sensing voltage, Vs’, is calculated
as:
Vs’ = Vs × (R1 + R2)/R2
Where:
Vs = 500 mV, typically at TA = 25°C
At room temperature, Vs has a variation of 500 mV ± 5 mV. In the basic circuit shown in Figure 19, variations
of [±5 × (R1 + R2)/R2] mV are superimposed on Vs.
VCC
RL
VCC
R1
RESET
Vs
RESET
SENSE
CT
R2
GND
Ct
GND
Figure 19
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9
SLVS220C − JULY 1999 − REVISED NOVEMBER 2004
sense-voltage hysteresis setting
If the sense voltage, Vs’, does not have hysteresis in it, and the voltage on the sensing line contains ripples, the
resetting of TL7700 will be unstable. Hysteresis is added to the sense voltage to prevent such problems. As
shown in Figure 20, the hysteresis, Vhys, is added, and the value is determined as:
Vhys = Is × R1
Where:
Is = 2.5 µA, typically at TA = 25°C
At room temperature, Is has variations of 2.5 µA ± 0.5 µA. Therefore, in the circuit shown in Figure 19, Vhys has
variations of (±0.5 × R1) µV. In circuit design, it is necessary to consider the voltage-dividing resistor tolerance
and temperature coefficient in addition to variations in Vs and Vhys.
VCC
Vhys
Vs’
1.5 V
T
RESET
tpo
tpo
T
NOTE A: The sense voltage, Vs’, is different from the SENSE terminal input voltage, Vs. Vs normally is 500 mV for
triggering.
Figure 20. VCC-RESET Timing Chart
output pulse-duration setting
Constant-current charging starts on the timing capacitor when the sensing-line voltage reaches the TL7700
sense voltage. When the capacitor voltage exceeds the threshold level of the output drive comparator, RESET
changes from a low to a high level. The output pulse duration is the time between the point when the sense-pin
voltage exceeds the threshold level and the point when the RESET output changes from a low level to a high
level. When the TL7700 is used for system power-on reset, the output pulse duration, tpo, must be set longer
than the power rise time. The value of tpo is:
tpo = Ct × 105 seconds
Where:
Ct is the timing capacitor in farads
There is a limit on the device response speed. Even if Ct = 0, tpo is not 0, but approximately 5 µs to 10 µs.
Therefore, when the TL7700 is used as a comparator with hysteresis, without connecting Ct, switching speeds
(tr/tf, tpo/tpd, etc.) must be considered.
10
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PACKAGE OPTION ADDENDUM
www.ti.com
27-Feb-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TL7700CP
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TL7700CPE4
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TL7700CPSR
ACTIVE
SO
PS
8
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7700CPSRG4
ACTIVE
SO
PS
8
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7700CPW
ACTIVE
TSSOP
PW
8
150
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7700CPWE4
ACTIVE
TSSOP
PW
8
150
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7700CPWR
ACTIVE
TSSOP
PW
8
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL7700CPWRE4
ACTIVE
TSSOP
PW
8
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MPDI001A – JANUARY 1995 – REVISED JUNE 1999
P (R-PDIP-T8)
PLASTIC DUAL-IN-LINE
0.400 (10,60)
0.355 (9,02)
8
5
0.260 (6,60)
0.240 (6,10)
1
4
0.070 (1,78) MAX
0.325 (8,26)
0.300 (7,62)
0.020 (0,51) MIN
0.015 (0,38)
Gage Plane
0.200 (5,08) MAX
Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.015 (0,38)
0.430 (10,92)
MAX
0.010 (0,25) M
4040082/D 05/98
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm
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MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
0,65
14
0,10 M
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
8
14
16
20
24
28
A MAX
3,10
5,10
5,10
6,60
7,90
9,80
A MIN
2,90
4,90
4,90
6,40
7,70
9,60
DIM
4040064/F 01/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-153
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