EMIF03-SIM02F2 3-line IPAD™, EMI filter including ESD protection Features ■ EMI symmetrical (I/O) low-pass filter ■ High efficiency in EMI filtering ■ Lead-free package ■ Very low PCB space consuming: 1.42 mm x 1.42 mm ■ Very thin package: 0.65 mm ■ High efficiency in ESD suppression ■ High reliability offered by monolithic integration ■ High reduction of parasitic elements through integration and wafer level packaging Flip Chip (8 bumps) Figure 1. Complies with the following standards ■ ■ ■ IEC 61000-4-2, Level 4 on external and Vcc pins: – 15 kV (air discharge) – 8 kV (contact discharge) IEC 61000-4-2, Level 1 on internal pins: – 2 kV (air discharge) – 2 kV (contact discharge) Figure 2. Pin configuration (bump side) 3 2 1 RST in RST ext CLK in Gnd CLK ext B Data in VCC Data ext C A Configuration VCC MIL STD 883E - Method 3015-6 Class 3 100 Ω RST in RST ext R1 47 Ω CLK in Applications CLK ext R2 100 Ω Data ext Data in R3 EMI filtering and ESD protection for: ■ SIM Interface (Subscriber Identify Module) ■ UIM Interface (Universal Identify Module) Cline = 20pF max. GND Description The EMIF03-SIM02F2 is a highly integrated device designed to suppress EMI/RFI noise in all systems subjected to electromagnetic interference.The EMIF03 Flip Chip packaging means the package size is equal to the die size. This filter includes an ESD protection circuitry which prevents damage to the application when subjected to ESD surges up 15kV. April 2008 TM: IPAD is a trademark of STMicroelectronics. Rev 6 1/8 www.st.com 8 Characteristics 1 EMIF03-SIM02F2 Characteristics Table 1. Absolute maximum ratings (Tamb = 25 °C) Symbol VPP Tj Parameter and test conditions Value Internal pins (A3, B3, C3): ESD discharge IEC61000-4-2, air discharge ESD discharge IEC61000-4-2, contact discharge External pins (A2, B1, C2, C1): ESD discharge IEC61000-4-2, air discharge ESD discharge IEC61000-4-2, contact discharge 15 8 Maximum junction temperature 125 °C 2 2 kV Top Operating temperature range -40 to +85 °C Tstg Storage temperature range -55 to 150 °C Table 2. Electrical characteristics (Tamb = 25 °C) Symbol Parameters VBR Breakdown voltage IRM Leakage current @ VRM VRM Stand-off voltage VCL Clamping voltage Rd Dynamic impedance IPP Peak pulse current RI/O Series resistance between Input & Output Cline Input capacitance per line I IF VF VCL VBR VRM Symbol Test conditions VBR IR = 1 mA IRM VRM = 3V Rd V IRM IR IPP Min Typ 6 Max Unit 20 V 0.2 µA 1.5 Ω R1, R3 Tolerance ± 20% 100 Ω R2 Tolerance ± 20% 47 Ω Cline 2/8 Unit @ 0V 20 pF EMIF03-SIM02F2 Figure 3. Characteristics S21 (dB) attenuation measurement Figure 4. (A2-A3 line) S21 (dB) attenuation measurement (B1-B3 line) EMIF03-SIM02F2_FREQ-MEAS_PM428 Aplac 7.70 User: ST Microelectronics Sep 22 2004 EMIF03-SIM02F2_FREQ-MEAS_PM428 Aplac 7.70 User: ST Microelectronics Sep 22 2004 0.00 0.00 dB dB -10.00 -10.00 -20.00 -20.00 -30.00 -30.00 -40.00 -40.00 100.0k 1.0M 10.0M 100.0M 1.0G 100.0k 1.0M 10.0M f/Hz Figure 5. 100.0M 1.0G f/Hz A2/A3 Line B1/B3 line S21 (dB) attenuation measurement Figure 6. (C1-C3 line) Analog crosstalk measurements EMIF03-SIM02F2_FREQ-MEAS_PM428 Aplac 7.70 User: ST Microelectronics Sep 22 2004 EMIF03-SIM02F2_FREQ-MEAS_PM428 Aplac 7.70 User: ST Microelectronics Sep 22 2004 0.00 0.00 dB -10.00 dB -20.00 -10.00 -30.00 -40.00 -20.00 -50.00 -60.00 -70.00 -30.00 -80.00 -90.00 -40.00 -100.00 100.0k 1.0M 10.0M 100.0M 1.0G 100.0k f/Hz Figure 7. 1.0M 10.0M 100.0M 1.0G f/Hz C1/C3 line Xtalk A2/B3 Voltages when IEC61000-4-2 (+15 kV air discharge) applied to external pin Figure 8. Voltages when IEC61000-4-2 (-15 kV air discharge) applied to external pin Vexternal : 10V/d Vexternal : 5V/d Vinternal : 10V/d Vinternal : 5V/d 100ns/d 100ns/d 3/8 Application information Figure 9. EMIF03-SIM02F2 Line capacitance versus reverse applied voltage (typical) C(pF) 20.00 16.00 12.00 8.00 4.00 VR(V) 0.00 0 2 1 2 3 4 5 Application information Figure 10. Aplac model LbumpRbump 100 Rbump Lbump a2 Cbump Rsub bulk Lbump Rbump a3 Rsub Cbump bulk 47 Rbump Lbump b1 b3 Cbump Rsub bulk LbumpRbump Rsub Cbump bulk 100 Rbump Lbump c1 c3 Rsub Cbump bulk Dext2 Dint1 Dint1 Dext1 Dext1 0.25 0.28 bulk Rsub Cbump Dint2 0.25 0.29 0.31 0.29 Bulk Lbump Ls 100m Rbump a2 100m Ls a3 Lgnd Cgnd Port1 50 Port2 50 Rgnd Figure 11. Aplac parameters Ls 950pH Rs 150m Cext1 15pF Cint1 4.5pF Cext2 14pF Cint2 4pF Rbump 20m Lbump 50pH Cbump 0.15pF Rgnd 500m Lgnd 50pH Cgnd 0.15pF Rsub 100m 4/8 Model Dint1 BV=15 CJO=Cint1 IBV=1u IKF=1000 IS=10f ISR=100p N=1 M=0.3333 RS=0.001m VJ=0.6 TT=50n Model Dext1 BV=15 CJO=Cext1 IBV=1u IKF=1000 IS=10f ISR=100p N=1 M=0.3333 RS=0.001m VJ=0.6 TT=50n Model Dint2 BV=15 CJO=Cint2 IBV=1u IKF=1000 IS=10f ISR=100p N=1 M=0.3333 RS=0.001m VJ=0.6 TT=50n Model Dext2 BV=15 CJO=Cext2 IBV=1u IKF=1000 IS=10f ISR=100p N=1 M=0.3333 RS=0.001m VJ=0.6 TT=50n EMIF03-SIM02F2 3 Ordering information scheme Ordering information scheme Figure 12. Ordering information scheme EMIF yy - xxx zz Fx EMI Filter Number of lines Information x = resistance value (Ohms) z = capacitance value / 10(pF) or 3 letters = application 2 digits = version Package F = Flip Chip x = 2: lead-free pitch = 500 µm, bump = 315 µm Package information In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at www.st.com. Figure 13. Package dimensions 500 µm ± 50 650 µm ± 65 315 µm ± 50 195 µm 1.39 mm ± 30 µm 195 µm 1.39 mm ± 30 µm 500 µm ± 50 4 5/8 Ordering information EMIF03-SIM02F2 Figure 14. Footprint Figure 15. Marking Dot, ST logo xx = marking z = manufacturing location yww = datecode (y = year ww = week) Copper pad Diameter: 250 µm recommended, 300 µm max E x x z y ww Solder stencil opening: 330 µm Solder mask opening recommendation: 340 µm min for 315 µm copper pad diameter Figure 16. Flip Chip tape and reel specification Dot identifying Pin A1 location 3.5 ± 0.1 1.52 ST E xxz yww 1.52 xxz yww 4 ± 0.1 User direction of unreeling All dimensions in mm Note: ST E ST E xxz yww 8 ± 0.3 0.73 ± 0.05 1.75 ± 0.1 Ø 1.5 ± 0.1 4 ± 0.1 More information isavailable in the application notes: AN1235:"Flip Chip: Package description and recommendations for use" AN1751: “EMI filters: Recommendations and measurements” 5 Ordering information Table 3. 6/8 Ordering information Order code Marking Package Weight Base qty Delivery mode EMIF03-SIM02F2 GJ Flip Chip 2.65 mg 5000 Tape and reel 7” EMIF03-SIM02F2 6 Revision history Revision history Table 4. Document revision history Date Revision Changes 08-Oct-2004 1 First issue. 20-Oct-2004 2 Minor layout update. 25-Mar-2005 3 Figure 1 on page 1: pin configuration definitions changed from RST out, CLK out and Data out to RST ext, CLK ext and Data ext. 13-Jun-2005 4 Titles in Figures 7 and 8 changed - No technical data changed 12-Sep-2005 5 “out” changed to “ext” in Figure 2. 24-Apr-2008 6 Updated ECOPACK statement. Updated Figure 12, Figure 13, Figure 14, Figure 15 and Figure 16. Reformatted to current standards. 7/8 EMIF03-SIM02F2 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZE REPRESENTATIVE OF ST, ST PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS, WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. © 2008 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 8/8