L9857 High voltage high-side driver Features ■ High voltage rail up to 450 V ■ dV/dt immunity ±50 V/nsec in full temperature range ■ Driver current capability: 500 mA source, 500 mA sink ■ Switching times 100 ns rise/fall with 2.5 nF load ■ CMOS/TTL Schmitt trigger inputs with hysteresis and pull down ■ Under voltage lock out ■ Clamping on VCC ■ Non inverting input ■ Reset circuitry ■ SO8 package SO-8 Description The L9857 is an high voltage device, manufactured with the BCD "off-line" technology. Table 1. It has the capability of driving N channel PowerMOS transistors. The upper (floating) section is enabled to work with voltage rail up to 450 V. The logic inputs are CMOS/TTL compatible for ease of interfacing with controlling devices.. Device summary Order code Op. temp range, °C Package Packing L9857-TR -40 to +125 SO-8 Tape and reel L9857-TR-LF -40 to +125 SO-8 Tape and reel October 2009 Doc ID 12896 Rev 2 1/11 www.st.com 11 Content L9857 Content 1 2 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.3 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.5 Reset functional diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 Timing diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2/11 Doc ID 12896 Rev 2 L9857 Block diagram and pin description 1 Block diagram and pin description 1.1 Block diagram Figure 1. Block diagram VB Undervoltage RESET VB to VS Pulse Filter FLIP FLOP Break before Make VCC Undervoltage RESET VCC to GND HO VS RES- Level Shifter "ON" Logic Pulse Filter Level Shifter "OFF" IN GND 1.2 Pin description Figure 2. Table 2. Pin connection (top view) VCC 1 8 VB IN 2 7 HO GND 3 6 VS RESET- 4 5 NC Pin function Pin # Pin name Description 1 VCC 2 IN 3 GND 4 RESET- 5 NC No connection (no bondwire) 6 VS MOSFET source connection 7 HO MOSFET gate connection 8 VB Driver output stage supply Driver supply, typically 17V Driver control signal input (positive logic) Ground Driver enable signal input (negative logic) Doc ID 12896 Rev 2 3/11 Electrical specifications L9857 2 Electrical specifications 2.1 Thermal data Table 3. Thermal data Symbol Rth(j-amb) 2.2 Parameter Thermal resistance junction-to-ambient Max. Value Unit 150 °C/W Absolute maximum ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to GND, all currents are defined positive into any lead. This is a stress only rating and operation of the device at these or any conditions exceeding those indicated in the operational sections of this specifications is not implied. Table 4. Absolute maximum ratings Parameter Value Units Symbol Min. Max. VBS High side floating supply voltage -0.3 20 V VB High side driver output stage voltage -0.3 300 V VS High side floating supply offset voltage VB – 20 300 V VHO Output voltage gate connection VS - 0.3 VB + 0.3 V VCC Supply voltage -0.3 20 V VIN Input voltage -0.3 VCC + 0.3 V IIN Input injection current. Full function, no latch-up; (guaranteed by design). Test at 10 V and 17 V on eng. samples. - +1 mA -0.3 VCC + 0.3 V 2k - V VRES Reset input voltage Vesd Electrostatic discharge voltage (human body model) VCDM Charge device model CDM, EOS/ESD ass. std 5.3. number of discharges per pin: 6 500 - V dV/dt Allowable offset voltage slew rate -50 50 V/nsec Tj Junction temperature -55 150 Tstg Storage temperature -55 150 TL 4/11 Definition Lead temperature (soldering, 10 seconds) 3 times Bosch soldering profil acc. to Bosch soldering conditions, gen. spec. Doc ID 12896 Rev 2 °C - 300 L9857 Electrical specifications 2.3 Recommended operating conditions For proper operations the device should be used within the recommended conditions. Table 5. Recommended operating conditions Parameter Value Units Symbol Definition Min. Max. VS+10 (1) VS+18 V VB High side driver output stage voltage -5 V transient 0.1µs VS High side floating supply offset voltage - 20 V transient 0.1µs -5 300 V VHO Output voltage gate connection VS VB V VCC Supply voltage 10 18 V VIN Input voltage 0 VCC V Reset input voltage 0 VCC V Switching frequency - 200 kHz Ambient temperature -40 125 °C VRES FS Tamb 1. Reset-Logic functional for VB-VS=2V, independent from VCC-level 2.4 Electrical characteristics Unless otherwise specified, VCC = 15 V, VBS = 15 V, VS = 0 V, IN = 0 V, RES = 5 V, load R = 50 Ω, C = 2.5 nF. Unless otherwise noted, these specifications apply for an operating junction temperature range of -40 °C ≤ Tj ≤ 125 °C Table 6. Electrical characteristics Symbol Parameter Test condition Min. Typ. Max. Unit VCC supply VCCUV VCCUVHYS tdUVCC IQCC VCC supply undervoltage VCC rising from 0 V VCC dropping from 10 V 7.2 - 9.6 V VCC supply undervoltage lockout hysteresis - 0.02 0.2 0.4 V Undervoltage lockout response time VCC steps either from 10 V to 6 V or from 6 V to 10 V 0.5 - 20 μs VCC supply current - - - 400 μA VBS supply VBSUV VBS supply undervoltage VBS rising from 0 V VBS dropping from 10 V 7.2 - 9.6 V tdUVBS Undervoltage lockout response time VBS steps either from 10 V to 6 V or from 6 V to 10 V 0.5 - 20 μs Doc ID 12896 Rev 2 5/11 Electrical specifications Table 6. Symbol VBSUVHYS Electrical characteristics (continued) Parameter VBS supply undervoltage lockout hysteresis IQBS1 VBS supply current IQBS2 ΔVBS L9857 VBS drop due to output turn-on Test condition Min. Typ. Max. Unit 0.02 0.2 0.4 V static mode, VBS = 10 V, IN = 0 V or 5 V - - 100 μA static mode, VBS = 18 V, IN = 0 V or VCC - - 200 μA VBS = 17 V, CBS = 1 μF, tdIG-IN = 3 μs, tTEST = 100 μs - - 210 mV - Gate driver characteristics IPKSo1 VBS = 10 V , Tj = 25 °C PW ≤ 10 µs 120 250 - IPKSo2 VBS = 10 V PW ≤ 10 µs 70 150 - Peak output source current mA IPKSo3 VBS = 17 V, Tj = 25 °C PW ≤ 10 µs 250 500 - IPKSo4 VBS = 17 V, PW ≤ 10 µs 150 300 - Guaranteed by design - - 1 VBS = 10 V, Tj = 25°C - 0.2 0.4 VBS = 10 V - 0.3 0.5 tr3 VBS = 17 V, Tj = 25 °C - 0.1 0.2 tr4 VBS = 17 V - 0.15 0.3 IHOH,off HOH off-state leakage current tr1 tr2 Output rise time IPKSi1 IN = VCC, Tj = 25 °C VBS = 10 V, PW < 10 µs 120 250 - IPKSi2 IN = VCC, VBS = 10V , PW < 10 µs 70 150 - IPKSi3 IN = VCC, Tj = 25 °C VBS = 17 V, PW < 10 µs 250 500 - IPKSi4 IN = VCC, VBS = 17 V, PW < 10 µs 150 300 - VBS = 10 V, Tj = 25 °C - 0.2 0.4 VBS = 10 V - 0.3 0.5 tf3 VBS = 17 V, Tj = 25 °C - 0.1 0.2 tf4 VBS = 17 V - 0.15 0.3 - 0.1 0.3 Peak output sink current tf1 tf2 tplh 6/11 Output fall time Input-to-output turn-on propogation delay (50 % input level to 10 % output level) Doc ID 12896 Rev 2 μA μs mA μs μs L9857 Table 6. Electrical specifications Electrical characteristics (continued) Symbol Min. Typ. Max. Input-to-output turn-off propogation delay (50 % input level to 90% output level) - 0.1 0.2 tphl_res RES-to-output turn-off propogation delay (50% input level to 90% output levels) - - 0.1 0.3 tplh_res RES-to-output turn-on propogation delay (50% input level to 10% output levels) - - 0.1 0.8 tphl Parameter Test condition Unit μs Input characteristics VINH High logic level input threshold - 9.5 - - VINL Low logic level input threshold - - - 6 RIN High logic level input resistance (Pull-down resistor) - 60 - 300 kΩ IIN Low logic level input current VIN = 0 - - 5 μA VH_RES High logic level RES input threshold Reset signal comes from a 5 V system! 3.5 - - VL_RES Low Logic Level RES input threshold R eset signal comes from a 5V system! - - 1.4 RRES High logic level RES input resistance (Pull-down resistor) Reset signal comes from a 5 V system with pull-up resistor 3.8 kΩ to 5 V. (1) 60 - 300 kΩ IRES Low logic level input current VRES = 0 - - 5 μA V V 1. 4 HS-driver reset- inputs and other IC with their input pull-down resistors are connected in parallel with the RESET wire. The enable input RES- is an active low input, that means a logic low turns the external Power MOSFET off. The input circuitry has to make sure, that the MOSFET is off, when the pin is open or floating. In the application the RES- pin is tied to a bipolar open collector transistor or MOSFET open drain transistor with pull-up resistor 3.8K to +5V together with other RES- inputs of other IC. 2.5 Reset functional diagram The diagram is guaranteed for the following condition. VCC = 10 V; VBS = 10 V @ -40 °C, VCC = 17 V; VBS = 17 V @ +25 °C and 125 °C Figure 3. Reset functional diagram IN RESET HO-VS: -40°C HO-VS: 25°C HO-VS: 125°C Doc ID 12896 Rev 2 7/11 Timing diagrams 3 L9857 Timing diagrams Figure 4. Input/output timing diagram IN RES Vs Figure 5. Reset timing diagram IN 90% 90% RES 10% HOH,L 10% tr tplh_res 8/11 tphl_res Doc ID 12896 Rev 2 tf L9857 4 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Figure 6. SO-8 mechanical data and package dimensions mm inch DIM. MIN. TYP. A MAX. MIN. TYP. 1.750 MAX. 0.0689 A1 0.100 0.250 0.0039 A2 1.250 0.0492 0.0098 b 0.280 0.480 0.0110 0.0189 c 0.170 0.230 0.0067 0.0091 D (1) 4.800 4.900 5.000 0.1890 0.1929 0.1969 E 5.800 6.000 6.200 0.2283 0.2362 0.2441 3.900 4.000 0.1496 0.1535 0.1575 (2) E1 3.800 e 1.270 0.0500 h 0.250 0.500 0.0098 0.0197 L 0.400 1.270 0.0157 0.0500 L1 k ccc 1.040 0˚ OUTLINE AND MECHANICAL DATA 0.0409 8˚ 0.100 0˚ 8˚ 0.0039 Notes: 1. Dimensions D does not include mold flash, protrusions or gate burrs. Mold flash, potrusions or gate burrs shall not exceed 0.15mm in total (both side). 2. Dimension “E1” does not include interlead flash or protrusions. Interlead flash or protrusions shall not exceed 0.25mm per side. SO-8 0016023 D Doc ID 12896 Rev 2 9/11 Revision history 5 L9857 Revision history Table 7. 10/11 Document revision history Date Revision Changes 20-Nov-2006 1 Initial release. 07-Oct-2009 2 Updated Table 1: Device summary. Doc ID 12896 Rev 2 L9857 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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