STMICROELECTRONICS RHFXH162244K03V

54VCXH162244
Low voltage CMOS 16-bit bus buffer (3-state non inverter)
with 3.6 V tolerant inputs and outputs
Features
■
1.65 to 3.6 V inputs and outputs
■
High speed:
– tPD = 3.4 ns at VCC = 3.0 to 3.6 V
– tPD = 3.8 ns at VCC = 2.3 to 2.7 V
■
Power down protection on inputs and outputs
■
Symmetrical output impedance:
– |IOH| = IOL = 12 mA (Min.) at VCC = 3.0 V
– |IOH| = IOL = 8 mA (Min.) at VCC = 2.3 V
■
26 Ω serie resistors in outputs
■
Operating voltage range:
– VCC(Opr) = 1.65 V to 3.6 V
■
Pin and function compatible with 54 series
H162244
■
Bus hold provided on data inputs
■
Cold spare function
■
Latch-up performance exceeds
300 mA (JESD 17)
■
ESD performance:
– HBM > 2000 V
(Mil Std 883 Method 3015); MM > 200 V
■
300 krad Mil1019.6 condition A, (RHA QML
qualification extension undergone)
■
No SEL, no SEU and no SET under 110
Mev/cm2/mg LET heavy ions irradiation
■
QML qualified product
■
SMD 5962-05210
■
100 mV typical input hysteresis
July 2011
Flat-48
The upper metallic lid is not electrically connected to any
pins, nor to the IC die inside the package.
Description
The 54VCXH162244 is a low voltage CMOS 16
bit bus buffer (non inverted) fabricated with submicron silicon gate and five-layer metal wiring
C²MOS technology. It is ideal for low power and
very high speed 1.65 to 3.6 V applications; it can
be interfaced to 3.6 V signal environment for both
inputs and outputs. Any nG output control
governs four BUS buffers. Output enable input
(nG) tied together gives full 16-bit operation.
When nG is low, the outputs are on. When nG is
high, the output are in high impedance state. This
device is designed to be used with 3 state
memory address drivers, etc. Bus hold on data
inputs is provided in order to eliminate the need
for external pull-up or pull-down resistor. The
device circuits is including 26 Ω series resistance
in the outputs. These resistors permit to reduce
line noise in high speed applications. All inputs
and outputs are equipped with protection circuits
against static discharge, giving them 2 kV ESD
immunity and transient excess voltage.
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18
Contents
54VCXH162244
Contents
1
Logic symbols and I/O equivalent circuit . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
2.1
Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.3
Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.1
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5
Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
6
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
7
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
8
Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
9
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2/18
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54VCXH162244
1
Logic symbols and I/O equivalent circuit
Logic symbols and I/O equivalent circuit
Figure 1.
IEC logic symbols
Figure 2.
Input and output equivalent circuit
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Pin settings
54VCXH162244
2
Pin settings
2.1
Pin connection
Figure 3.
4/18
Pin connection (top through view)
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54VCXH162244
2.2
Pin description
Table 1.
2.3
Pin settings
Pin description
Pin n°
Symbol
1
1G
2, 3, 5, 6
1Y1 to 1Y4
Data outputs
8, 9, 11, 12
2Y1 to 2Y4
Data outputs
13, 14, 16, 17
3Y1 to 3Y4
Data outputs
19, 20, 22, 23
4Y1 to 4Y4
Data outputs
24
4G
Output enable input
25
3G
Output enable input
30, 29, 27, 26
4A1 to 4A4
Data outputs
36, 35, 33, 32
3A1 to 3A4
Data outputs
41, 40, 38, 37
2A1 to 2A4
Data outputs
47, 46, 44, 43
1A1 to 1A4
Data outputs
48
2G
4, 10, 15, 21, 28, 34, 39, 45
GND
Ground (0 V)
7, 18, 31, 42
VCC
Positive supply voltage
Output enable input
Output enable Input
Truth table
Table 2.
Truth table
Inputs
Note:
Name and function
Output
G
An
Yn
L
L
L
L
H
H
H
X
Z
X = Do not care; Z = High impedance
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Maximum rating
3
54VCXH162244
Maximum rating
Stressing the device above the rating listed in the “absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
Table 3.
Absolute maximum ratings
Symbol
Value
Unit
Supply voltage
-0.5 to +4.6
V
VI
DC input voltage
-0.5 to +4.6
V
VO
DC output voltage (OFF state)
-0.5 to +4.6
V
-0.5 to VCC + 0.5
V
VCC
Parameter
(1)
VO
DC output voltage (high or low state)
IIK
DC input diode current
- 50
mA
IOK
DC output diode current (2)
- 50
mA
IO
DC output current
± 50
mA
DC VCC or ground current per supply pin
± 100
mA
400
mW
-65 to +150
°C
260
°C
ICC or
IGND
PD
Power dissipation
Tstg
Storage temperature
TL
Lead temperature (10 sec)
1. IO absolute maximum rating must be observed
2. VO < GND, VO > VCC
3.1
Recommended operating conditions
Table 4.
Recommended operating conditions
Symbol
Value
Unit
Supply voltage
1.8 to 3.6
V
VI
Input voltage
-0.3 to 3.6
V
VO
Output voltage (OFF state)
0 to 3.6
V
VO
Output voltage (high or low state)
0 to VCC
V
VCC
Parameter
IOH, IOL
High or low level output current (VCC = 3.0 to 3.6 V)
± 12
mA
IOH, IOL
High or low level output current (VCC = 2.3 to 2.7 V)
±8
mA
-55 to 125
°C
0 to 10
ns/V
Top
dt/dv
Operating temperature
Input rise and fall time
(1)
1. VIN from 0.8 V to 2 V at VCC = 3.0 V
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54VCXH162244
4
Electrical characteristics
Electrical characteristics
2.7 V < VCC < 3.6 V unless otherwise specified
Table 5.
DC specifications
Test condition
Symbol
Parameter
VIH
High level input
voltage
VIL
Low level input
voltage
Value
-55 to 125°C
VCC
(V)
Min.
Max.
2.0
2.7 to 3.6
VOH
High level output
voltage
V
0.8
2.7 to 3.6
IO = -100 µA
VCC-0.2
2.7
IO = -6 mA
2.2
IO = -8 mA
2.4
IO = -12 mA
2.2
3.0
VOL
Low level output
voltage
IO = 100 µA
0.2
2.7
IO = 6 mA
0.4
IO = 8 mA
0.5
IO = 12 mA
0.8
VI = VCC or GND
±5
Input leakage current 2.7 to 3.6
3.0
II(HOLD)
V
2.7 to 3.6
3.0
II
Unit
Input hold current
V
VI = 0.8 V
75
VI = 2 V
-75
μA
μA
3.6
VI = 0 to 3.6 V
± 500
0
VI or VO = 0 to 3.6 V
10
μA
VI = VIH or VIL
VO = 0 to 3.6 V
± 10
μA
Ioff
Power off leakage
current
IOZ
High impedance
output leakage
current
2.7 to 3.6
20
Quiescent supply
current
VI = VCC or GND
ICC
2.7 to 3.6
VI or VO =
VCC to 3.6 V
± 20
ΔICC
ICC incr. per input
2.7 to 3.6
VIH = VCC - 0.6 V
750
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μA
μA
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Electrical characteristics
54VCXH162244
2.3 V < VCC < 2.7 V unless otherwise specified
Table 6.
DC specifications
Test condition
Symbol
Parameter
VIH
High level input
voltage
VIL
Low level input
voltage
Value
-55 to 125 °C
VCC
(V)
Min.
Max.
1.6
2.3 to 2.7
High level output
voltage
VOL
II
8/18
Input hold current
Ioff
Power off leakage
current
IOZ
High impedance
output leakage
current
ICC
Quiescent supply
current
VCC-0.2
IO = -4 mA
2.0
IO = -6 mA
1.8
IO = -8 mA
1.7
V
IO = 100 μA
0.2
IO = 6 mA
0.4
IO = 8 mA
0.6
VI = VCC or GND
±5
2.3
Input leakage current 2.3 to 2.7
II(HOLD)
IO = -100 μA
2.3
2.3 to 2.7
Low level output
voltage
V
0.7
2.3 to 2.7
VOH
Unit
2.3
VI = 0.7 V
45
VI = 1.7 V
-45
V
µA
µA
0
VI or VO = 0 to 3.6 V
10
µA
2.3 to 2.7
VI = VIH or VIL
VO = 0 to 3.6 V
± 10
µA
VI = VCC or GND
20
VI or VO =
VCC to 3.6 V
± 20
2.3 to 2.7
Doc ID 10652 Rev 9
µA
54VCXH162244
Electrical characteristics
TA = 25 °C, Input tr = tf = 2.0 ns, CL = 30 pF, RL = 500 Ω
Table 7.
Dynamic switching characteristics
Test condition
Symbol
Parameter
Unit
VCC
(V)
Dynamic low voltage quiet
output (1) (2)
2.5
VOLP
Dynamic low voltage quiet
output (1) (2)
2.5
VOLV
Dynamic high voltage
quiet output (2) (3)
2.5
VOHV
Value
TA = 25 °C
3.3
3.3
3.3
VIL = 0V
VIH = VCC
0.25
VIL = 0V
VIH = VCC
-0.25
VIL = 0V
VIH = VCC
2.05
V
0.35
V
-0.35
V
2.65
1. Number of outputs defined as “n”. Measured with “n-1” outputs switching from HIGH to LOW or LOW to
HIGH. The remaining output is measured in the LOW state.
2. Parameters guaranteed by design.
3. Number of outputs defined as “n”. Measured with “n-1” outputs switching from HIGH to LOW or LOW to
HIGH. The remaining output is measured in the HIGH state.
CL = 30 pF, RL = 500 Ω, Input tr = tf = 2.0 ns
Table 8.
AC electrical characteristics
Test condition
Symbol
Parameter
VCC
(V)
tPLH tPHL
Propagation delay
time
tPZL tPZH
Output enable time
tPLZ tPHZ
Output disable time
tOSLH tOSHL
Value
-55 to 125 °C
Min.
Max.
2.3 to 2.7
1.0
5.2
3.0 to 3.6
0.8
5.0
2.3 to 2.7
1.0
5.8
3.0 to 3.6
0.8
4.2
2.3 to 2.7
1.0
4.5
3.0 to 3.6
0.8
4.0
Unit
ns
Output to output skew
time (1) (2)
ns
ns
2.3 to 2.7
0.5
3.0 to 3.6
0.5
ns
1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two
outputs of the same device switching in the same direction, either HIGH or LOW (tOSLH = | tPLHm - tPLHn|,
tOSHL = | tPHLm - tPHLn|)
2. Parameter guaranteed by design
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Electrical characteristics
Table 9.
54VCXH162244
Capacitive characteristics
Test condition
Symbol
Parameter
Value
Unit
VCC
(V)
TA = 25 °C
Input capacitance
2.5 or 3.3
VIN = 0 or VCC
6
pF
COUT
Output capacitance
2.5 or 3.3
VIN = 0 or VCC
7
pF
CPD
Power dissipation
capacitance (1)
2.5 or 3.3
fIN = 10 MHz
VIN = 0 or VCC
20
pF
CIN
1. CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the
operating current consumption without load. (Refer to test circuit). Average operating current can be
obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/16 (per circuit)
10/18
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54VCXH162244
5
Test circuit
Test circuit
Figure 4.
Application circuit
Table 10.
Test circuit
Test
tPLH, tPHL
Switch
Open
tPZL, tPLZ (VCC = 3.0 to 3.6 V)
6V
tPZL, tPLZ (VCC = 2.3 to 2.7 V)
2 VCC
tPZH, tPHZ
GND
CL = 10/30 pF or equivalent (includes jig and probe capacitance)
RL = R1 = 500 Ω or equivalent
RT = ZOUT of pulse generator (typically 50 Ω)
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Waveforms
6
54VCXH162244
Waveforms
Table 11.
Waveform symbol value
VCC
Symbol
Figure 5.
12/18
3.0 to 3.6 V
2.3 to 2.7 V
VIH
2.7 V
VCC
VM
1.5 V
VCC/2
VX
VOL +0.3 V
VOL +0.15 V
VY
VOH -0.3 V
VOH -0.15 V
Waveform - propagation delay (f = 1 MHz; 50% duty cycle)
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54VCXH162244
Figure 6.
Waveforms
Waveform - output enable and disable time (f = 1 MHz; 50% duty cycle)
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Package mechanical data
7
54VCXH162244
Package mechanical data
54VCXH162245 products are supplied into ceramic body / metal lid hermetic Flat 48-pin
space package
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Table 12.
Flat-48 (MIL-STD-1835) mechanical data
mm
inch
Dim.
14/18
Min.
Typ.
Max.
Min.
Typ.
Max.
A
2.18
2.47
2.72
0.086
0.097
0.107
b
0.20
0.254
0.30
0.008
0.010
0.012
c
0.12
0.15
0.18
0.005
0.006
0.007
D
15.57
15.75
15.92
0.613
0.620
0.627
E
9.52
9.65
9.78
0.375
0.380
0.385
E2
6.22
6.35
6.48
0.245
0.250
0.255
E3
1.52
1.65
1.78
0.060
0.065
0.070
e
0.635
0.025
f
0.20
0.008
L
6.85
8.38
9.40
0.270
0.330
0.370
Q
0.66
0.79
0.92
0.026
0.031
0.036
S1
0.25
0.43
0.61
0.010
0.017
0.024
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54VCXH162244
Figure 7.
Package mechanical data
Package dimension
7330585B
Note:
The upper metallic lid is not electrically connected to any pins, nor to the IC die inside the
package. Connecting unused pins or metal lid to ground or to the power supply will not affect
the electrical characteristics.
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Order codes
54VCXH162244
8
Order codes
Table 13.
Ordering information
Min op.
voltage
Lead
finish
Radiation
level
48-pin flat
1.8V
gold plated
300 krad
Die
3.6V to 1.8V
-
100 krad
Package
16/18
Flight models
QML-V
Engineering
model
Packing
RHFXH162244K03V RHRXH162244K1 Conductive strip pack
RXH162244DIE2V
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54VCXH162244
9
Revision history
Revision history
Table 14.
Document revision history
Date
Revision
Changes
09-Jul-2004
1
First release
17-May-2005
2
SMD qualified
19-Jun-2006
3
300 krad bullet updated, new template, mechanical data updated
11-Apr-2007
4
Updated cover page features
30-Jul-2007
5
Typo in Table 12 on page 14
17-Sep-2008
6
Updated cover page
09-Jan-2009
7
Updated cover page
23-Sep-2009
8
Updated Table 13 on page 16
29-Jul-2011
9
Added Note: on page 15 and in the "Pin connections" diagram on the
coverpage
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54VCXH162244
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