STGIPN3H60A SLLIMM™-nano (small low-loss intelligent molded module) IPM, 3 A - 600 V 3-phase IGBT inverter bridge Datasheet − production data Features ■ IPM 3 A, 600 V, 3-phase IGBT inverter bridge including control ICs for gate driving and freewheeling diodes ■ Optimized for low electromagnetic interference ■ VCE(sat) negative temperature coefficient ■ 3.3 V, 5 V, 15 V CMOS/TTL input comparators with hysteresis and pull-down resistor ■ Undervoltage lockout ■ Internal bootstrap diode ■ Interlocking function ■ Optimized pinout for easy board layout NDIP-26L Applications Description ■ 3-phase inverters for motor drives ■ Dish washers, refrigerator compressors, heating systems, air-conditioning fans, draining and recirculation pumps Table 1. This intelligent power module implements a compact, high-performance AC motor drive in a simple, rugged design. It is composed of six IGBTs with freewheeling diodes and three halfbridge HVICs for gate driving, providing low electromagnetic interference (EMI) characteristics with optimized switching speed. The package is optimized for thermal performance and compactness in built-in motor applications, or other low power applications where assembly space is limited. SLLIMM™ is a trademark of STMicroelectronics. Device summary Order code Marking Package Packaging STGIPN3H60A GIPN3H60A NDIP-26L Tube May 2012 This is information on a product in full production. Doc ID 018958 Rev 3 1/17 www.st.com 17 Contents STGIPN3H60A Contents 1 Internal schematic diagram and pin configuration . . . . . . . . . . . . . . . . 3 2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.1 4 Control part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.1 Recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2/17 Doc ID 018958 Rev 3 STGIPN3H60A 1 Internal schematic diagram and pin configuration Internal schematic diagram and pin configuration Figure 1. Internal schematic diagram Pin 1 Pin 26 NW GND NC Vcc W GND HVG VCC OUT HIN LVG W, OUT W LIN VBOOT HIN W Vboot W LIN W NC NV NC NC Vcc V GND HVG VCC OUT HIN LVG V, OUT V LIN VBOOT HIN V LIN V Vboot V NC NU Vcc U HIN U GND HVG VCC OUT HIN LVG U,OUT U NC LIN VBOOT P LIN U Vboot U Pin 16 AM09917v1 Doc ID 018958 Rev 3 Pin 17 3/17 Internal schematic diagram and pin configuration Table 2. 4/17 STGIPN3H60A Pin description Pin Symbol Description 1 GND 2 NC 3 VCC W Low voltage power supply W phase 4 HIN W High side logic input for W phase 5 LIN W Low side logic input for W phase 6 NC Not connected 7 NC Not connected 8 NC Not connected 9 VCC V Low voltage power supply V phase 10 HIN V High side logic input for V phase 11 LIN V Low side logic input for V phase 12 NC 13 VCC U Low voltage power supply for U phase 14 HIN U High side logic input for U phase 15 NC 16 LIN U 17 Vboot U 18 P Positive DC input 19 U U phase output 20 NU Negative DC input for U phase 21 Vboot V Bootstrap voltage for V phase 22 V V phase output 23 NV Negative DC input for V phase 24 Vboot W Bootstrap voltage for W phase 25 W W phase output 26 NW Negative DC input for W phase Ground Not connected Not connected Not connected Low side logic input for U phase Bootstrap voltage for U phase Doc ID 018958 Rev 3 STGIPN3H60A Figure 2. Internal schematic diagram and pin configuration Pin layout (top view) (*) Dummy pin internally connected to P (positive DC input). Doc ID 018958 Rev 3 5/17 Electrical ratings STGIPN3H60A 2 Electrical ratings 2.1 Absolute maximum ratings Table 3. Inverter part Symbol VCES Parameter Value Unit 600 V Each IGBT collector emitter voltage (VIN(1) = 0) ± IC (2) Each IGBT continuous collector current at TC = 25 °C 3 A ± ICP (3) Each IGBT pulsed collector current 18 A Each IGBT total dissipation at TC = 25 °C 8 W PTOT 1. Applied between HINi, LINi and GND for i = U, V, W. 2. Calculated according to the iterative formula: Tj ( max ) – TC IC ( T C ) = ------------------------------------------------------------------------------------------------------R thj – c × V CE ( sat ) ( max ) ( T j ( max ), I C ( T C ) ) 3. Pulse width limited by max junction temperature. Table 4. Control part Symbol Min. Max. Unit Vboot -18 Vboot + 0.3 V VOUT Output voltage applied between OUTU, OUTV, OUTW - GND VCC Low voltage power supply - 0.3 18 V Vboot Bootstrap voltage - 0.3 618 V Logic input voltage applied between HINi, LINi and GND for i = U, V, W - 0.3 VCC + 0.3 V 50 V/ns VIN ΔVOUT/dT Table 5. Symbol VISO 6/17 Parameter Allowed output slew rate Total system Parameter Isolation withstand voltage applied between each pin and heatsink plate (AC voltage, t = 60 sec.) Value Unit 1000 V TJ Power chips operating junction temperature -40 to 150 °C TC Module case operating temperature -40 to 125 °C Doc ID 018958 Rev 3 STGIPN3H60A 2.2 Electrical ratings Thermal data Table 6. Symbol RthJA Thermal data Parameter Thermal resistance junction-ambient Doc ID 018958 Rev 3 Value Unit 50 °C/W 7/17 Electrical characteristics 3 STGIPN3H60A Electrical characteristics Tj = 25 °C unless otherwise specified. Table 7. Symbol VCE(sat) ICES VF Inverter part Parameter Test conditions Min. Typ. Max. VCC = Vboot = 15 V, VIN(1)= 0 - 5 V, IC = 1 A - 2.15 2.6 VCC = Vboot = 15 V, VIN(1)= 0 - 5 V, IC = 1 A, TJ = 125 °C - 1.65 Collector-cut off current (VIN(1)= 0 “logic state”) VCE = 550 V, VCC = VBoot = 15 V - 250 µA Diode forward voltage VIN(1) = 0 “logic state”, IC = 1 A - 1.7 V Collector-emitter saturation voltage Unit V Inductive load switching time and energy ton tc(on) toff tc(off) trr Turn-on time Crossover time (on) Turn-off time Crossover time (off) Reverse recovery time Eon Turn-on switching losses Eoff Turn-off switching losses VDD = 300 V, VCC = Vboot = 15 V, VIN(1) = 0 - 5 V, IC = 1 A (see Figure 4) - 275 - 90 - 890 - 125 - 50 - 18 - 13 ns µJ 1. Applied between HINi, LINi and GND for i = U, V, W (LIN inputs are active-low). Note: tON and tOFF include the propagation delay time of the internal drive. tC(ON) and tC(OFF) are the switching time of IGBT itself under the internally given gate driving condition. Figure 3. 8/17 Switching time test circuit Doc ID 018958 Rev 3 STGIPN3H60A Electrical characteristics Figure 4. Switching time definition 100% IC 100% IC t rr IC VCE VCE IC VIN VIN t ON t OFF t C(OFF) t C(ON) VIN(ON) VIN(OFF) 10% IC 90% IC 10% VCE 10% VCE (a) turn-on 3.1 10% IC (b) turn-off AM09223V1 Control part Table 8. Symbol Low voltage power supply (VCC = 15 V unless otherwise specified) Parameter Test conditions Min. Typ. Max. Unit VCCthON Undervoltage turn-on threshold 9.1 9.6 10.1 V VCCthOFF Undervoltage turn-off threshold 7.9 8.3 8.8 V Undervoltage hystereses 0.9 VCChys V Iqccu Undervoltage quiescent supply current VCC < 7.9 V 250 330 µA Iqcc Quiescent current VCC = 15 V 350 450 µA Table 9. Symbol Bootstrapped voltage (VCC = 15 V unless otherwise specified) Parameter Test conditions Min. Typ. Max. Unit Undervoltage turn-on threshold 8.5 9.5 10.5 V Vboot_thOFF Undervoltage turn-off threshold 7.2 8.3 9.2 V Vboot_thON Vboothys Iqboot RDS(on) Undervoltage hystereses 0.9 V Quiescent current 250 Bootstrap driver on-resistance VCC > 12.5 V Doc ID 018958 Rev 3 125 µA Ω 9/17 Electrical characteristics Table 10. STGIPN3H60A Logic inputs (VCC = 15 V unless otherwise specified) (1) Symbol Parameter Vil Low level logic input voltage Vih High level logic input voltage Test conditions Min. Typ. Max. Unit 1.1 (2) Iil Low level logic input current VIN Iih High level logic input current VIN (1) = 15 V Dt Dead time =0 V 1.8 V -1 µA 20 70 320 µA ns 1. See Figure 5: Dead time and interlocking definition. 2. Applied between HINi, LINi and GND for i = U, V, W Figure 5. Dead time and interlocking definition H IN DT DT LVG DT Interlocking function LIN HVG AM03794v1 10/17 Doc ID 018958 Rev 3 STGIPN3H60A Application information 4 Application information Figure 6. Typical application circuit Doc ID 018958 Rev 3 11/17 Application information 4.1 Recommendations ● Input signals HIN, LIN are active-high logic. A 500 kΩ (typ.) pull-down resistor is built-in for each high side input. If an external RC filter is used for noise immunity, attention should be given to the variation of the input signal level. ● To prevent input signal oscillation, the wiring of each input should be as short as possible. ● By integrating an application-specific type HVIC inside the module, direct coupling to the MCU terminals without an opto-coupler is possible. ● Each capacitor should be located as close as possible to the pins of the IPM. ● Low inductance shunt resistors should be used for phase leg current sensing. ● Electrolytic bus capacitors should be mounted as close to the module bus terminals as possible. Additional high frequency ceramic capacitors mounted close to the module pins will further improve performance. Table 11. Symbol 12/17 Recommended operating conditions Parameter Test conditions Min. VPN Supply voltage Applied between P-Nu, Nv, Nw VCC Control supply voltage Applied between VCCGND VBS High side bias voltage Applied between VBOOTiOUTi for i = U, V, W 11.5 tdead Blanking time to prevent Arm-short For each input signal 1.5 fPWM PWM input signal -40°C < Tc < 100°C -40°C < Tj < 125°C TC Note: STGIPN3H60A Case operation temperature For further details refer to AN4043. Doc ID 018958 Rev 3 12 Typ. Max. Unit 300 500 V 15 17 V 17 V µs 25 kHz 100 °C STGIPN3H60A 5 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. Table 12. NDIP-26L mechanical data mm. Dim. Min. Typ. A Max. 4.40 A1 0.80 1.00 1.20 A2 3.00 3.10 3.20 A3 1.70 1.80 1.90 A4 5.70 5.90 6.10 b 0.53 b1 0.52 b2 0.83 b3 0.82 c 0.46 c1 0.45 0.50 0.55 D 29.05 29.15 29.25 D1 0.50 D2 0.35 0.72 0.60 0.68 1.02 0.90 0.98 0.59 D3 29.55 E 12.35 12.45 12.55 e 1.70 1.80 1.90 e1 2.40 2.50 2.60 eB1 16.10 16.40 16.70 eB2 21.18 21.48 21.78 L 1.24 1.39 1.54 Doc ID 018958 Rev 3 13/17 Package mechanical data NDIP-26L package dimensions D3 b,b2 0.075 b D1 A3 A1 A4 c c1 A2 b1,b3 A Figure 7. STGIPN3H60A e E eB2 eB1 0.075 L D D2 b2 e1 8278949_A 14/17 Doc ID 018958 Rev 3 STGIPN3H60A NDIP-26L tube dimensions (dimensions are in mm.) AN T IS T AT IC S 03 P VC AM10474v1 Figure 8. Package mechanical data 8313150_A Note: Base quantity 17 pcs, bulk quantity 476 pcs. Doc ID 018958 Rev 3 15/17 Revision history 6 STGIPN3H60A Revision history Table 13. 16/17 Document revision history Date Revision Changes 23-Jun-2011 1 Initial release. 09-Jan-2012 2 Document status promoted from preliminary data to datasheet. Added Figure 8 on page 15. 02-May-2012 3 Modified: Min. and Max. value Table 4 on page 6. Added: Table 11 on page 12. Doc ID 018958 Rev 3 STGIPN3H60A Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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