STL12P6F6 P-channel 60 V, 0.13 Ω typ., 3 A STripFET™ VI DeepGATE™ Power MOSFET in a PowerFLAT™ 5x6 package Datasheet - production data Features Order code VDSS RDS(on)max ID STL12P6F6 60 V 0.16 Ω @ 10 V 3A • RDS(on) * Qg industry benchmark 1 • Extremely low on-resistance RDS(on) 2 3 4 • High avalanche ruggedness • Low gate drive power losses PowerFLAT™ 5x6 Applications • Switching applications Figure 1. Internal schematic diagram Description 'ĆĆĆ This device is a P-channel Power MOSFET developed using the 6th generation of STripFET™ DeepGATE™ technology, with a new gate structure. The resulting Power MOSFET exhibits the lowest RDS(on) in all packages. * 6ĆĆ $09 Table 1. Device summary Order code Marking Package Packaging STL12P6F6 12P6F6 PowerFLAT 5x6 Tape and reel Note: For the P-channel Power MOSFET the actual polarity of the voltages and the current must be reversed. March 2013 This is information on a product in full production. DocID024400 Rev 1 1/13 www.st.com 13 Contents STL12P6F6 Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Test circuits 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2/13 ............................................... 6 DocID024400 Rev 1 STL12P6F6 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 60 V VGS Gate-source voltage ± 20 V Drain current (continuous) at TC = 25 °C 4 A ID(1) Drain current (continuous) at TC = 100 °C 7 A ID (2) Drain current (continuous) at Tpcb = 25 °C 12 A ID (2) Drain current (continuous) at Tpcb = 100 °C 7 A (2)(3) Drain current (pulsed) 48 A PTOT Total dissipation at TC = 25 °C 75 W PTOT Total dissipation at Tpcb = 25 °C 4.8 W Tj Pstg Operating junction temperature Storage temperature -55 to 175 °C Value Unit Thermal resistance junction-case max 2 °C/W Thermal resistance junction-pcb max 31.3 °C/W ID IDM (1) 1. The value is according to Rthj-case 2. The value is according to Rthj-pcb 3. Pulse width is limited by safe operating area. Table 3. Thermal data Symbol Rthj-case Rthj-pcb (1) Parameter 1. When mounted on FR-4 board of 15 mm2, 2 Oz Cu, t<10 sec Note: For the P-channel Power MOSFET actual polarity of voltages and current has to be reversed. DocID024400 Rev 1 3/13 Electrical characteristics 2 STL12P6F6 Electrical characteristics (Tcase = 25 °C unless otherwise specified). Table 4. On /off states Symbol V(BR)DSS Parameter Drain-source breakdown voltage (VGS = 0) Test conditions ID = 250 μA IDSS Zero gate voltage VDS = 60 V drain current (VGS = 0) VDS = 60 V, TC=125 °C IGSS Gate-body leakage current (VDS = 0) Min. Typ. 60 Gate threshold voltage VDS = VGS, ID = 250 μA RDS(on) Static drain-source onVGS = 10 V, ID = 1.5 A resistance Unit V 1 10 μA μA ±100 nA 4 V 0.13 0.16 Ω Min. Typ. Max. Unit - 340 - pF - 40 - pF - 20 - pF - 6.4 - nC - 1.7 - nC - 1.7 - nC Min. Typ. Max. Unit - 6.4 - ns - 5.3 - ns - 14 - ns - 3.7 - ns VGS = ± 20 V VGS(th) Max. 2 Table 5. Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge Test conditions VDS = 48 V, f = 1 MHz, VGS = 0 VDD = 48 V, ID = 3 A, VGS = 10 V (see Figure 3) Table 6. Switching times Symbol td(on) tr td(off) tf Note: 4/13 Parameter Test conditions Turn-on delay time Rise time Turn-off delay time VDD = 48 V, ID = 1.5 A, RG = 4.7 Ω, VGS = 10 V (see Figure 2) Fall time For the P-channel Power MOSFET actual polarity of voltages and current has to be reversed. DocID024400 Rev 1 STL12P6F6 Electrical characteristics Table 7. Source drain diode Symbol Parameter Test conditions ISD ISDM (1) Source-drain current Source-drain current (pulsed) VSD (2) Forward on voltage trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current Min. Typ. Max. Unit - 3 12 A A ISD = 3 A, VGS = 0 - 1.1 V ISD = 5 A, di/dt = 100 A/μs VDD = 16 V, Tj = 150 °C (see Figure 4) - 20 ns - 17.8 nC - 1.8 A 1. Pulse width limited by safe operating area. 2. Pulse duration = 300 μs, duty cycle 1.5% Note: For the P-channel Power MOSFET actual polarity of voltages and current has to be reversed. DocID024400 Rev 1 5/13 Test circuits 3 STL12P6F6 Test circuits Figure 2. Switching times test circuit for resistive load Figure 3. Gate charge test circuit Figure 4. Test circuit for inductive load switching and diode recovery times 6/13 DocID024400 Rev 1 STL12P6F6 4 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Table 8. PowerFLAT 5x6 type S-R mechanical data mm Dim. Min. Typ. Max. A 0.80 1.00 A1 0.02 0.05 A2 0.25 b 0.30 0.50 D 5.00 5.20 5.40 E 5.95 6.15 6.35 D2 4.11 4.31 E2 3.50 3.70 e 1.27 L 0.60 0.80 K 1.275 1.575 DocID024400 Rev 1 7/13 Package mechanical data STL12P6F6 Figure 5. PowerFLAT™ 5x6 type S-R drawing 5 8 Bottom View Pin 1 identification 4 1 Side View 8 5 . Top View Pin 1 identification 8/13 1 4 8231817_Rev.F_Ribbon type S-R DocID024400 Rev 1 STL12P6F6 Package mechanical data Figure 6. PowerFLAT™ 5x6 recommended footprint (dimensions are in mm) Footprint DocID024400 Rev 1 9/13 Packaging mechanical data 5 STL12P6F6 Packaging mechanical data Figure 7. PowerFLAT™ 5x6 tape(a) P0 4.0±0.1 (II) P2 2.0±0.1 (I) T (0.30 ±0.05) E1 1.75±0.1 Y 0. 20 Do Ø1.55±0.05 W(12.00±0.3) F(5.50±0.1)(III) R Bo (5.30±0.1) C L EF D1 Ø1.5 MIN. REF .R0 .50 Y P1(8.00±0.1) Ao(6.30±0.1) Ko (1.20±0.1) SECTION Y-Y (I) Measured from centerline of sprocket hole to centerline of pocket. Base and bulk quantity 3000 pcs (II) Cumulative tolerance of 10 sprocket holes is ± 0.20 . (III) Measured from centerline of sprocket hole to centerline of pocket. 8234350_Tape_rev_C Figure 8. PowerFLAT™ 5x6 package orientation in carrier tape. Pin 1 identification a. All dimensions are in millimeters. 10/13 DocID024400 Rev 1 STL12P6F6 Packaging mechanical data Figure 9. PowerFLAT™ 5x6 reel R0.60 W3 11.9/15.4 PART NO. 1.90 2.50 R25.00 ØN 178(±2.0) ATTENTION OBSERVE PRECAUTIONS FOR HANDLING ELECTROSTATIC SENSITIVE DEVICES W2 18.4 (max) A 330 (+0/-4.0) 4.00 2.50 77 ESD LOGO W1 12.4 (+2/-0) 06 PS ØA 128 2.20 R1.10 Ø21.2 All dimensions are in millimeters 13.00 CORE DETAIL 8234350_Reel_rev_C DocID024400 Rev 1 11/13 Revision history 6 STL12P6F6 Revision history Table 9. Document revision history 12/13 Date Revision 20-Mar-2013 1 Changes First release. DocID024400 Rev 1 STL12P6F6 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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