STP52N25M5 N-channel 250 V, 0.055 Ω, 28 A, TO-220 MDmeshTM V Power MOSFET Features Type VDSS RDS(on) max ID STP52N25M5 250 V < 0.065 Ω 28 A ■ Amongst the best RDS(on)* area ■ High dv/dt capability ■ Excellent switching performance ■ Easy to drive ■ 100% avalanche tested 3 1 2 TO-220 Application ■ Switching applications Figure 1. Internal schematic diagram Description $ This devices is an N-channel MDmesh™ V Power MOSFET based on an innovative proprietary vertical process technology, which is combined with STMicroelectronics’ well-known PowerMESH™ horizontal layout structure. The resulting product has extremely low onresistance, which is unmatched among siliconbased Power MOSFETs, making it especially suitable for applications which require superior power density and outstanding efficiency. ' 3 !-V Table 1. Device summary Order code Marking Package Packaging STP52N25M5 52N25M5 TO-220 Tube July 2010 Doc ID 17776 Rev 1 1/12 www.st.com 12 Contents STP52N25M5 Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................ 6 3 Test circuits 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2/12 .............................................. 8 Doc ID 17776 Rev 1 STP52N25M5 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Symbol Value Unit Gate- source voltage 25 V ID Drain current (continuous) at TC = 25 °C 28 A ID Drain current (continuous) at TC = 100 °C 18 A IDM (1) Drain current (pulsed) 112 A PTOT Total dissipation at TC = 25 °C 110 W IAR Avalanche current, repetitive or not-repetitive (pulse width limited by TJ max) 10 A EAS Single pulse avalanche energy (starting TJ = 25 °C, ID = IAR, VDD = 50 V) 230 mJ Peak diode recovery voltage slope 15 V/ns -55 to 150 °C Value Unit VGS dv/dt(2) TJ Tstg Parameter Operating junction temperature Storage temperature 1. Pulse width limited by safe operating area. 2. ISD ≤ 28 A, di/dt ≤ 400 A/µs, VPeak < V(BR)DSS. Table 3. Symbol Thermal data Parameter Rthj-case Thermal resistance junction-case max 1.14 °C/W Rthj-amb Thermal resistance junction-pcb max 62.5 °C/W Maximum lead temperature for soldering purpose 300 °C/W TJ Doc ID 17776 Rev 1 3/12 Electrical characteristics 2 STP52N25M5 Electrical characteristics (Tcase =25°C unless otherwise specified). Table 4. Symbol V(BR)DSS On /off states Parameter Test conditions Drain-source breakdown voltage ID = 1 mA, VGS = 0 Min. Typ. Max. Unit 250 V IDSS VDS = Max rating Zero gate voltage drain current (VGS = 0) VDS = Max rating, TC=125 °C 1 100 µA µA IGSS Gate-body leakage current (VDS = 0) 100 nA 4 5 V 0.055 0.065 Ω Min. Typ. Max. Unit VGS = ± 25 V VGS(th) Gate threshold voltage VDS = VGS, ID = 100 µA RDS(on) Static drain-source onVGS = 10 V, ID = 14 A resistance Table 5. Symbol 3 Dynamic Parameter Test conditions Ciss Coss Crss Input capacitance Output capacitance Reverse transfer capacitance VDS = 50 V, f = 1 MHz, VGS = 0 - 1770 110 17 - pF pF pF Co(er)(1) Equivalent output capacitance energy related VGS = 0, VDS = 0 to 80% V(BR)DSS - 93 - pF Co(tr)(2) Equivalent output capacitance time related VGS = 0, VDS = 0 to 80% V(BR)DSS - 178 - pF Rg Gate input resistance f=1 MHz open drain - 2 - Ω Qg Qgs Qgd Total gate charge Gate-source charge Gate-drain charge VDD = 200 V, ID = 28 A, VGS = 10 V (see Figure 14) - 47 10 24 - nC nC nC 1. Co(er) is a constant capacitance value that gives the same stored energy as Coss while VDS is rising from 0 to 80% VDSS. 2. Co(tr) is a constant capacitance value that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. 4/12 Doc ID 17776 Rev 1 STP52N25M5 Electrical characteristics Table 6. Switching times Symbol Parameter td(V) tr(V) tf(i) tc(off) Table 7. Symbol Test conditions Voltage delay time Voltage rise time Current fall time Crossing time VDD = 125 V, ID = 14 A, RG = 4.7 Ω, VGS = 10 V (see Figure 13) Parameter Test conditions Source-drain current Source-drain current (pulsed) VSD (2) Forward on voltage IRRM trr Qrr IRRM Typ. - 40 18 64 82 Max Unit - ns ns ns ns Source drain diode ISD ISDM (1) trr Qrr Min. Min. Typ. Max Unit - 28 112 A A ISD = 28 A, VGS = 0 - 1.6 V Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 28 A, di/dt = 100 A/µs VDD= 60 V, TJ = 25 °C (see Figure 15) - 168 1.2 14.5 ns µC A Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 28 A, di/dt = 100 A/µs VDD= 60 V TJ = 150 °C (see Figure 15) - 196 1.7 17 ns µC A 1. Pulse width limited by safe operating area. 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5% Doc ID 17776 Rev 1 5/12 Electrical characteristics STP52N25M5 2.1 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance Figure 5. Transfer characteristics !-V )$ ! IS EA AR 3ON $ TH 2 IN AX N IT O YM RA B PE ED / IMIT , IS S S MS 4J # 4C # MS 3INGLE PULSE Figure 4. 6$36 Output characteristics !-V )$ ! 6'36 !-V )$ ! 6 6 6 Figure 6. 6$36 Gate charge vs gate-source voltage Figure 7. !-V 6'3 6 6'3 6$$6 )$! 6$3 6'36 Static drain-source on resistance !-V 2$3ON /HM 6'36 6/12 1GN# Doc ID 17776 Rev 1 )$! STP52N25M5 Figure 8. Electrical characteristics Capacitance variations Figure 9. !-V # P& #ISS Output capacitance stored energy !-V %OSS * #OSS #RSS Figure 10. Normalized gate threshold voltage vs temperature !-V 6'3TH 6$36 NORM 6$36 Figure 11. Normalized on resistance vs temperature !-V 2$3ON NORM 4* # 4* # Figure 12. Normalized BVDSS vs temperature !-V "6$33 NORM 4* # Doc ID 17776 Rev 1 7/12 Test circuits 3 STP52N25M5 Test circuits Figure 13. Switching times test circuit for resistive load Figure 14. Gate charge test circuit VDD 12V 47kΩ 1kΩ 100nF 3.3 µF 2200 RL µF VGS IG=CONST VDD 100Ω Vi=20V=VGMAX VD RG 2200 µF D.U.T. D.U.T. VG 2.7kΩ PW 47kΩ 1kΩ PW AM01468v1 AM01469v1 Figure 15. Test circuit for inductive load Figure 16. Unclamped inductive load test switching and diode recovery times circuit A A D.U.T. FAST DIODE B B L A D G VD L=100µH S 3.3 µF B 25 Ω 1000 µF D VDD 2200 µF 3.3 µF VDD ID G RG S Vi D.U.T. Pw AM01470v1 Figure 17. Unclamped inductive waveform AM01471v1 Figure 18. Switching time waveform ton V(BR)DSS tdon VD toff tr tdoff tf 90% 90% IDM 10% ID VDD 10% 0 VDD VDS 90% VGS AM01472v1 8/12 0 Doc ID 17776 Rev 1 10% AM01473v1 STP52N25M5 4 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. Doc ID 17776 Rev 1 9/12 Package mechanical data STP52N25M5 TO-220 type A mechanical data mm Dim Min A b b1 c D D1 E e e1 F H1 J1 L L1 L20 L30 ∅P Q Typ 4.40 0.61 1.14 0.48 15.25 Max 4.60 0.88 1.70 0.70 15.75 1.27 10 2.40 4.95 1.23 6.20 2.40 13 3.50 10.40 2.70 5.15 1.32 6.60 2.72 14 3.93 16.40 28.90 3.75 2.65 3.85 2.95 0015988_Rev_S 10/12 Doc ID 17776 Rev 1 STP52N25M5 5 Revision history Revision history Table 8. Document revision history Date Revision 29-Jul-2010 1 Changes First release Doc ID 17776 Rev 1 11/12 STP52N25M5 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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