TD352 Advanced IGBT/MOSFET driver Features ■ 1.7 A sink / 1.3 A source (typ) current capability ■ Active Miller clamp feature ■ Desaturation detection ■ Adjustable turn-on delay ■ UVLO protection ■ 2k V ESD protection SO-8 Applications ■ 1200 V 3-phase inverter ■ Motor control systems ■ UPS Description This device is an advanced gate driver for IGBTs and power MOSFETs. Control and protection functions are included and allow the design of high reliability systems. The innovative active Miller clamp function eliminates the need for negative gate drive in most applications and allows the use of a simple bootstrap supply for the high side driver. The TD352 includes an adjustable turn-on delay. This feature can be used to implement reliable deadtime between high and low sides of a half bridge. An external resistor and capacitor are used to provide accurate timing. Table 1. Device summary Order codes Temperature range Package -40°C, +125°C SO-8 TD352ID Tube TD352IDT June 2011 Packaging Tape and reel Doc ID 11095 Rev 2 1/18 www.st.com 18 Contents TD352 Contents 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5.1 Input stage ................................................ 8 5.2 Voltage reference ........................................... 8 5.3 Active Miller clamp .......................................... 8 5.4 Turn-on delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5.5 Desaturation protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5.6 Output stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5.7 Undervoltage protection ...................................... 9 6 Timing diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 7 Typical performance curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 8 Application diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 9 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2/18 Doc ID 11095 Rev 2 TD352 Block diagram Figure 1. TD352 block diagram 6 8* K 56,/ ). 62%& #$ $%3!4 6REF $ELAY 6( #ONTROL "LOCK 1 Block diagram /54 6, #,!-0 $ESAT 4$ !-V Doc ID 11095 Rev 2 3/18 Pin connections 2 TD352 Pin connections Figure 2. Pin connections (top view) 9+ 287 9/ &/$03 ,1 95() 7' &' '(6$7 !-V Table 2. 4/18 Pin description Pin n° Name Type Function IN 1 Analog input Input VREF 2 Analog output +5 V reference voltage CD 3 Timing capacitor Turn on delay DESAT 4 Analog input Desaturation protection CLAMP 5 Analog output Miller clamp VL 6 Power supply Signal ground OUT 7 Analog output Gate drive output VH 8 Power supply Positive supply Doc ID 11095 Rev 2 TD352 Absolute maximum ratings 3 Absolute maximum ratings Table 3. Absolute maximum ratings Symbol Parameter Value Unit 28 V VHL Maximum supply voltage (VH - VL) Vout Voltage on OUT, CLAMP, DESAT pins VL-0.3 to VH+0.3 V Vother Voltage on other pins (IN, CD, VREF) -0.3 to 7 V 500 mW -55 to 150 °C Maximum junction temperature 150 °C RthJA Thermal resistance junction-ambient 150 °C/W ESD Electrostatic discharge (HBM) 2 kV Value Unit UVLO to 26 V -40 to 125 °C Pd Power dissipation Tstg Storage temperature Tj Table 4. Symbol VH Toper Operating conditions Parameter Positive supply voltage vs. VL Operating free air temperature range Doc ID 11095 Rev 2 5/18 Electrical characteristics 4 TD352 Electrical characteristics TA = -20 to 125 °C, VH = 16 V, unless otherwise specified. Table 5. Electrical characteristics Symbol Parameter Test condition Min Typ 0.8 1.0 Max Unit Input Vton IN turn-on threshold voltage Vtoff IN turn-off threshold voltage Iinp IN input current 4.0 IN input voltage < 4.5V V 4.2 V 1 µA 5.15 V Voltage reference (1) Vref Voltage reference Iref Maximum output current T = 25°C 4.85 5.00 10 mA Clamp Vtclamp VCL CLAMP pin voltage threshold Clamp low voltage 2.0 Icsink = 500mA V 2.5 V Delay Vtdel Voltage threshold Rdel Discharge resistor 2.5 I=1mA V 500 Ω Desaturation protection Vdes Desaturation threshold Ides Source current VH-2 V 250 µA Output Isink Output sink current Vout = 6V 1000 1700 mA Isrc Output source current Vout = VH-6V 750 1300 mA VOL1 Output low voltage 1 Iosink = 20mA 0.35 V VOL2 Output low voltage 2 Iosink = 500mA 2.5 V VOH1 Output high voltage 1 Iosource = 20mA VH-2.5 V VOH2 Output high voltage 2 Iosource = 500mA VH-4.0 V tr Rise time CL = 1nF, 10% to 90% 100 ns tf Fall time CL = 1nF, 90% to 10% 100 ns Turn on propagation delay 10% OUT change: Rd = 4.7kΩ, no Cd Rd = 11kΩ, Cd = 220 pF 500 2.2 ns µs 400 ns tdon tdoff 6/18 Turn off propagation delay 10% OUT change Doc ID 11095 Rev 2 1.8 2.0 TD352 Table 5. Electrical characteristics Electrical characteristics (continued) Symbol Parameter Test condition Min Typ Max Unit Under voltage lockout (UVLO) UVLOH UVLO top threshold 10 11 12 V UVLOL UVLO bottom threshold 9 10 11 V 0.5 1 Vhyst UVLO hysteresis UVLOH-UVLOL V Supply current Iin Quiescent current OUT = 0V; no load 2.5 mA 1. Recommended capacitor range on VREF pin is 10 nF to 100 nF Doc ID 11095 Rev 2 7/18 Functional description TD352 5 Functional description 5.1 Input stage The TD352 IN input is internally clamped at about 5 V to 7 V. The input is triggered by the signal edge. When using an open collector optocoupler, the resistive pull-up resistor can be connected to either VREF or VH. Recommended pull-up resistor value with VH=16 V is from 4.7 kΩ to 22 kΩ. 5.2 Voltage reference A voltage reference is used to create accurate timing for the turn-on delay with external resistor and capacitor. A decoupling capacitor (10 nF to 100 nF) on the VREF pin is required to ensure good noise rejection. 5.3 Active Miller clamp The TD352 offers an alternative solution to the problem of Miller current in IGBT switching applications. Instead of driving the IGBT gate to a negative voltage to increase the safety margin, the TD352 uses a dedicated CLAMP pin to control the Miller current. When the IGBT is off, a low impedance path is established between the IGBT gate and emitter to carry the Miller current, and the voltage spike on the IGBT gate is greatly reduced. During turn-off, the gate voltage is monitored and the clamp output is activated when the gate voltage goes below 2 V (relative to VL). The clamp voltage is VL+4V max for a Miller current up to 500 mA. The clamp is disabled when the IN input is triggered again. The CLAMP function does not affect the turn-off characteristic, but only keeps the gate at low level throughout the off time. The main benefit is that negative voltage can be avoided in many cases, allowing a bootstrap technique for the high side driver supply. 5.4 Turn-on delay Turn-on (Ta) delay is programmable through external resistor Rd and capacitor Cd for accurate timing. Ta is approximately given by (see Figure 5): Ta (µs) = 0.7 * Rd (kΩ) * Cd (nF) The turn-on delay can be disabled by connecting the CD pin to VREF with a 4.7 kΩ resistor. Input signals with ON-time smaller than Ta are ignored. 8/18 Doc ID 11095 Rev 2 TD352 5.5 Functional description Desaturation protection Desaturation protection ensures the protection of the IGBT in the event of overcurrent. When the DESAT voltage goes higher than VH-2V, the TD352 OUT pin is driven low. The fault state is only exited after a power-down and power-up cycle. A programmable blanking time is used to allow enough time for IGBT saturation. Blanking time is provided by an internal current source and external Cdes capacitor. The Tbdes blanking time value is given by: Tbdes = Vdes * Cdes / Ides At VH=16V, Tbdes is approximately given by: Tbdes (µs) = 0.056 * Cdes (pF) 5.6 Output stage The output stage is able to sink/source 1.7 A/1.3 A (typical) at 25 °C and 1.0 A/0.75 A min. over the full temperature range. This current capability is specified near the usual IGBT Miller plateau. 5.7 Undervoltage protection Undervoltage detection protects the application in the event of a low VH supply voltage (during startup or a fault situation). During undervoltage, the OUT pin is driven low (active pull-down for VH>2V, and passive pull-down for VH<2V). Figure 3. Undervoltage protection 56,/( 56,/, 6CCMIN 6( 6 /54 &!5,4 ".W Doc ID 11095 Rev 2 9/18 Functional description Figure 4. TD352 Detailed internal schematic 56,/ %QORA+PRWV ). 8 66 62%& 66REF %QORA&GNC[1HH #$ #ONTROL"LOCK 6 5 6( W# %QORA%NCOR %QORA&GUCV $%3!4 #,!-0 6 6(6 5 6( /54 6, ".W 10/18 Doc ID 11095 Rev 2 TD352 6 Timing diagrams Timing diagrams Figure 5. General turn-on and turn-off sequence 4WIN ). #$ 4A 6(LEVEL /54 6,LEVEL 4WOUT /PEN #,!-0 6(LEVEL -ILLERPLATEAU 6GE #LAMPTHRESHOLD 6,LEVEL 6CE !-V Figure 6. Input and output waveform dynamic parameters 4WIN 6TOFF ). LEVELMODE 6TON ). EDGEMODE 6TOFF 6TON 6(LEVEL TDOFF /54 4WOUT 6,LEVEL TDON !-V Doc ID 11095 Rev 2 11/18 Timing diagrams TD352 Figure 7. Desaturation fault ). 6 #$ 4A 6(LEVEL 6,LEVEL /54 6(6 $%3!4 $ESAT"LANKING4IME !-V 12/18 Doc ID 11095 Rev 2 TD352 Typical performance curves Typical performance curves Figure 8. Quiescent current vs temperature Figure 9. 5GHO2KPV ,QP$ 7 Rdel resistance vs temperature 7HPS& !-V Figure 10. Low level output voltage vs temp. 7HPS& !-V Figure 11. High level output voltage vs temp. 9+92+9 92/9/9 )OSINKM! )OSOURCEM! )OSOURCEM! )OSINKM! 7HPS& 7HPS& !-V Doc ID 11095 Rev 2 !-V 13/18 Typical performance curves TD352 Figure 12. Sink current vs temperature Figure 13. Source current vs temperature ,VUFP$ ,VLQNP$ 7HPS& 14/18 !-V Doc ID 11095 Rev 2 7HPS& !-V TD352 Application diagrams Figure 14. Single supply IGBT drive with active Miller clamp and DESAT protection 6 8* K 56,/ 62%& 6REF #$ $ELAY $%3!4 6( #ONTROL "LOCK ). /54 6, #,!-0 $ESAT 4$ !-V Figure 15. Use of DESAT input for direct overcurrent detection 6 8* K 56,/ 62%& 6REF 6REF #$ $ELAY $%3!4 6( #ONTROL "LOCK ). /54 6, #,!-0 $ESAT 4$ !-V Figure 16. Large IGBT drive with negative voltage gate drive and optional current buffers 8* K 56,/ ). 6 6 62%& #$ $%3!4 6REF $ELAY 6( #ONTROL "LOCK 8 Application diagrams /PTIONAL /54 6, #,!-0 $ESAT 4$ /PTIONAL !-V Doc ID 11095 Rev 2 15/18 Package mechanical data 9 TD352 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Table 6. SO-8 mechanical data mm. inch Dim. Min. Typ Max. Min. Typ. A 1.35 1.75 0.053 0.069 A1 0.10 0.25 0.04 0.010 A2 1.10 1.65 0.043 0.065 B 0.33 0.51 0.013 0.020 C 0.19 0.25 0.007 0.010 D 4.80 5.00 0.189 0.197 E 3.80 4.00 0.150 0.157 e 1.27 0.050 H 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.020 L 0.40 1.27 0.016 0.050 k (max.) 8 ddd 0.1 0.04 Figure 17. SO-8 mechanical drawing # 16/18 Max. Doc ID 11095 Rev 2 TD352 10 Revision history Revision history Table 7. Document revision history Date Revision Changes 01-Nov-2004 1 Initial release 13-Jun-2011 2 Deleted order code TD352IN. Content reworked to improve readability. Doc ID 11095 Rev 2 17/18 TD352 Please Read Carefully: Information in this document is provided solely in connection with ST products. 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