TDA2050 32 W hi-fi audio power amplifier Features ■ High output power (50 W music power IEC 268.3 rules) ■ High operating supply voltage (50 V) ■ Single or split supply operations ■ Very low distortion ■ Short-circuit protection (OUT to GND) ■ Thermal shutdown Pentawatt V Description The TDA 2050 is a monolithic integrated circuit in a Pentawatt package, intended for use as an audio class-AB audio amplifier. Thanks to its high power capability the TDA2050 is able to provide up to 35 W true RMS power into a 4 ohm load at THD = 0%, VS = ±18 V, f = 1 kHz and up to 32 W into an 8 ohm load at THD = 10%, VS = ±22 V, f = 1 kHz. The high power and very low harmonic and crossover distortion (THD = 0.05% typ, at VS = ±22 V, PO = 0.1 to 15 W, RL= 8 ohm, f = 100 Hz to 15 kHz) make the device most suitable for both hi-fi and high-end TV sets. Table 1. Device summary Order code Package TDA2050V Pentawatt vertical Moreover, the TDA2050 delivers typically 50 W music power into a 4 ohm load over 1 sec at VS = 22.5 V, f = 1 kHz. Figure 1. August 2011 Test and application circuit Doc ID 1461 Rev 3 1/18 www.st.com 18 Device overview 1 TDA2050 Device overview Table 2. Absolute maximum ratings Symbol Vs Vi Vi Io Ptot Tstg, Tj Table 3. 2/18 Parameter Supply voltage Input voltage Differential input voltage Output peak current (internally limited) Power dissipation at TCASE = 75 °C Storage and junction temperature Value Unit ±25 Vs ±15 5 25 -40 to 150 V V A W °C Thermal data Symbol Parameter Rth j-case Thermal resistance junction-case Figure 2. Pin connections (top view) Figure 3. Schematic diagram Doc ID 1461 Rev 3 Value Unit 3 (max) °C TDA2050 Device overview The values given in the following table refer to the test circuit VS = ±18 V, Tamb = 25 °C, f = 1 kHz, unless otherwise specified. Table 4. Electrical characteristics Symbol Parameter Test conditions V Supply voltage range Id Quiescent drain current Vs = ± 4.5 Vs = ± 25 Ib Input bias current Vs = ± 22 VOS Input offset voltage Vs = ± 22 IOS Input offset current s Output power o Music power IEC268.3 rules Distortion d = 0.5%, RL = 4 Ω RL = 8 Ω Vs = ± 22 V, RL = 8 Ω Unit ± 25 V 30 55 50 90 mA mA 0.1 0.5 µA ± 15 mV ± 200 nA 22 28 18 25 W W W 35 22 32 W W W 50 W 0.03 Vs = ± 22 V, RL = 8 Ω, f = 1 kHz, Po = 0.1 to 20 W, f = 100 Hz to 10 kHz; Po = 0.1 to 15 W 0.02 Slew rate Voltage gain (open loop) f = 1 kHz Gv Voltage gain (closed loop) f = 1 kHz BW Power bandwidth (-3dB) Vi = 200 mW, RL = 4 Ω; eN Input noise voltage B = Curve A B = 22 Hz to 22 kHz Ri Input resistance (pin 1) SVR Supply voltage rejection Efficiency Max. Po = 0.1 to 24W, RL = 4 Ω, f = 1 kHz f = 100 to 10 kHz, Po = 0.1 to 18 W Gv Tsd-j 24 d = 10%, T = 1s RL = 4 Ω; Vs = ± 22.5 V SR h Typ. ± 4.5 d = 10%, RL = 4 Ω RL = 8 Ω Vs = ± 22 V, RL = 8 Ω P d Min. 5 30 0.5 0.5 % % 0.5 % % 8 V/µs 80 dB 30.5 31 20 to 80.000 4 5 500 dB Hz 10 µV µV kΩ Rg = 22 kΩ, f = 100 Hz; Vripple = 0.5 VRMS 45 dB Po = 28 W, RL = 4 Ω 65 % Po = 25 W, RL = 8 Ω,Vs = ± 22 V, 67 % 150 °C Thermal shutdown junction temperature Doc ID 1461 Rev 3 3/18 Device overview TDA2050 Figure 4. Split-supply typical application circuit Figure 5. PC board and component layout of split-supply typical application circuit TDA2050 RL R4 R3 +Vs R2 C7 C5 C2 C3 R1 C4 C6 C1 -Vs Vi 4/18 Doc ID 1461 Rev 3 TDA2050 2 Split-supply application suggestions Split-supply application suggestions The recommended values of the external components are those shown on the application circuit of Figure 5. Different values can be used. The following table can help the designer. Table 5. Component Recommended values of external components Recommended Purpose value Input impedance Larger than recommended value Smaller than recommended value Increase of input impedance Decrease of Input Impedance Decrease of gain(1) Increase of gain Increase of gain Decrease of gain(1) R1 22 kΩ R2 680 Ω R3 22 kΩ R4 2.2 Ω Frequency stability C1 1 µF Input decoupling DC C2 22 µF Inverting input DC decoupling C3, C4 100 nF Supply voltage bypass Danger of oscillation Feedback resistor Danger of oscillations Higher low-frequency cutoff Increase of switch ON/OFF noise Higher low-frequency cutoff C5, C6 220 µF Supply voltage bypass Danger of oscillation C7 0.47 µF Frequency stability Danger of oscillation 1. The gain must be higher than 24 dB Doc ID 1461 Rev 3 5/18 Split-supply application suggestions 2.1 TDA2050 Printed circuit board The layout shown in Figure 5 should be adopted by the designers. If different layouts are used, the ground points of input 1 and input 2 must be well decoupled from the ground return of the output in which a high current flows. Figure 6. Single-supply typical application circuit Figure 7. PC board and component layout of single-supply typical application circuit 6/18 Doc ID 1461 Rev 3 TDA2050 3 Single-supply application suggestions Single-supply application suggestions The recommended values of the external components are those shown in the application circuit of Figure 6. Different values can be used. The following table can help the designer. Table 6. Component Recommonded values Recommended Purpose value Larger than Smaller than recommended value recommended value R1, R2, R3 22 kΩ Biasing resistor R4 680 Ω R5 22 kΩ R6 2.2 Ω Frequency stability C1 2.2 µF Input decoupling DC C2 100 µF Supply voltage rejection C3 1000 µF Supply voltage bypass C4 22 µF Inverting input DC decoupling C5 100 nF Supply voltage bypass Danger of oscillations C6 0.47 µF Frequency stability Danger of oscillations C7 1000 µF Output DC decoupling Higher low-frequency cutoff Feedback resistor Increase of gain Decrease of gain(1) Decrease of gain(1) Increase of gain Danger of oscillations Higher low-frequency cutoff Worse turn-off transient Worse turn-on delay Danger of oscillations Worse turn-off transient Increase of switching ON/OFF Higher low-frequency cutoff 1. The gain must be higher than 24 dB Note: If the supply voltage is lower than 40 V and the load is 8 ohm (or more), a lower value of C2 can be used (i.e. 22 mF). C7 can be larger than 1000 µF only if the supply voltage does not exceed 40 V. Doc ID 1461 Rev 3 7/18 Typical characteristics (split-supply test circuit unless otherwise specified) 4 Typical characteristics (split-supply test circuit unless otherwise specified) Figure 8. Output power vs. supply voltage Figure 10. Output power vs. supply voltage 8/18 Figure 9. TDA2050 Distortion vs. output power Figure 11. Distortion vs. output power Doc ID 1461 Rev 3 TDA2050 Typical characteristics (split-supply test circuit unless otherwise specified) Figure 12. Distortion vs. frequency Figure 13. Distortion vs. frequency Figure 14. Quiescent current vs. supply voltage Figure 15. Supply voltage rejection vs. frequency Doc ID 1461 Rev 3 9/18 Typical characteristics (split-supply test circuit unless otherwise specified) TDA2050 Figure 16. Supply voltage rejection vs. frequency (single-supply) for different values of C2 (Figure 6) Figure 17. Supply voltage rejection vs. frequency (single-supply) for different values of C2 (Figure 6) Figure 18. Total power dissipation and efficiency vs. output power Figure 19. Total power dissipation and efficiency vs. output power 10/18 Doc ID 1461 Rev 3 TDA2050 5 Short-circuit protection Short-circuit protection The TDA2050 has an original circuit which limits the current of the output transistors. The maximum output current is a function of the collector emitter voltage, hence the output transistors work within their safe operating area. This function can therefore be considered as being peak power limiting rather than simple current limiting. It reduces the possibility that the device gets damaged during an accidental short-circuit from AC output to ground. Doc ID 1461 Rev 3 11/18 Thermal shutdown 6 TDA2050 Thermal shutdown The presence of a thermal limiting circuit offers the following advantages: 1. An overload on the output (even if it is permanent), or an above-limit ambient temperature can be easily tolerated since Tj cannot be higher than 150 °C. 2. The heatsink can have a smaller factor of safety compared with that of a conventional circuit. There is no possibility of device damage due to high junction temperature. If for any reason, the junction temperature increases up to 150 °C, the thermal shutdown simply reduces the power dissipation and the current consumption. The maximum allowable power dissipation depends upon the thermal resistance junctionambient. Figure 20 shows this dissipable power as a function of ambient temperature for different thermal resistances. Figure 20. Maximum allowable power dissipation vs. ambient temperature 6.1 Mounting instructions The power dissipated in the circuit must be removed by adding an external heatsink. Thanks to the pentawatt package, the heatsink mounting operation is very simple, a screw or a compression spring (clip) being sufficient. Between the heatsink and the package it is better to insert a layer of silicon grease, to optimize the thermal contact; no electrical isolation is needed between the two surfaces. Figure 21 shows an example of a heatsink. 12/18 Doc ID 1461 Rev 3 TDA2050 6.2 Thermal shutdown Dimension recommendations The following table shows the length that the heatsink in Figure 21 must have for several values of Ptot and Rth. Table 7. Dimension recommendations Ptot (W) Length of heatsink (mm) Rth of heatsink (°C/W) 12 60 4.2 8 40 6.2 6 30 8.3 Figure 21. Example of heatsink Doc ID 1461 Rev 3 13/18 TDA2050 Appendix A A.1 Music power concept Music power is (according to the IEC clauses n.268-3 of Jan. 83) the maximum power which the amplifier is capable of producing across the rated load resistance (regardless of nonlinearity) 1 sec after the application of a sinusoidal input signal of frequency 1 kHz. According to this definition our method of measurement comprises the following steps: ● Set the voltage supply at the maximum operating value ● Apply a input signal in the form of a 1 kHz tone burst of 1 sec duration: the repetition period of the signal pulses is 60 sec ● The output voltage is measured 1 sec from the start of the pulse ● Increase the input voltage until the output signal shows a THD=10% ● The music power is then V2out /RL, where Vout is the output voltage measured in the condition of point 4 and RL is the rated load impedance The target of this method is to avoid excessive dissipation in the amplifier. A.2 Instantaneous power Another power measurement (maximum instantaneous output power) was proposed by the IEC in 1988 (IEC publication 268-3 subclause 19.A). We give here only a brief extract of the concept, and a circuit useful for the measurement. The supply voltage is set at the maximum operating value. The test signal consists of a sinusoidal signal whose frequency is 20 Hz, to which are added alternate positive and negative pulses of 50 µs duration and 500 Hz repetition rate. The amplitude of the 20 Hz signal is chosen to drive the amplifier to its voltage clipping limits, while the amplitude of the pulses takes the amplifier alternately into its current-overload limits. A circuit for generating the test signal is given in Figure 22. The load network consists of a 40 µF capacitor, in series with a 1 ohm resistor. The capacitor limits the current due to the 20 Hz signal to a low value, whereas for the short pulses the effective load impedance is of the order of 1 ohm, and a high output current is produced. Using this signal and load network the measurement may be made without causing excessive dissipation in the amplifier. The dissipation in the 1 ohm resistor is much lower than a rated output power of the amplifier, because the duty-cycle of the high output current is low. By feeding the amplifier output voltage to the Xplates of an oscilloscope, and the voltage across the 1 ohm resistor (representing the output current) to the Y=plates, it is possible to read on the display the value of the maximum instantaneous output power. The result of this test applied on the TDA2050 is: Peak power = 100 W typ 14/18 Doc ID 1461 Rev 3 TDA2050 Figure 22. Test circuit for peak power measurement Doc ID 1461 Rev 3 15/18 Package mechanical data 7 TDA2050 Package mechanical data Figure 23. Pentawatt V package DIM. A C D D1 E E1 F F1 G G1 H2 H3 L L1 L2 L3 L4 L5 L6 L7 L9 L10 M M1 V4 V5 DIA MIN. mm TYP. 2.40 1.20 0.35 0.76 0.80 1.00 3.20 6.60 3.40 6.80 17.55 15.55 21.2 22.3 17.85 15.75 21.4 22.5 2.60 15.10 6.00 2.10 4.30 4.23 3.75 4.5 4.0 3.65 MAX. MIN. 4.80 1.37 2.80 0.094 1.35 0.047 0.55 0.014 1.19 0.030 1.05 0.031 1.40 0.039 3.60 0.126 7.00 0.260 10.40 10.40 18.15 0.691 15.95 0.612 21.6 0.831 22.7 0.878 1.29 3.00 0.102 15.80 0.594 6.60 0.236 2.70 0.083 4.80 0.170 4.75 0.167 4.25 0.148 40° (Typ.) 90° (Typ.) 3.85 0.143 inch TYP. 0.134 0.267 0.703 0.620 0.843 0.886 0.178 0.157 MAX. 0.188 0.054 0.11 0.053 0.022 0.047 0.041 0.055 0.142 0.275 0.41 0.409 0.715 0.628 0.850 0.894 0.051 0.118 0.622 0.260 0.106 0.189 0.187 0.187 OUTLINE AND MECHANICAL DATA Weight: 2.00gr Pentawatt V 0.151 L L1 E M1 A M D C D1 L5 V5 L2 H2 L3 F E E1 V4 H3 G G1 Dia. F F1 L9 H2 L4 L10 L7 L6 V4 RESIN BETWEEN LEADS PENTVME 0015981 F In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 16/18 Doc ID 1461 Rev 3 TDA2050 8 Revision history Revision history Table 8. Document revision history Date Revision 31-Aug-2011 3 Changes Removed minimum value from Pentawatt (vertical) package dimension H3 in Figure 23: Pentawatt V package Revised general presentation, minor textual updates Doc ID 1461 Rev 3 17/18 TDA2050 Please Read Carefully: Information in this document is provided solely in connection with ST products. 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