STMICROELECTRONICS VND810SP-E

VND810SP-E
Double channel high-side driver
Features
Type
RDS(on)
Iout
VCC
VND810SP-E
160 mΩ (1)
3.5 A(1)
36 V
10
1. Per each channel.
■
ECOPACK®: lead free and RoHS compliant
■
Automotive Grade: compliance with AEC
guidelines
■
Very low standby current
■
CMOS compatible input
■
On-state open-load detection
■
Off-state open-load detection
■
Thermal shutdown protection and diagnosis
■
Undervoltage shutdown
■
Overvoltage clamp
■
Output stuck to VCC detection
■
Load current limitation
■
Reverse battery protection
■
Electrostatic discharge protection
Table 1.
1
PowerSO-10™
Description
The VND810SP-E is a monolithic device made by
using STMicroelectronics™ VIPower™ M0-3
technology, intended for driving any kind of load
with one side connected to ground.
Active VCC pin voltage clamp protects the device
against low energy spikes (see ISO7637 transient
compatibility table).
Active current limitation combined with thermal
shutdown and automatic restart protects the
device against overload. The device detects
open-load condition both in on-state and
off-state. Output shorted to VCC is detected in the
off-state. Device automatically turns-off in case of
ground pin disconnection.
Order codes
Order code
Package
PowerSO-10™
October 2010
Tube
Tape and reel
VND810SP-E
VND810SPTR-E
Doc ID 10880 Rev 3
1/28
www.st.com
1
Contents
VND810SP-E
Contents
1
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
2.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.1
3.2
GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 17
3.1.1
Solution 1: a resistor in the ground line (RGND only) . . . . . . . . . . . . . . 17
3.1.2
Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . 18
3.1.3
Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.2.1
3.3
4
6
2/28
Maximum demagnetization energy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.1
5
Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
PowerSO-10 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.1
ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.2
PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.3
PowerSO-10 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Doc ID 10880 Rev 3
VND810SP-E
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 7.
Table 8.
Table 6.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Power output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
VCC output diode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Switching (VCC = 13 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Electrical transient requirements on VCC pin (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Electrical transient requirements on VCC pin (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Electrical transient requirements on VCC pin (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Doc ID 10880 Rev 3
3/28
List of figures
VND810SP-E
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
4/28
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Status timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Open-load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Open-load off-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
PowerSO-10 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
PowerSO-10 Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . 21
PowerSO-10 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . 22
Thermal fitting model of a double channel HSD in PowerSO-10 . . . . . . . . . . . . . . . . . . . . 22
PowerSO-10 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
PowerSO-10 suggested pad layout and tube shipment (no suffix). . . . . . . . . . . . . . . . . . . 26
Tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Doc ID 10880 Rev 3
VND810SP-E
1
Block diagram and pin description
Block diagram and pin description
Figure 1.
Block diagram
Vcc
Vcc
CLAMP
OVERVOLTAGE
UNDERVOLTAGE
CLAMP 1
GND
INPUT1
OUTPUT1
DRIVER 1
CLAMP 2
STATUS1
OVERTEMP. 1
CURRENT LIMITER 1
LOGIC
DRIVER 2
OUTPUT2
OPEN-LOAD ON 1
CURRENT LIMITER 2
INPUT2
OPEN-LOAD OFF 1
OPEN-LOAD ON 2
STATUS2
OPEN-LOAD OFF 2
OVERTEMP. 2
Figure 2.
Configuration diagram (top view)
5
4
3
6
7
8
9
10
GROUND
INPUT 1
STATUS 1
STATUS 2
INPUT 2
2
1
OUTPUT 1
OUTPUT 1
N.C.
OUTPUT 2
OUTPUT 2
11
VCC
PowerSO-10
Table 2.
Suggested connections for unused and not connected pins
Connection / pin
Status
N.C.
Output
Input
Floating
X
X
X
X
To ground
X
Doc ID 10880 Rev 3
Through 10 KΩ resistor
5/28
Electrical specifications
2
VND810SP-E
Electrical specifications
Figure 3.
Current and voltage conventions
IS
VF1
IIN1
INPUT 1
ISTAT1
VIN1
VCC
VCC
IOUT1
OUTPUT 1
STATUS 1
VSTAT1
(1)
VOUT1
IIN2
INPUT 2
IOUT2
VIN2 ISTAT2
OUTPUT 2
STATUS 2
VSTAT2
GND
VOUT2
IGND
1) VFn = VCCn - VOUTn during reverse battery condition.
2.1
Absolute maximum ratings
Stressing the device above the rating listed in Table 3 may cause permanent damage to the
device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the operating sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect device
reliability. Refer also to the STMicroelectronics sure program and other relevant quality
document.
Table 3.
Absolute maximum ratings
Symbol
VCC
DC supply voltage
Value
Unit
41
V
- VCC
Reverse DC supply voltage
-0.3
V
- IGND
DC reverse ground pin current
-200
mA
Internally Limited
A
-6
A
IOUT
- IOUT
DC output current
Reverse DC output current
IIN
DC input current
+/- 10
mA
Istat
DC status current
+/- 10
mA
4000
4000
5000
5000
V
V
V
V
VESD
6/28
Parameter
Electrostatic discharge (Human Body Model:
R = 1.5 KΩ; C = 100 pF)
– INPUT
– STATUS
– OUTPUT
– VCC
Doc ID 10880 Rev 3
VND810SP-E
Electrical specifications
Table 3.
Absolute maximum ratings (continued)
Symbol
EMAX
Ptot
Value
Unit
Maximum switching energy
(L = 1.4 mH; RL = 0 Ω; Vbat = 13.5 V;
Tjstart = 150 °C; IL = 5 A)
24
mJ
Power dissipation TC = 25 °C
52
W
Internally Limited
°C
Tj
Junction operating temperature
Tc
Case operating temperature
-40 to 150
°C
Storage temperature
-55 to 150
°C
Tstg
2.2
Parameter
Thermal data
Table 4.
Thermal data
Symbol
Parameter
Value
Unit
2.4
°C/W
Rthj-case Thermal resistance junction-case
Rthj-amb
Thermal resistance junction-ambient
52.4 (1)
37 (2)
°C/W
1. When mounted on a standard single-sided FR-4 board with 0.5 cm2 of Cu (at least 35 μm thick). Horizontal
mounting and no artificial air flow.
2. When mounted on a standard single-sided FR-4 board with 6 cm2 of Cu (at least 35 μm thick). Horizontal
mounting and no artificial air flow
2.3
Electrical characteristics
Values specified in this section are for 8 V < VCC < 36 V; -40 °C < Tj < 150 °C, unless
otherwise stated.
(Per each channel)
)
Table 5.
Power output
Symbol
Parameter
VCC(1)
Test conditions
Operating supply
voltage
VUSD(1) Undervoltage shutdown
VOV(1)
RON
IS(1)
IL(off1)
Overvoltage shutdown
Min.
Typ.
Max.
Unit
5.5
13
36
V
3
4
5.5
V
36
On-state resistance
IOUT = 1 A; Tj = 25 °C
IOUT = 1 A; VCC > 8 V
Supply current
Off-state; VCC = 13 V;
VIN = VOUT = 0 V
Off-state; VCC = 13 V;
VIN = VOUT = 0 V; Tj = 25 °C
On-state; VCC = 13 V; VIN = 5 V;
IOUT = 0 A
Off-state output current
VIN = VOUT = 0 V
Doc ID 10880 Rev 3
0
V
160
320
mΩ
mΩ
12
40
μA
12
5
25
7
μA
mA
50
μA
7/28
Electrical specifications
Table 5.
VND810SP-E
Power output (continued)
Symbol
Parameter
Test conditions
IL(off2)
Off-state output current
VIN = 0 V; VOUT = 3.5 V
IL(off3)
Off-state output current
IL(off4)
Off-state output current
Min.
Typ.
Max.
Unit
0
μA
VIN = VOUT = 0 V; VCC = 13 V;
Tj =125 °C
5
μA
VIN = VOUT = 0 V; VCC = 13 V;
Tj = 25 °C
3
μA
-75
1. Per device.
Table 6.
Protection(1)
Symbol
Parameter
TTSD
Min.
Typ.
Max.
Unit
Shutdown temperature
150
175
200
°C
TR
Reset temperature
135
Thyst
Thermal hysteresis
7
tsdl
Status delay in
overload conditions
Tj>TTSD
Ilim
Current limitation
VCC = 13 V
5.5 V < VCC < 36 V
Turn-off output clamp
voltage
IOUT = 1 A; L = 6 mH
Vdemag
Test conditions
°C
15
°C
20
μs
3.5
5
7.5
7.5
A
A
VCC-41
VCC-48
VCC-55
V
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles
Table 7.
Symbol
VF
Table 8.
Symbol
8/28
VCC output diode
Parameter
Forward on voltage
Test conditions
-IOUT = 0.5 A; Tj = 150 °C
Min
Typ
Max
Unit
-
-
0.6
V
Min
Typ
Max
Unit
Status pin
Parameter
Test conditions
VSTAT
Status low output
voltage
ISTAT = 1.6 mA
0.5
V
ILSTAT
Status leakage
current
Normal operation; VSTAT = 5 V
10
μA
CSTAT
Status pin input
capacitance
Normal operation; VSTAT = 5 V
100
pF
VSCL
Status clamp voltage
ISTAT = 1 mA
ISTAT = -1 mA
8
V
V
Doc ID 10880 Rev 3
6
6.8
-0.7
VND810SP-E
Electrical specifications
Table 9.
Switching (VCC = 13 V)
Symbol
Parameter
Test conditions
Min
Typ
Max
Unit
td(on)
Turn-on delay time
RL = 13 Ω from VIN rising edge
to VOUT = 1.3 V
-
30
-
μs
td(off)
Turn-off delay time
RL = 13 Ω from VIN falling edge
to VOUT = 11.7 V
-
30
-
μs
dVOUT/dt(on)
Turn-on voltage
slope
RL = 13 Ω from VOUT = 1.3 V to
VOUT = 10.4 V
-
See
Table 21
-
V/μs
dVOUT/dt(off)
Turn-off voltage
slope
RL = 13 Ω from VOUT = 11.7 V
to VOUT = 1.3 V
-
See
Table 22
-
V/μs
Table 10.
x
Symbol
Open-load detection
Parameter
Test conditions
IOL
Open-load on-state
detection threshold
VIN = 5V
tDOL(on)
Open-load on-state
detection delay
IOUT = 0 A
VOL
Open-load off-state
voltage detection
threshold
VIN = 0 V
tDOL(off)
Open-load detection
delay at turn-off
Table 11.
Symbol
Min
Typ
Max
Unit
20
40
80
mA
200
μs
3.5
V
1000
μs
Max
Unit
1.25
V
1.5
2.5
Logic input
Parameter
Test conditions
VIL
Input low level
IIL
Low level input current VIN = 1.25 V
VIH
Input high level
IIH
High level input
current
Vhyst
Input hysteresis
voltage
VICL
Input clamp voltage
Min
Typ
1
μA
3.25
V
VIN = 3.25 V
10
0.5
IIN = 1 mA
IIN = -1 mA
Doc ID 10880 Rev 3
6
μA
V
6.8
-0.7
8
V
V
9/28
Electrical specifications
Figure 4.
VND810SP-E
Status timing
OPEN-LOAD STATUS TIMING (with external pull-up)
VOUT> VOL
OVERTEMPERATURE STATUS TIMING
IOUT < IOL
VINn
Tj > TTSD
VINn
VSTAT n
VSTAT n
tSDL
tDOL(off)
Figure 5.
tSDL
tDOL(on)
Switching time waveforms
VOUTn
90%
80%
dVOUT/dt(off)
dVOUT/dt(on)
10%
t
VINn
td(on)
td(off)
t
10/28
Doc ID 10880 Rev 3
VND810SP-E
Electrical specifications
Table 12.
Truth table
Conditions
Input
Output
Status
Normal operation
L
H
L
H
H
H
Current limitation
L
H
H
L
X
X
H
(Tj < TTSD) H
(Tj > TTSD) L
Overtemperature
L
H
L
L
H
L
Undervoltage
L
H
L
L
X
X
Overvoltage
L
H
L
L
H
H
Output voltage > VOL
L
H
H
H
L
H
Output current < IOL
L
H
L
H
H
L
Doc ID 10880 Rev 3
11/28
Electrical specifications
Table 13.
VND810SP-E
Electrical transient requirements on VCC pin (part 1)
Test levels
ISO T/R 7637/1
Test pulse
I
II
III
IV
Delays and
impedance
1
-25 V
-50 V
-75 V
-100 V
2 ms, 10 Ω
2
+25 V
+50 V
+75 V
+100 V
0.2 ms, 10 Ω
3a
-25 V
-50 V
-100 V
-150 V
0.1 μs, 50 Ω
3b
+25 V
+50 V
+75 V
+100 V
0.1 μs, 50 Ω
4
-4 V
-5 V
-6 V
-7 V
100 ms, 0.01 Ω
5
+26.5 V
+46.5 V
+66.5 V
+86.5 V
400 ms, 2 Ω
Table 14.
Electrical transient requirements on VCC pin (part 2)
Test levels
ISO T/R 7637/1
Test pulse
I
II
III
IV
1
C
C
C
C
2
C
C
C
C
3a
C
C
C
C
3b
C
C
C
C
4
C
C
C
C
5
C
E
E
E
Table 15.
Electrical transient requirements on VCC pin (part 3)
Class
12/28
Contents
C
All functions of the device are performed as designed after exposure to
disturbance.
E
One or more functions of the device is not performed as designed after exposure
and cannot be returned to proper operation without replacing the device.
Doc ID 10880 Rev 3
VND810SP-E
Electrical specifications
Figure 6.
Waveforms
NORMAL OPERATION
INPUTn
OUTPUT VOLTAGEn
STATUSn
UNDERVOLTAGE
VCC
VUSDhyst
VUSD
INPUTn
OUTPUT VOLTAGEn
STATUSn
undefined
OVERVOLTAGE
VCC<VOV
VCC>VOV
VCC
INPUTn
OUTPUT VOLTAGEn
STATUSn
OPEN-LOAD with external pull-up
INPUTn
VOUT>VOL
OUTPUT VOLTAGEn
VOL
STATUSn
OPEN-LOAD without external pull-up
INPUTn
OUTPUT VOLTAGEn
STATUSn
Tj
TTSD
TR
OVERTEMPERATURE
INPUTn
OUTPUT CURRENTn
STATUSn
Doc ID 10880 Rev 3
13/28
Electrical specifications
VND810SP-E
2.4
Electrical characteristics curves
Figure 7.
Off-state output current
Figure 8.
IL(off1) (uA)
High level input current
Iih (uA)
1.6
5
1.44
4.5
Off state
Vcc=36V
Vin=Vout=0V
1.28
1.12
Vin=3.25V
4
3.5
0.96
3
0.8
2.5
0.64
2
0.48
1.5
0.32
1
0.16
0.5
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (ºC)
Figure 9.
50
75
100
125
150
175
150
175
150
175
Tc (°C)
Input clamp voltage
Figure 10. Status leakage current
Ilstat (uA)
Vicl (V)
8
0.05
7.8
Iin=1mA
7.6
0.04
7.4
Vstat=5V
0.03
7.2
7
0.02
6.8
6.6
0.01
6.4
6.2
0
6
-50
-25
0
25
50
75
100
125
150
-50
175
-25
0
25
Figure 11.
50
75
100
125
Tc (°C)
Tc (°C)
Status low output voltage
Figure 12. Status clamp voltage
Vstat (V)
Vscl (V)
0.8
8
0.7
7.8
Istat=1.6mA
Istat=1mA
7.6
0.6
7.4
0.5
7.2
0.4
7
0.3
6.8
6.6
0.2
6.4
0.1
6.2
0
6
-50
-25
0
25
50
75
100
125
150
175
-50
Tc (°C)
14/28
-25
0
25
50
75
Tc (°C)
Doc ID 10880 Rev 3
100
125
VND810SP-E
Electrical specifications
Figure 13. On-state resistance vs Tcase
Figure 14. On-state resistance vs VCC
Ron (mOhm)
Ron (mOhm)
400
400
350
350
Iout=1A
Vcc=8V; 13V & 36V
300
Iout=1A
300
250
250
200
200
150
150
100
100
50
50
Tc= 125ºC
Tc= 25ºC
Tc= - 40ºC
0
0
-50
-25
0
25
50
75
100
125
150
5
175
10
15
20
Tc (ºC)
Figure 15. Open-load on-state detection
threshold
25
30
35
40
Vcc (V)
Figure 16. Open-load off-state detection
threshold
Vol (V)
Iol (mA)
60
5
55
4.5
Vcc=13V
Vin=5V
50
Vin=0V
4
3.5
45
40
3
35
2.5
30
2
25
1.5
20
1
15
0.5
0
10
-50
-25
0
25
50
75
100
125
150
-50
175
-25
0
25
50
75
100
125
150
175
Tc (°C)
Tc (°C)
Figure 17. Input high level
Figure 18. Input low level
Vih (V)
Vil (V)
3.6
2.6
3.4
2.4
3.2
2.2
3
2
2.8
1.8
2.6
1.6
2.4
1.4
2.2
1.2
2
-50
-25
0
25
50
75
Tc (°C)
100
125
150
175
1
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
Doc ID 10880 Rev 3
15/28
Electrical specifications
VND810SP-E
Figure 19. Input hysteresis voltage
Figure 20. Overvoltage shutdown
Vhyst (V)
Vov (V)
1.5
50
1.4
48
1.3
46
1.2
44
1.1
42
1
40
0.9
38
0.8
36
0.7
34
0.6
32
0.5
30
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C)
75
100
125
150
175
150
175
Tc (°C)
Figure 21. Turn-on voltage slope
Figure 22. Turn-off voltage slope
dVout/dt(on) (V/ms)
dVout/dt(off) (V/ms)
1000
500
900
450
Vcc=13V
Rl=13Ohm
800
Vcc=13V
Rl=13Ohm
400
700
350
600
300
500
250
400
200
300
150
200
100
100
50
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
Tc (ºC)
Ilim (A)
10
9
Vcc=13V
8
7
6
5
4
3
2
1
0
-50
-25
0
25
50
75
-25
0
25
50
75
Tc (ºC)
Figure 23. ILIM vs Tcase
100
125
150
175
Tc (°C)
16/28
50
Doc ID 10880 Rev 3
100
125
VND810SP-E
3
Application information
Application information
Figure 24. Application schematic
+5V +5V
+5V
VCC
Rprot
STATUS1
Dld
μC
Rprot
INPUT1
OUTPUT1
Rprot
STATUS2
Rprot
INPUT2
OUTPUT2
GND
VGND
3.1
RGND
DGND
GND protection network against reverse battery
This section provides two solutions for implementing a ground protection network against
reverse battery.
3.1.1
Solution 1: a resistor in the ground line (RGND only)
This can be used with any type of load.
The following shows how to dimension the RGND resistor:
1.
RGND ≤ 600 mV / IS(on)max.
2.
RGND ≥ (-VCC) / (-IGND)
where - IGND is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device’s datasheet.
Power dissipation in RGND (when VCC < 0 during reverse battery situations) is:
PD = (-VCC)2/ RGND
This resistor can be shared amongst several different HSD. Please note that the value of this
resistor should be calculated with formula (1) where IS(on)max becomes the sum of the
maximum on-state currents of the different devices.
Please note that, if the microprocessor ground is not common with the device ground, then
the RGND produces a shift (IS(on)max * RGND) in the input thresholds and the status output
values. This shift varies depending on how many devices are ON in the case of several high
side drivers sharing the same RGND.
Doc ID 10880 Rev 3
17/28
Application information
VND810SP-E
If the calculated power dissipation requires the use of a large resistor, or several devices
have to share the same resistor, then ST suggests using Section 3.1.2 described below.
3.1.2
Solution 2: a diode (DGND) in the ground line
A resistor (RGND = 1 kΩ) should be inserted in parallel to DGND if the device is driving an
inductive load. This small signal diode can be safely shared amongst several different HSD.
Also in this case, the presence of the ground network produce a shift (~600 mV) in the input
threshold and the status output values if the microprocessor ground is not common with the
device ground. This shift does not vary if more than one HSD shares the same
diode/resistor network. Series resistor in INPUT and STATUS lines are also required to
prevent that, during battery voltage transient, the current exceeds the absolute maximum
rating. Safest configuration for unused INPUT and STATUS pin is to leave them
unconnected.
3.1.3
Load dump protection
Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds VCC
max DC rating. The same applies if the device is subjected to transients on the VCC line that
are greater than the ones shown in Table 13.
3.2
MCU I/O protection
If a ground protection network is used and negative transients are present on the VCC line,
the control pins is pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent
the microcontroller I/O pins from latching up.
The value of these resistors is a compromise between the leakage current of microcontroller
and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of
microcontroller I/Os:
-VCCpeak / Ilatchup ≤ Rprot ≤ (VOHμC - VIH - VGND) / IIHmax
Example
For the following conditions:
VCCpeak = -100 V
Ilatchup ≥ 20 mA
VOHμC ≥ 4.5 V
5 kΩ ≤ Rprot ≤ 65 kΩ.
The recommended values are:
Rprot = 10 kΩ
3.2.1
Open-load detection in off-state
Off-state open-load detection requires an external pull-up resistor (RPU) connected between
OUTPUT pin and a positive supply voltage (VPU) like the +5 V line used to supply the
microprocessor.
The external resistor has to be selected according to the following requirements:
18/28
Doc ID 10880 Rev 3
VND810SP-E
1.
Application information
No false open-load indication when load is connected: in this case it needs to avoid
VOUT to be higher than VOlmin; this results in the following condition:
VOUT = (VPU/ (RL + RPU))RL < VOlmin.
2.
No misdetection when load is disconnected: in this case the VOUT has to be higher than
VOLmax; this results in the following condition RPU < (VPU – VOLmax)/ IL(off2).
Because Is(OFF) may significantly increase if Vout is pulled high (up to several mA), the
pull-up resistor RPU should be connected to a supply that is switched OFF when the module
is in standby.
The values of VOLmin, VOLmax and IL(off2) are available in Section 2.3.
Figure 25. Open-load detection in off-state
V batt.
V PU
V CC
R PU
IN P U T
D R IV E R
+
LO G IC
I L (o ff2)
OUT
+
S TAT U S
R
V OL
RL
GROUND
Doc ID 10880 Rev 3
19/28
Application information
3.3
VND810SP-E
Maximum demagnetization energy
Figure 26. Maximum turn-off current versus load inductance
I LM AX (A)
10
A
B
C
1
0,01
0,1
1
10
100
L(mH)
A = Single pulse at TJstart = 150 °C
B = Repetitive pulse at TJstart = 100 °C
C = Repetitive pulse at TJstart = 125 °C
Conditions:
VCC = 13.5 V
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
1. Values are generated with RL=0 Ω
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed
the temperature specified above for curves B and C.
20/28
Doc ID 10880 Rev 3
VND810SP-E
Package and PCB thermal data
4
Package and PCB thermal data
4.1
PowerSO-10 thermal data
Figure 27. PowerSO-10 PC board
1. Layout condition of Rth and Zth measurements (PCB FR4 area= 58 mm x 58 mm, PCB
thickness = 2 mm, Cu thickness = 35 μm, Copper areas: from minimum pad lay-out to 8 cm2).
Figure 28. PowerSO-10 Rthj-amb vs PCB copper area in open box free air condition
RTHj_amb (°C/W)
55
Tj-Tamb=50°C
50
45
40
35
30
0
2
4
6
8
10
PCB Cu heatsink area (cm^2)
Doc ID 10880 Rev 3
21/28
Package and PCB thermal data
VND810SP-E
Figure 29. PowerSO-10 thermal impedance junction ambient single pulse
Figure 30. Thermal fitting model of a double channel HSD in PowerSO-10
Tj_1
Pd1
Tj_2
C1
C2
C3
C4
C5
C6
R1
R2
R3
R4
R5
R6
C1
C2
R1
R2
Pd2
T_amb
Equation 1: pulse calculation formula
Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ )
where
22/28
δ = tp ⁄ T
Doc ID 10880 Rev 3
VND810SP-E
Table 16.
Package and PCB thermal data
Thermal parameter
Area/island (cm2)
Footprint
R1 (°C/W)
0.35
R2 (°C/W)
1.8
R3(°C/W)
1.1
R4 (°C/W)
0.8
R5 (°C/W)
12
R6 (°C/W)
37
C1 (W.s/°C)
0.0001
C2 (W.s/°C)
7E-04
C3 (W.s/°C)
0.008
C4 (W.s/°C)
0.3
C5 (W.s/°C)
0.75
C6 (W.s/°C)
3
Doc ID 10880 Rev 3
6
22
5
23/28
Package and packing information
VND810SP-E
5
Package and packing information
5.1
ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
5.2
PowerSO-10 mechanical data
Figure 31. PowerSO-10 package dimensions
B
0.10 A B
10
H
E
E
E2
1
SEATING
PLANE
e
B
DETAIL "A"
A
C
0.25
h
E4
D
= D1 =
=
=
SEATING
PLANE
A
F
A1
A1
L
DETAIL "A"
α
24/28
Doc ID 10880 Rev 3
VND810SP-E
Package and packing information
Table 17.
PowerSO-10 mechanical data
Millimeters
Symbol
Min
Typ
Max
A
3.35
3.65
A(1)
3.4
3.6
A1
0.00
0.10
B
0.40
0.60
B(1)
0.37
0.53
C
0.35
0.55
C(1)
0.23
0.32
D
9.40
9.60
D1
7.40
7.60
E
9.30
9.50
E2
7.20
7.60
E2(1)
7.30
7.50
E4
5.90
6.10
E4(1)
5.90
6.30
e
1.27
F
1.25
1.35
F(1)
1.20
1.40
H
13.80
14.40
H(1)
13.85
14.35
h
0.50
L
1.20
1.80
L(1)
0.80
1.10
a
0°
8°
α(1)
2°
8°
1. Muar only POA P013P
Doc ID 10880 Rev 3
25/28
Package and packing information
5.3
VND810SP-E
PowerSO-10 packing information
Figure 32. PowerSO-10 suggested pad layout and tube shipment (no suffix)
14.6 - 14.9
B
10.8 - 11
C
6.30
A
0.67 - 0.73
1
9.5
2
3
4
5
10
9
8
0.54 - 0.6
7
1.27
6
All dimensions are in mm.
Casablanca
Muar
Base Q.ty Bulk Q.ty Tube length (± 0.5) A
B C (± 0.1)
50
1000
532
10.4 16.4
0.8
50
1000
532
4.9 17.2
0.8
Figure 33. Tape and reel shipment (suffix “TR”)
REEL DIMENSIONS
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
600
600
330
1.5
13
20.2
24.4
60
30.4
All dimensions are in mm.
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
P
D (± 0.1/-0)
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
24
4
24
1.5
1.5
11.5
6.5
2
End
All dimensions are in mm.
Start
Top
cover
tape
No components
Components
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
26/28
No components
Doc ID 10880 Rev 3
500mm min
VND810SP-E
6
Revision history
Revision history
Table 18.
Document revision history
Date
Revision
01-Oct-2004
1
Initial release.
25-May-2010
2
Changed document template. Reformatted entire document.
Changed Features list.
3
Updated following tables:
– Table 6: Protection
– Table 12: Truth table
– Table 17: PowerSO-10 mechanical data
Updated Figure 26: Maximum turn-off current versus load inductance
08-Oct-2010
Changes
Doc ID 10880 Rev 3
27/28
VND810SP-E
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such
third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT
RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING
APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY,
DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE
GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any
liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries.
Information in this document supersedes and replaces all information previously supplied.
The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
© 2010 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
www.st.com
28/28
Doc ID 10880 Rev 3