SN54ALS576B, SN54AS576 SN74ALS576B, SN74ALS577A, SN74AS576 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SDAS065B – DECEMBER 1982 – REVISED JANUARY 1995 • • • • 3-State Buffer-Type Inverting Outputs Drive Bus Lines Directly Bus-Structured Pinout Buffered Control Inputs SN74ALS577A Has Synchronous Clear Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), Standard Plastic (N, NT) and Ceramic (J) 300-mil DIPs, and Ceramic Flat (W) Packages SN54ALS576B, SN54AS576 . . . J OR W PACKAGE SN74ALS576B, SN74AS576 . . . DW OR N PACKAGE (TOP VIEW) OE 1D 2D 3D 4D 5D 6D 7D 8D GND description 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 3D 4D 5D 6D 7D 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 2Q 3Q 4Q 5Q 6Q 8D GND CLK 8Q 7Q The SN54ALS576B and SN54AS576 are characterized for operation over the full military temperature range of – 55°C to 125°C. The SN74ALS576B, SN74ALS577A, and SN74AS576 are characterized for operation from 0°C to 70°C. 2 VCC 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q CLK SN54ALS576B, SN54AS576 . . . FK PACKAGE (TOP VIEW) These flip-flops enter data on the low-to-high transition of the clock (CLK) input. The output-enable (OE) input does not affect internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are disabled. 20 2D 1D OE VCC These octal D-type edge-triggered flip-flops feature 3-state outputs designed specifically for bus driving. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. 1 1Q • SN74ALS577A . . . DW OR NT PACKAGE (TOP VIEW) CLR OE 1D 2D 3D 4D 5D 6D 7D 8D NC GND 1 24 2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14 12 13 VCC NC 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q CLK NC NC – No internal connection Copyright 1995, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54ALS576B, SN54AS576 SN74ALS576B, SN74ALS577A, SN74AS576 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SDAS065B – DECEMBER 1982 – REVISED JANUARY 1995 Function Tables ′ALS576B, ′AS576 (each flip-flop) INPUTS OUTPUT Q OE CLK D L ↑ H L L ↑ L H L L X Q0 H X X Z SN74ALS577A (each flip-flop) INPUTS OE CLR CLK D OUTPUT Q H L L ↑ X L H ↑ H L L H ↑ L H L H L X Q0 H X X X Z logic symbols† ′ALS576B, ′AS576 OE CLK 1D 2D 3D 4D 5D 6D 7D 8D 1 11 2 SN74ALS577A EN OE C1 1D CLK 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q † These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown for the ′ALS576B and ′AS576 are for the DW, J, N, and W packages. 2 POST OFFICE BOX 655303 CLR 1D 2D 3D 4D 5D 6D 7D 8D 2 14 1 3 EN C1 1R 1D 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q Pin numbers shown for the SN74ALS577A are for the DW and NT packages. • DALLAS, TEXAS 75265 SN54ALS576B, SN54AS576 SN74ALS576B, SN74ALS577A, SN74AS576 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SDAS065B – DECEMBER 1982 – REVISED JANUARY 1995 logic diagrams (positive logic) ′ALS576B, ′AS576 SN74ALS577A 1 OE OE 11 CLK CLK C1 2 1D 19 CLR 2 14 1 1Q 1D C1 1D 3 22 1Q 1D To Seven Other Channels To Seven Other Channels Pin numbers shown are for the DW, J, N, and W packages. Pin numbers shown are for the DW and NT packages. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Operating free-air temperature range, TA: SN54ALS576B . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C SN74ALS576B, SN74ALS577A . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions SN74ALS576B SN74ALS577A SN54ALS576B UNIT MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 VCC VIH Supply voltage VIL IOH Low-level input voltage 0.7 0.8 High-level output current –1 – 2.6 mA IOL Low-level output current 24 mA High-level input voltage fclock l k Clock frequency tw Pulse duration tsu Set p time before CLK↑ Setup th Hold time after CLK↑ TA Operating free-air temperature 2 2 12 ′ALS576B 0 22 SN74ALS577A ′ALS576B, CLK high or low 25 Data 15 30 0 30 0 ns 0 – 55 • DALLAS, TEXAS 75265 125 0 MHz ns 15 4 V ns 15 SN74ALS577A CLR POST OFFICE BOX 655303 0 16.5 SN74ALS577A CLR Data V 16.5 SN74ALS577A, CLK high or low V 70 °C 3 SN54ALS576B, SN54AS576 SN74ALS576B, SN74ALS577A, SN74AS576 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SDAS065B – DECEMBER 1982 – REVISED JANUARY 1995 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TYP† MIN VIK VCC = 4.5 V, VCC = 4.5 V to 5.5 V, II = – 18 mA IOH = – 0.4 mA VCC = 4 4.5 5V IOH = – 1 mA IOH = – 2.6 mA VOL VCC = 4 4.5 5V IOL = 12 mA IOL = 24 mA IOZH IOZL VCC = 5.5 V, VCC = 5.5 V, VO = 2.7 V VO = 0.4 V II IIH VCC = 5.5 V, VCC = 5.5 V, VI = 7 V VI = 2.7 V IIL IO‡ VCC = 5.5 V, VCC = 5.5 V, VI = 0.4 V VO = 2.25 V ICC VCC = 5.5 V VOH SN74ALS576B SN74ALS577A SN54ALS576B TEST CONDITIONS MAX MIN TYP† – 1.2 VCC – 2 2.4 UNIT MAX – 1.2 V VCC – 2 V 3.3 2.4 0.25 – 20 3.2 0.4 0.25 0.4 0.35 0.5 V µA 20 20 – 20 – 20 µA 0.1 0.1 mA 20 20 µA – 0.2 – 0.2 mA – 112 mA – 112 – 30 Outputs high 10 18 10 18 Outputs low 15 24 15 24 Outputs disabled 16 30 16 30 mA † All typical values are at VCC = 5 V, TA = 25°C. ‡ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. switching characteristics (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = 500 Ω, R2 = 500 Ω, TA = MIN to MAX§ SN54ALS576B SN74ALS576B SN74ALS577A MIN MAX MIN MAX MIN 30 4 MAX fmax 22 tPLH tPHL CLK 4 24 3 14 30 4 14 An Q Any 4 20 4 14 4 14 tPZH tPZL 4 24 3 18 4 18 OE An Q Any 3 23 4 18 4 18 tPHZ tPLZ OE Any Q 2 14 1 10 2 10 3 29 2 15 3 15 § For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 UNIT MHz ns ns ns SN54ALS576B, SN54AS576 SN74ALS576B, SN74ALS577A, SN74AS576 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SDAS065B – DECEMBER 1982 – REVISED JANUARY 1995 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Operating free-air temperature range, TA: SN54AS576 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C SN74AS576 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions SN54AS576 SN74AS576 MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 UNIT VCC VIH Supply voltage VIL IOH Low-level input voltage 0.8 0.8 V High-level output current – 12 – 15 mA IOL fclock* Low-level output current 32 48 mA 125 MHz High-level input voltage 2 Clock frequency 0 2 100 0 CLK high 5 4 CLK low 4 2 V V tw* Pulse duration tsu* th* Setup time, data before CLK↑ 3 2 ns Hold time, data after CLK↑ 3 2 ns TA Operating free-air temperature – 55 125 0 70 * On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 ns °C 5 SN54ALS576B, SN54AS576 SN74ALS576B, SN74ALS577A, SN74AS576 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SDAS065B – DECEMBER 1982 – REVISED JANUARY 1995 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VCC = 4.5 V, VCC = 4.5 V to 5.5 V, II = – 18 mA IOH = – 2 mA 5V VCC = 4 4.5 IOH = – 12 mA IOH = – 15 mA VOL VCC = 4 4.5 5V IOL = 32 mA IOL = 48 mA IOZH IOZL VCC = 5.5 V, VCC = 5.5 V, VO = 2.7 V VO = 0.4 V II IIH VCC = 5.5 V, VCC = 5.5 V, VI = 7 V VI = 2.7 V VOH IIL D All others IO‡ ICC SN54AS576 TYP† MAX TEST CONDITIONS VCC = 5 5.5 5V V, VI = 0 0.4 4V VCC = 5.5 V, VO = 2.25 V Outputs high VCC = 5.5 V MIN SN74AS576 TYP† MAX MIN – 1.2 VCC – 2 2.4 – 1.2 UNIT V VCC – 2 V 3.2 2.4 0.29 3.3 0.5 0.33 – 30 0.5 V µA 50 50 – 50 – 50 µA 0.1 0.1 mA µA 20 20 –3 –2 – 0.5 – 0.5 – 112 – 30 – 112 77 125 77 125 Outputs low 84 135 84 135 Outputs disabled 84 135 84 135 mA mA mA † All typical values are at VCC = 5 V, TA = 25°C. ‡ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. switching characteristics (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = 500 Ω, R2 = 500 Ω, TA = MIN to MAX§ SN54AS576 SN74AS576 MIN fmax* MAX 100 tPLH tPHL CLK An Q Any tPZH tPZL OE An Q Any tPHZ tPLZ OE Any Q MIN MAX 125 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MHz 3 11 3 8 4 11 4 9 2 7 2 6 3 11 3 10 2 7 2 6 2 7 2 6 * On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested. § For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. 6 UNIT ns ns ns SN54ALS576B, SN54AS576 SN74ALS576B, SN74ALS577A, SN74AS576 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SDAS065B – DECEMBER 1982 – REVISED JANUARY 1995 PARAMETER MEASUREMENT INFORMATION SERIES 54ALS/74ALS AND 54AS/74AS DEVICES 7V RL = R1 = R2 VCC S1 RL R1 Test Point From Output Under Test CL (see Note A) From Output Under Test RL Test Point From Output Under Test CL (see Note A) CL (see Note A) LOAD CIRCUIT FOR BI-STATE TOTEM-POLE OUTPUTS LOAD CIRCUIT FOR OPEN-COLLECTOR OUTPUTS 3.5 V Timing Input Test Point LOAD CIRCUIT FOR 3-STATE OUTPUTS 3.5 V High-Level Pulse 1.3 V R2 1.3 V 1.3 V 0.3 V 0.3 V tsu Data Input tw th 3.5 V 1.3 V 3.5 V Low-Level Pulse 1.3 V 0.3 V 1.3 V 0.3 V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATIONS 3.5 V Output Control (low-level enabling) 1.3 V 1.3 V 0.3 V tPZL Waveform 1 S1 Closed (see Note B) tPLZ [3.5 V 1.3 V tPHZ tPZH Waveform 2 S1 Open (see Note B) 1.3 V VOL 0.3 V VOH 1.3 V 0.3 V [0 V 3.5 V 1.3 V Input 1.3 V 0.3 V tPHL tPLH VOH In-Phase Output 1.3 V 1.3 V VOL tPLH tPHL VOH Out-of-Phase Output (see Note C) 1.3 V 1.3 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. When measuring propagation delay items of 3-state outputs, switch S1 is open. D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%. E. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuits and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 PACKAGE OPTION ADDENDUM www.ti.com 26-Sep-2005 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty Lead/Ball Finish MSL Peak Temp (3) 84001022A ACTIVE LCCC FK 20 1 TBD Call TI Level-NC-NC-NC 8400102RA ACTIVE CDIP J 20 1 TBD Call TI Level-NC-NC-NC 8400102SA ACTIVE CFP W 20 1 TBD Call TI Level-NC-NC-NC SN54ALS576BJ ACTIVE CDIP J 20 1 TBD Call TI Level-NC-NC-NC SN54AS576J ACTIVE CDIP J 20 1 TBD Call TI Level-NC-NC-NC SN74ALS576BDW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS576BDWE4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS576BDWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS576BDWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS576BN ACTIVE PDIP N 20 CU NIPDAU Level-NC-NC-NC 20 Pb-Free (RoHS) TBD Call TI 20 Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC SN74ALS576BN3 OBSOLETE PDIP N 20 SN74ALS576BNE4 ACTIVE PDIP N 20 SN74ALS576BNSR ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS576BNSRE4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS577ADW ACTIVE SOIC DW 24 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS577ADWE4 ACTIVE SOIC DW 24 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS577ADWR ACTIVE SOIC DW 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS577ADWRE4 ACTIVE SOIC DW 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS577ANSR ACTIVE SO NS 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS577ANSRE4 ACTIVE SO NS 24 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS577ANT ACTIVE PDIP NT 24 CU NIPDAU Level-NC-NC-NC 15 Pb-Free (RoHS) Call TI SN74ALS577ANT3 OBSOLETE PDIP NT 24 TBD Call TI SN74ALS577ANTE4 ACTIVE PDIP NT 24 15 Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC SN74AS576DW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS576DWE4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS576DWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS576DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS576N ACTIVE PDIP N 20 CU NIPDAU Level-NC-NC-NC 20 Addendum-Page 1 Pb-Free Call TI PACKAGE OPTION ADDENDUM www.ti.com 26-Sep-2005 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN74AS576NE4 ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC SNJ54ALS576BFK ACTIVE LCCC FK 20 1 TBD Call TI Level-NC-NC-NC SNJ54ALS576BJ ACTIVE CDIP J 20 1 TBD Call TI Level-NC-NC-NC SNJ54ALS576BW ACTIVE CFP W 20 1 TBD Call TI Level-NC-NC-NC SNJ54AS576FK ACTIVE LCCC FK 20 1 TBD Call TI Level-NC-NC-NC SNJ54AS576J ACTIVE CDIP J 20 1 TBD Call TI Level-NC-NC-NC Lead/Ball Finish MSL Peak Temp (3) (RoHS) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 MECHANICAL DATA MLCC006B – OCTOBER 1996 FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER 28 TERMINAL SHOWN 18 17 16 15 14 13 NO. OF TERMINALS ** 12 19 11 20 10 A B MIN MAX MIN MAX 20 0.342 (8,69) 0.358 (9,09) 0.307 (7,80) 0.358 (9,09) 28 0.442 (11,23) 0.458 (11,63) 0.406 (10,31) 0.458 (11,63) 21 9 22 8 44 0.640 (16,26) 0.660 (16,76) 0.495 (12,58) 0.560 (14,22) 23 7 52 0.739 (18,78) 0.761 (19,32) 0.495 (12,58) 0.560 (14,22) 24 6 68 0.938 (23,83) 0.962 (24,43) 0.850 (21,6) 0.858 (21,8) 84 1.141 (28,99) 1.165 (29,59) 1.047 (26,6) 1.063 (27,0) B SQ A SQ 25 5 26 27 28 1 2 3 4 0.080 (2,03) 0.064 (1,63) 0.020 (0,51) 0.010 (0,25) 0.020 (0,51) 0.010 (0,25) 0.055 (1,40) 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.045 (1,14) 0.035 (0,89) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) 4040140 / D 10/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a metal lid. The terminals are gold plated. Falls within JEDEC MS-004 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MPDI004 – OCTOBER 1994 NT (R-PDIP-T**) PLASTIC DUAL-IN-LINE PACKAGE 24 PINS SHOWN PINS ** A 24 28 A MAX 1.260 (32,04) 1.425 (36,20) A MIN 1.230 (31,24) 1.385 (35,18) B MAX 0.310 (7,87) 0.315 (8,00) B MIN 0.290 (7,37) 0.295 (7,49) DIM 24 13 0.280 (7,11) 0.250 (6,35) 1 12 0.070 (1,78) MAX B 0.020 (0,51) MIN 0.200 (5,08) MAX Seating Plane 0.125 (3,18) MIN 0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0°– 15° 0.010 (0,25) M 0.010 (0,25) NOM 4040050 / B 04/95 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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