TLV2401, TLV2402, TLV2404 FAMILY OF 900-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION SLOS244 – FEBRUARY 2000 D D D D D D D D Micro-Power Operation . . . < 1 µA/Channel Input Common-Mode Range Exceeds the Rails . . . –0.1 V to VCC + 5 V Rail-to-Rail Input/Output Gain Bandwidth Product . . . 5.5 kHz Supply Voltage Range . . . 2.5 V to 16 V Specified Temperature Range – TA = 0°C to 70°C . . . Commercial Grade – TA = –40°C to 125°C . . . Industrial Grade Ultra-Small Packaging – 5-Pin SOT-23 (TLV2401) – 8-Pin MSOP (TLV2402) Universal OpAmp EVM TLV2404 D, N, OR PW PACKAGE (TOP VIEW) 1OUT 1IN – 1IN+ VCC 2IN+ 2IN – 2OUT 1 14 2 13 3 12 4 11 5 10 6 9 7 8 4OUT 4IN – 4IN+ GND 3IN+ 3IN – 3OUT SUPPLY CURRENT vs SUPPLY VOLTAGE description 1.4 I CC – Supply Current – µ A/Ch The TLV240x family of single-supply operational amplifiers has the lowest supply current available today at only 900 nA per channel. Added to this is reverse battery protection making the device even more ideal for battery powered systems. And for harsh environments, the inputs can be taken 5 V above the positive supply rail without damage to the device. The low supply current is coupled with extremely low input bias currents enabling them to be used with mega-Ω resistors making them ideal for portable, long active life, applications. DC accuracy is ensured with a low typical offset voltage as low as 390 µV, CMRR of 120 dB and minimum open loop gain of 130 V/mV at 2.7 V. AV = 1 VIN = VCC / 2 TA =25 °C 1.2 1.0 0.8 0.6 0.4 0.2 0 0 2 4 6 8 10 12 14 16 VCC – Supply Voltage – V The maximum recommended supply voltage is as high as 16 V and ensured operation down to 2.5 V, with electrical characteristics specified at 2.7 V, 5 V and 15 V. The 2.5-V operation makes it compatible with Li-Ion battery-powered systems and many micro-power microcontrollers available today including TI’s MSP430. All members are available in PDIP and SOIC with the singles in the small SOT-23 package, duals in the MSOP, and quads in TSSOP. FAMILY PACKAGE TABLE DEVICE NO OF Ch NO. TLV2401† TLV2402† PACKAGE TYPES PDIP SOIC SOT-23 TSSOP MSOP 1 8 2 8 8 5 — — 8 — — 8 UNIVERSAL EVM Refer to the EVM Selection Guide (Lit# SLOU060) TLV2404 4 14 14 — 14 — † This device is in the Product Preview stage of development. Contact your local TI slaes office for more information Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. TI is a trademark of Texas Instruments Incorporated. Copyright 2000, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TLV2401, TLV2402, TLV2404 FAMILY OF 900-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION SLOS244 – FEBRUARY 2000 TLV2401 AVAILABLE OPTIONS TA 0°C to 70°C - 40°C to 125°C VIOmax AT 25°C 1500 µV PACKAGED DEVICES SOT-23† (DBV) SMALL OUTLINE (D) TLV2401CD TLV2401CDBV TLV2401ID TLV2401IDBV PLASTIC DIP (P) TLV2401CP TLV2401IP † This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g., TLV2401CDR). TLV2402 AVAILABLE OPTIONS TA 0°C to 70°C – 40°C to 125°C VIOmax AT 25°C 1500 µV PACKAGED DEVICES † SMALL OUTLINE MSOP (DGK) (D) TLV2402CD TLV2402CDGK TLV2402ID TLV2402IDGK PLASTIC DIP (P) TLV2402CP TLV2402IP † This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g., TLV2402CDR). TLV2404 AVAILABLE OPTIONS PACKAGED DEVICES TA 0°C to 70°C VIOmax AT 25°C 1500 µV SMALL OUTLINE (D) TLV2404CD PLASTIC DIP (N) TLV2404CN TSSOP (PW) TLV2404CPW – 40°C to 125°C TLV2404ID TLV2404IN TLV2404IPW † This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g., TLV2404CDR). 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TLV2401, TLV2402, TLV2404 FAMILY OF 900-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION SLOS244 – FEBRUARY 2000 TLV240x PACKAGE PINOUTS TLV2401 D OR P PACKAGE (TOP VIEW) TLV2401 DBV PACKAGE (TOP VIEW) OUT GND IN+ 1 5 VCC 2 3 4 IN – NC IN – IN + GND 1 8 2 7 3 6 4 5 TLV2402 D, DGK, OR P PACKAGE (TOP VIEW) NC VCC OUT NC 1OUT 1IN – 1IN + GND 1 8 2 7 3 6 4 5 VCC 2OUT 2IN – 2IN+ TLV2404 D, N, OR PW PACKAGE (TOP VIEW) 1OUT 1IN – 1IN+ VCC 2IN+ 2IN – 2OUT 1 14 2 13 3 12 4 11 5 10 6 9 7 8 4OUT 4IN – 4IN+ GND 3IN+ 3IN – 3OUT NC – No internal connection POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 TLV2401, TLV2402, TLV2404 FAMILY OF 900-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION SLOS244 – FEBRUARY 2000 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 V Differential input voltage, VID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 V Input current, II (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±10 mA Output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±10 mA Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range, TA: C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 125°C Maximum junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltage values, except differential voltages, are with respect to GND DISSIPATION RATING TABLE PACKAGE ΘJC (°C/W) ΘJA (°C/W) TA ≤ 25°C POWER RATING D (8) 38.3 176 710 mW D (14) 26.9 122.6 1022 mW DBV (5) 55 324.1 385 mW DGK (8) 54.23 259.96 481 mW N (14) 32 78 1600 mW P (8) 41 104 1200 mW PW (14) 29.3 173.6 720 mW recommended operating conditions Single supply Supply voltage voltage, VCC Split supply Common-mode input voltage range, VICR C-suffix free air temperature, temperature TA Operating free-air 4 I-suffix POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MIN MAX 2.5 16 ±1.25 ±8 –0.1 0 VCC+5 70 – 40 125 UNIT V V °C TLV2401, TLV2402, TLV2404 FAMILY OF 900-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION SLOS244 – FEBRUARY 2000 electrical characteristics at recommended operating conditions, VCC = 2.7, 5 V, and 15 V (unless otherwise noted) dc performance PARAMETER VIO Input offset voltage αVIO Offset voltage draft CMRR Common-mode Common mode rejection ratio TEST CONDITIONS VO = VCC/2 V, VIC = VCC/2 V, RS = 50 Ω TLV240x Large-signal g g differential voltage g amplification MIN 25°C RS = 50 Ω VIC = 0 to VCC, VO( O(pp)) = 4 V,, RL = 500 kΩ VCC = 5 V VCC = 15 V TYP MAX 390 1200 Full range 1500 25°C VCC = 2 2.7 7V AVD TA† 70 Full range 65 25°C 130 Full range 30 25°C 300 Full range 100 25°C 1000 µV µV/°C 3 25°C UNIT 120 dB 400 1000 V/mV 1800 Full range 120 † Full range is 0°C to 70°C for the C suffix and –40°C to 125°C for the I suffix. If not specified, full range is – 40°C to 125°C. input characteristics PARAMETER VICR Common-mode input voltage range TA† MIN VCC = 2.7 V 25°C or Full range – 0.1 to 7.7 V VCC = 5 V 25°C or Full range – 0.1 to 10 V 25°C or Full range – 0.1 to 20 V TEST CONDITIONS Measured over CMRR range, RS = 50 Ω VCC = 15 V 25°C IIO Input offset current TLV240xC VO = VCC/2 V, VIC = VCC/2 V, V RS = 50 Ω IIB Input bias current TLV240xI TLV240xI ri(d) Differential input resistance 25 UNIT 250 pA 400 100 300 350 Full range 25°C MAX 300 Full range 25°C TLV240xC TYP pA 900 300 MΩ Ci(c) Common-mode input capacitance f = 100 kHz 25°C 3 † Full range is 0°C to 70°C for the C suffix and –40°C to 125°C for the I suffix. If not specified, full range is – 40°C to 125°C. pF POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 TLV2401, TLV2402, TLV2404 FAMILY OF 900-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION SLOS244 – FEBRUARY 2000 electrical characteristics at recommended operating conditions, VCC = 2.7, 5 V, and 15 V (unless otherwise noted) (continued) output characteristics PARAMETER TEST CONDITIONS VCC = 2 2.7 7V VIC = VCC/2,, IOH = –2 µA VCC = 5 V VCC = 15 V VOH High level output voltage High-level VCC = 2 2.7 7V VIC = VCC/2,, IOH = –50 µA VCC = 5 V VCC = 15 V /2 IOL = 2 µA VIC = VCC/2, VOL Low level output voltage Low-level VIC = VCC/2, /2 IOL = 50 µA TA† 25°C MIN TYP 2.65 2.68 Full range 2.63 25°C 4.95 Full range 4.93 25°C 14.95 Full range 14.93 25°C 2.62 Full range 2.6 25°C 4.92 Full range 4.9 25°C 14.92 Full range 14.9 25°C MAX 4.98 14.98 V 2.65 4.95 14.95 90 Full range 150 180 25°C UNIT 180 Full range 230 mV 260 IO Output current VO = 0.5 V from rail 25°C ±200 Zo Closed-loop output impedance f = 100 Hz, AV = 10 25°C 1200 † Full range is 0°C to 70°C for the C suffix and –40°C to 125°C for the I suffix. If not specified, full range is – 40°C to 125°C. µA Ω power supply PARAMETER TEST CONDITIONS VCC = 2.7 2 7 V or 5 V ICC Supply current (per channel) VO = VCC/2 VCC = 15 V PSRR Power supply y rejection j ratio (∆VCC/∆VIO) VCC = 2.7 to 5 V,, VIC = VCC/2 V No load,, VCC = 5 to 15 V, VIC = VCC/2 V No load, TA† 25°C MIN TYP MAX 880 950 Full range 1290 25°C 900 Full range 990 UNIT nA 1350 25°C 100 Full range 100 25°C 100 120 dB 120 Full range 100 † Full range is 0°C to 70°C for the C suffix and –40°C to 125°C for the I suffix. If not specified, full range is – 40°C to 125°C. dynamic performance PARAMETER UGBW Unity gain bandwidth RL = 500 kΩ, SR Slew rate at unity gain VO(pp) = 0.8 V, φM Phase margin Gain margin ts Settling time CL = 100 pF TA† 25°C CL = 100 pF 25°C TEST CONDITIONS RL = 500 kΩ kΩ, RL = 500 kΩ, CL = 100 pF VCC = 2.7 or 5 V, V(STEP)PP = 1 V, CL = 100 pF, AV = –1, RL = 100 kΩ VCC = 15 V, V(STEP)PP = 1 V V, CL = 100 pF F, AV = –1, RL = 100 kΩ 25°C 0.1% MIN TYP POST OFFICE BOX 655303 2.5 V/ms 60 15 dB 1.84 25°C ms 0.1% 6.1 0.01% 32 • DALLAS, TEXAS 75265 UNIT kHz † Full range is 0°C to 70°C for the C suffix and –40°C to 125°C for the I suffix. If not specified, full range is – 40°C to 125°C. 6 MAX 5.5 TLV2401, TLV2402, TLV2404 FAMILY OF 900-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION SLOS244 – FEBRUARY 2000 electrical characteristics at recommended operating conditions, VCC = 2.7, 5 V, and 15 V (unless otherwise noted) (continued) noise/distortion performance PARAMETER Vn TEST CONDITIONS TA† MIN f = 10 Hz Equivalent input noise voltage TYP 800 25°C f = 100 Hz 500 In Equivalent input noise current f = 100 Hz 8 † Full range is 0°C to 70°C for the C suffix and –40°C to 125°C for the I suffix. If not specified, full range is – 40°C to 125°C. MAX UNIT nV/√Hz fA/√Hz TYPICAL CHARACTERISTICS Table of Graphs FIGURE VIO IIB Input Offset Voltage Input Bias Current vs Common-mode input voltage 1, 2, 3 vs Free-air temperature 4, 6, 8 vs Common-mode input voltage 5, 7, 9 vs Free-air temperature 4, 6, 8 vs Common-mode input voltage 5, 7, 9 IIO Input Offset Current CMRR Common-mode rejection ratio vs Frequency VOH VOL High-level output voltage vs High-level output current 11, 13, 15 Low-level output voltage vs Low-level output current 12, 14, 16 VO(PP) Zo Output voltage peak-to-peak vs Frequency 17 Output impedance vs Frequency 18 ICC PSRR Supply current vs Supply voltage 19 Power supply rejection ratio vs Frequency 20 AVD Differential voltage gain vs Frequency 21 Phase vs Frequency 21 Gain-bandwidth product vs Supply voltage 22 SR Slew rate vs Free-air temperature 23 φm Phase margin vs Load capacitance 24 Gain margin vs Load capacitance 25 10 Large-signal voltage follower 26, 27, 28 Small-signal voltage follower 29 Large-signal inverted pulse response 30, 31, 32 Small-signal inverted pulse response Crosstalk 33 vs Frequency POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 34 7 TLV2401, TLV2402, TLV2404 FAMILY OF 900-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION SLOS244 – FEBRUARY 2000 TYPICAL CHARACTERISTICS INPUT OFFSET VOLTAGE vs COMMON-MODE INPUT VOLTAGE INPUT OFFSET VOLTAGE vs COMMON-MODE INPUT VOLTAGE 800 600 400 200 0 –200 –0.2 0.2 0.6 1.0 1.4 1.8 2.2 0 –100 –200 –300 VCC = 5 V TA = 25 °C –400 –0.2 0.4 1.0 1.6 2.2 2.8 3.4 4.0 4.6 5.2 2.6 2.9 Figure 1 200 100 IIO 0 IIB –100 –200 –40 –25 –10 5 I IB / I IO – Input Bias / Offset Current – pA 20 35 50 65 80 95 110 125 350 300 IIO 0 –50 IIB –100 –150 –0.2 0.4 1.0 1.6 2.2 2.8 3.4 4.0 4.6 5.2 VICR – Common Mode Input Voltage – V Figure 7 8 4.2 200 150 100 50 IIO 0 –50 IIB –100 –150 –0.2 0.2 8.6 10.8 13.0 15.2 0.6 1.0 1.4 1.8 2.2 2.6 2.9 400 300 200 100 IIO 0 IIB –100 –200 –40 –25 –10 5 20 35 50 65 80 95 110 125 TA – Free-Air Temperature – °C Figure 6 Figure 5 INPUT BIAS / OFFSET CURRENT vs COMMON-MODE INPUT VOLTAGE INPUT BIAS / OFFSET CURRENT vs FREE-AIR TEMPERATURE 600 6.4 VCC = 5 V VIC = 2.5 V 500 VICR – Common Mode Input Voltage – V I IB / I IO – Input Bias / Offset Current – pA I IB / I IO – Input Bias / Offset Current – pA 50 2.0 INPUT BIAS / OFFSET CURRENT vs FREE-AIR TEMPERATURE 700 100 –300 600 VCC = 2.7 V TA = 25 °C Figure 4 150 –200 Figure 3 250 INPUT BIAS / OFFSET CURRENT vs COMMON-MODE INPUT VOLTAGE VCC = 5 V TA = 25 °C –100 VICR – Common-Mode Input Voltage –V 400 TA – Free-Air Temperature – °C 200 0 –400 –0.2 250 VCC = 15 V VIC = 7.5 V 500 400 300 200 100 IIO 0 –100 –200 –40 –25 –10 5 IIB 20 35 50 65 80 95 110 125 TA – Free-Air Temperature – °C Figure 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 I IB / I IO – Input Bias / Offset Current – pA I IB / I IO – Input Bias / Offset Current – pA 300 100 INPUT BIAS / OFFSET CURRENT vs COMMON MODE INPUT VOLTAGE 600 400 200 Figure 2 INPUT BIAS / OFFSET CURRENT vs FREE-AIR TEMPERATURE 500 VCC =15 V TA = 25 °C 300 VICR – Common-Mode Input Voltage – V VICR – Common-Mode Input Voltage – V VCC = 2.7 V VIC = 1.35 V V IO – Input Offset Voltage – µV 1000 I IB / I IO – Input Bias / Offset Current – pA VCC = 2.7 V TA = 25°C V IO – Input Offset Voltage – µV V IO – Input Offset Voltage – µV 400 100 1400 1200 INPUT OFFSET VOLTAGE vs COMMON-MODE INPUT VOLTAGE VCC =15 V TA = 25 °C 200 150 100 50 IIO 0 –50 IIB –100 –150 –0.2 2.0 4.2 6.4 8.6 10.8 13.0 15.2 VICR – Common-Mode Input Voltage –V Figure 9 TLV2401, TLV2402, TLV2404 FAMILY OF 900-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION SLOS244 – FEBRUARY 2000 TYPICAL CHARACTERISTICS HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT 1.50 100 RF=100 kΩ RI=1 kΩ 80 60 40 20 VCC = 2.7 V 2.4 TA = –40°C 2.1 TA = –0°C TA = 25 °C TA = 70 °C TA = 125 °C 1.8 1.5 1.2 0 10 100 1k f – Frequency – Hz 50 100 150 3.5 150 1.25 TA = 0 °C TA = –40°C 1.00 0.75 TA = 25 °C TA = 70 °C TA = 125 °C 0.50 0.25 HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT 0 Figure 13 0.25 0 100 150 IOL – Low-Level Output Current – µA Figure 16 50 100 150 TA = –40°C VCC = 15 V 0 200 50 200 200 OUTPUT IMPEDANCE vs FREQUENCY 10k 14 VCC = 15 V 12 10 8 6 RL = 100 kΩ CL = 100 pF TA = 25°C VCC = 5 V 2 VCC = 2.7 V AV=10 1k AV=1 100 0 VCC=2.7, 5, 15 V TA=25°C –2 10 150 Figure 15 16 4 100 IOH – High-Level Output Current – µA Z o – Output Impedance – Ω TA = –0°C TA = 25 °C TA = 70 °C TA = 125 °C 50 13.5 OUTPUT VOLTAGE PEAK-TO-PEAK vs FREQUENCY V O(PP) – Output voltage Peak–to–Peak – V TA = –40°C 0 TA = –0°C TA = 25 °C TA = 70 °C TA = 125 °C 14.0 Figure 14 LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 0.50 14.5 IOL – Low-Level Output Current – µA 1.25 200 13 200 VCC = 15 V 150 15.0 IOH – High-Level Output Current – µA 1.50 100 Figure 12 0 0.75 50 IOL – Low-Level Output Current – µA VCC = 5 V 3.0 1.00 0.25 0 V OH – High-Level Output Voltage – V TA = –0°C TA = 25 °C TA = 70 °C TA = 125 °C 100 TA = 70 °C TA = 125 °C 0.50 LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT VOL – Low-Level Output Voltage – V TA = –40°C 4.5 50 0.75 200 1.50 0 1.00 Figure 11 5.0 4.0 TA =25 °C TA = 0 °C TA = –40°C 1.25 IOH – High-Level Output Current – µA HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT VCC = 5 V VCC = 2.7 V 0 0 10k Figure 10 V OH – High-Level Output Voltage – V VOL – Low-Level Output Voltage – V VCC=2.7, 5, 15 V 1 VOL – Low-Level Output Voltage – V LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 2.7 120 V OH – High-Level Output Voltage – V CMRR – Common-Mode Rejection Ratio – dB COMMON-MODE REJECTION RATIO vs FREQUENCY 100 f – Frequency – Hz 1k Figure 17 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 10 100 1k f – Frequency – Hz 10k Figure 18 9 TLV2401, TLV2402, TLV2404 FAMILY OF 900-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION SLOS244 – FEBRUARY 2000 TYPICAL CHARACTERISTICS SUPPLY CURRENT vs SUPPLY VOLTAGE POWER SUPPLY REJECTION RATIO vs FREQUENCY PSRR – Power Supply Rejection Ratio – dB I CC – Supply Current – µ A/Ch 1.4 1.2 1.0 0.8 0.6 TA = 125°C TA = 70 °C TA =25 °C TA = 0 °C TA = –40°C 0.4 0.2 AV = 1 VIN = VCC / 2 0 0 2 4 6 8 10 12 14 16 VCC = 2.7, 5, & 15 V TA = 25°C 110 100 90 80 70 60 50 40 VCC – Supply Voltage – V 100 1k f – Frequency – Hz Figure 19 Figure 20 DIFFERENTIAL VOLTAGE GAIN AND PHASE vs FREQUENCY GAIN BANDWIDTH PRODUCT vs SUPPLY VOLTAGE 10 90 30 45 20 10 0 0 VCC=2.7, 5, 15 V RL=500 kΩ CL=100 pF TA=25°C –10 100 1k f – Frequency – Hz 4 3 2 1 VCC – Supply Voltage –V Figure 22 SLEW RATE vs FREE-AIR TEMPERATURE PHASE MARGIN vs CAPACITIVE LOAD 80 3.0 70 SR+ VCC = 5, 15 V 60 VCC = 2.7 V 2.0 1.5 SR– 1.0 VCC = 2.7, 5, 15 V Phase Margin – ° SR – Slew Rate – V/ ms 5 TA = 25°C RL = 100 kΩ CL = 100 pF f = 1kHz Figure 21 3.5 2.5 6 0 2.5 4.0 5.5 7.0 8.5 10.0 11.5 13.0 14.5 16.0 –45 10k –20 10 GBWP –Gain Bandwidth Product – kHz 50 40 10k 7 135 Phase – ° AVD – Differential Voltage Gain – dB 60 50 40 30 20 0.5 10 0 –40 –25 –10 5 10 120 VCC = 2.7, 5, & 15 V RL= 500 kΩ TA = 25°C 0 20 35 50 65 80 95 110 125 TA – Free-Air Temperature – °C 100 1k CL – Capacitive Load – pF Figure 23 Figure 24 POST OFFICE BOX 655303 10 • DALLAS, TEXAS 75265 10k TLV2401, TLV2402, TLV2404 FAMILY OF 900-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION SLOS244 – FEBRUARY 2000 TYPICAL CHARACTERISTICS GAIN MARGIN vs CAPACITIVE LOAD LARGE SIGNAL FOLLOWER PULSE RESPONSE 10 VCC = 2.7, 5 V 5 0 3 0 2 1 VO –1 0 –1 100 1k CL – Capacitive Load – pF –1 10k 0 1 2 3 4 5 Figure 25 Figure 26 LARGE SIGNAL FOLLOWER PULSE RESPONSE LARGE SIGNAL FOLLOWER PULSE RESPONSE 4 VCC = 5 V AV = 1 RL = 100 kΩ CL = 100 pF TA = 25°C 0 3 –1 25 VIN IN VO V 1 VCC = 15 V AV = 1 RL = 100 kΩ CL = 100 pF TA = 25°C 20 10 5 15 0 –5 10 VO 5 V 1 4 2 15 2 V – Output Voltage – V O 5 3 – Input Voltage – V VIN 6 30 IN 8 7 6 t – Time – ms – Input Voltage – V 10 0 0 –1 –5 0 1 2 3 4 5 6 –2 6 8 10 Figure 28 2.0 150 1.5 80 VO 16 VCC = 2.7, 5, & 15 V AV = 1 RL = 100 kΩ CL = 100 pF TA = 25°C 40 20 –150 3 VIN 1 VCC = 2.7 V AV = –1 RL = 100 kΩ CL = 100 pF TA = 25°C 0.5 0.0 –0.5 0 –1 –1.0 VO –1.5 0 2 1.0 IN 100 14 V 0 V – Output Voltage – V O 300 V IN – Input Voltage – mV VIN 120 12 LARGE SIGNAL INVERTING PULSE RESPONSE 140 –20 –50 0 4 Figure 27 180 60 2 t – Time – ms SMALL SIGNAL FOLLOWER PULSE RESPONSE 160 0 t – Time – ms – Input Voltage – V –1 V – Output Voltage – mV O VCC = 2.7 V AV = 1 RL = 100 kΩ CL = 100 pF TA = 25°C V V – Output Voltage – V O Gain Margin – dB VCC = 15 V 15 1 VIN – Input Voltage – V 4 20 IN RL= 500 kΩ TA = 25°C V – Output Voltage – V O 2 5 25 –2 50 100 150 200 250 300 350 400 450 500 –1 t – Time – µs 0 1 2 3 4 5 6 7 t – Time – ms Figure 29 Figure 30 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 TLV2401, TLV2402, TLV2404 FAMILY OF 900-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION SLOS244 – FEBRUARY 2000 TYPICAL CHARACTERISTICS LARGE SIGNAL INVERTING PULSE RESPONSE 12 3 10 2 8 1 6 0 VCC = 5 V AV = –1 RL = 100 kΩ CL = 100 pF TA = 25°C 0.0 –0.5 –1.0 IN –1.5 –1 V –2.0 –2.5 4 –3.0 0 –2 –4 –6 VO –12 –1 0 1 2 3 4 5 6 7 –5 20 200 0 100 –20 –100 30 35 IN –60 VCC = 2.7, 5, & 15 V All Channels RL = 100 kΩ CL = 100 pF VIN = 1 VPP VCC = 15 V –80 –100 VCC = 2.7, 5 V V VO –40 Crosstalk –dB 0 – Input Voltage – mV VCC = 2.7, 5, & 15 V AV = –1 RL = 100 kΩ CL = 100 pF TA = 25°C 25 CROSSTALK vs FREQUENCY –50 –100 –150 –200 15 Figure 32 150 0 10 Figure 31 VIN 50 5 t – Time – ms 200 100 0 t – Time – ms SMALL SIGNAL INVERTING PULSE RESPONSE VO – Output Voltage – mV –3 –10 –3.5 12 0 VCC = 15 V AV = –1 RL = 100 kΩ CL = 100 pF TA = 25°C 2 –8 VO 6 3 IN 0.5 9 VIN V 1.0 – Input Voltage – V VIN 12 –120 –140 0 200 400 600 800 1000 1200 t – Time – ms 100 1k f – Frequency –Hz Figure 33 Figure 34 POST OFFICE BOX 655303 – Input Voltage – V 4 2.0 V – Output Voltage – V O 2.5 1.5 V – Output Voltage – V O LARGE SIGNAL INVERTING PULSE RESPONSE 10 • DALLAS, TEXAS 75265 10k TLV2401, TLV2402, TLV2404 FAMILY OF 900-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION SLOS244 – FEBRUARY 2000 APPLICATION INFORMATION offset voltage The output offset voltage, (VOO) is the sum of the input offset voltage (VIO) and both input bias currents (IIB) times the corresponding gains. The following schematic and formula can be used to calculate the output offset voltage: RF IIB– RG + – VI VO + RS ǒ ǒ ǓǓ ǒ ǒ ǓǓ IIB+ V OO + VIO 1 ) R R F G " IIB) RS 1 ) R R F G " IIB– RF Figure 35. Output Offset Voltage Model general configurations When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is often required. The simplest way to accomplish this is to place an RC filter at the noninverting terminal of the amplifier (see Figure 36). RG RF – VI VO + R1 V O V I C1 ǒ Ǔǒ + 1 ) RRF G 1 f –3dB Ǔ 1 + 2pR1C1 ) sR1C1 1 Figure 36. Single-Pole Low-Pass Filter If even more attenuation is needed, a multiple pole filter is required. The Sallen-Key filter can be used for this task. For best results, the amplifier should have a bandwidth that is 8 to 10 times the filter frequency bandwidth. Failure to do this can result in phase shift of the amplifier. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 13 TLV2401, TLV2402, TLV2404 FAMILY OF 900-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION SLOS244 – FEBRUARY 2000 APPLICATION INFORMATION general configurations (continued) C1 + _ VI R1 R1 = R2 = R C1 = C2 = C Q = Peaking Factor (Butterworth Q = 0.707) R2 f C2 RG RF –3dB RG = + 2p1RC ( RF 1 2– Q ) Figure 37. 2-Pole Low-Pass Sallen-Key Filter circuit layout considerations To achieve the levels of high performance of the TLV240x, follow proper printed-circuit board design techniques. A general set of guidelines is given in the following. D D D D D 14 Ground planes – It is highly recommended that a ground plane be used on the board to provide all components with a low inductive ground connection. However, in the areas of the amplifier inputs and output, the ground plane can be removed to minimize the stray capacitance. Proper power supply decoupling – Use a 6.8-µF tantalum capacitor in parallel with a 0.1-µF ceramic capacitor on each supply terminal. It may be possible to share the tantalum among several amplifiers depending on the application, but a 0.1-µF ceramic capacitor should always be used on the supply terminal of every amplifier. In addition, the 0.1-µF capacitor should be placed as close as possible to the supply terminal. As this distance increases, the inductance in the connecting trace makes the capacitor less effective. The designer should strive for distances of less than 0.1 inches between the device power terminals and the ceramic capacitors. Sockets – Sockets can be used but are not recommended. The additional lead inductance in the socket pins will often lead to stability problems. Surface-mount packages soldered directly to the printed-circuit board is the best implementation. Short trace runs/compact part placements – Optimum high performance is achieved when stray series inductance has been minimized. To realize this, the circuit layout should be made as compact as possible, thereby minimizing the length of all trace runs. Particular attention should be paid to the inverting input of the amplifier. Its length should be kept as short as possible. This will help to minimize stray capacitance at the input of the amplifier. Surface-mount passive components – Using surface-mount passive components is recommended for high performance amplifier circuits for several reasons. First, because of the extremely low lead inductance of surface-mount components, the problem with stray series inductance is greatly reduced. Second, the small size of surface-mount components naturally leads to a more compact layout thereby minimizing both stray inductance and capacitance. If leaded components are used, it is recommended that the lead lengths be kept as short as possible. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TLV2401, TLV2402, TLV2404 FAMILY OF 900-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION SLOS244 – FEBRUARY 2000 APPLICATION INFORMATION general power dissipation considerations ǒ Ǔ For a given θJA, the maximum power dissipation is shown in Figure 38 and is calculated by the following formula: P T –T MAX A q JA PD = Maximum power dissipation of THS240x IC (watts) TMAX = Absolute maximum junction temperature (150°C) TA = Free-ambient air temperature (°C) θJA = θJC + θCA θJC = Thermal coefficient from junction to case θCA = Thermal coefficient from case to ambient air (°C/W) MAXIMUM POWER DISSIPATION vs FREE-AIR TEMPERATURE 2 1.75 Maximum Power Dissipation – W Where: + D PDIP Package Low-K Test PCB θJA = 104°C/W 1.5 1.25 SOIC Package Low-K Test PCB θJA = 176°C/W TJ = 150°C MSOP Package Low-K Test PCB θJA = 260°C/W 1 0.75 0.5 0.25 SOT-23 Package Low-K Test PCB θJA = 324°C/W 0 –55 –40 –25 –10 5 20 35 50 65 80 95 110 125 TA – Free-Air Temperature – °C NOTE A: Results are with no air flow and using JEDEC Standard Low-K test PCB. Figure 38. Maximum Power Dissipation vs Free-Air Temperature POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 15 TLV2401, TLV2402, TLV2404 FAMILY OF 900-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION SLOS244 – FEBRUARY 2000 APPLICATION INFORMATION macromodel information Macromodel information provided was derived using Microsim Parts Release 8, the model generation software used with Microsim PSpice . The Boyle macromodel (see Note 2) and subcircuit in Figure 39 are generated using the TLV240x typical electrical and operating characteristics at TA = 25°C. Using this information, output simulations of the following key parameters can be generated to a tolerance of 20% (in most cases): D D D D D D D D D D D D Maximum positive output voltage swing Maximum negative output voltage swing Slew rate Quiescent power dissipation Input bias current Open-loop voltage amplification Unity-gain frequency Common-mode rejection ratio Phase margin DC output resistance AC output resistance Short-circuit output current limit NOTE 2: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers”, IEEE Journal of Solid-State Circuits, SC-9, 353 (1974). 3 99 VCC+ + egnd ree ro2 cee fb rp rc1 rc2 – c1 7 11 12 + 1 c2 vlim IN+ r2 + 9 6 – vc 2 8 + q1 q2 IN– – vb ga – ro1 gcm ioff 53 dp 13 14 re1 VOUT re2 91 10 iee VCC– 4 dc – dlp 90 + + vlp + 54 – – vln + de .subckt 240X_5V–X 1 2 3 4 5 * c1 11 12 9.8944E–12 c2 6 7 30.000E–12 cee 10 99 8.8738E–12 dc 5 53 dy de 54 5 dy dlp 90 91 dx dln 92 90 dx dp 4 3 dx egnd 99 0 poly(2) (3,0) (4,0) 0 .5 .5 fb 7 99 poly(5) vb vc ve vlp vln 0 61.404E6 –1E3 1E3 61E6 –61E6 ga 6 0 11 12 1.0216E–6 gcm 0 6 10 99 10.216E–12 iee 10 4 dc 54.540E–9 ioff 0 6 dc 5e–12 hlim 90 0 vlim 1K q1 11 2 13 qx1 q2 12 1 14 qx2 r2 6 9 100.00E3 rc1 rc2 re1 re2 ree ro1 ro2 rp vb vc ve vlim vlp vln .model .model .model .model .ends 3 3 13 14 10 8 7 3 9 3 54 7 91 0 dx dy qx1 qx2 Figure 39. Boyle Macromodels and Subcircuit PSpice and Parts are trademarks of MicroSim Corporation. 16 5 92 hlim – ve dln POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 978.81E3 12 978.81E3 10 30.364E3 10 30.364E3 99 3.6670E9 5 10 99 10 4 1.4183E6 0 dc 0 53 dc .88315 4 dc .88315 8 dc 0 0 dc 540 92 dc 540 D(Is=800.00E–18) D(Is=800.00E–18 Rs=1m Cjo=10p) NPN(Is=800.00E–18 Bf=27.270E21) NPN(Is=800.0000E–18 Bf=27.270E21) TLV2401, TLV2402, TLV2404 FAMILY OF 900-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION SLOS244 – FEBRUARY 2000 MECHANICAL DATA D (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PIN SHOWN 0.050 (1,27) 0.020 (0,51) 0.014 (0,35) 14 0.010 (0,25) M 8 0.008 (0,20) NOM 0.244 (6,20) 0.228 (5,80) 0.157 (4,00) 0.150 (3,81) Gage Plane 0.010 (0,25) 1 7 0°– 8° A 0.044 (1,12) 0.016 (0,40) Seating Plane 0.069 (1,75) MAX 0.010 (0,25) 0.004 (0,10) PINS ** 0.004 (0,10) 8 14 16 A MAX 0.197 (5,00) 0.344 (8,75) 0.394 (10,00) A MIN 0.189 (4,80) 0.337 (8,55) 0.386 (9,80) DIM 4040047 / D 10/96 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15). POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 17 TLV2401, TLV2402, TLV2404 FAMILY OF 900-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION SLOS244 – FEBRUARY 2000 MECHANICAL INFORMATION DBV (R-PDSO-G5) PLASTIC SMALL-OUTLINE PACKAGE 0,40 0,20 0,95 5 0,25 M 4 1,80 1,50 1 0,15 NOM 3,00 2,50 3 Gage Plane 3,10 2,70 0,25 0°– 8° 0,55 0,35 Seating Plane 1,30 1,00 0,10 0,05 MIN 4073253-4/B 10/97 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions include mold flash or protrusion. 18 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TLV2401, TLV2402, TLV2404 FAMILY OF 900-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION SLOS244 – FEBRUARY 2000 MECHANICAL INFORMATION DGK (R-PDSO-G8) PLASTIC SMALL-OUTLINE PACKAGE 0,38 0,25 0,65 8 0,25 M 5 0,15 NOM 3,05 2,95 4,98 4,78 Gage Plane 0,25 1 0°– 6° 4 3,05 2,95 0,69 0,41 Seating Plane 1,07 MAX 0,15 0,05 0,10 4073329/B 04/98 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion. Falls within JEDEC MO-187 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 19 TLV2401, TLV2402, TLV2404 FAMILY OF 900-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION SLOS244 – FEBRUARY 2000 MECHANICAL INFORMATION N (R-PDIP-T**) PLASTIC DUAL-IN-LINE PACKAGE 16 PIN SHOWN PINS ** 14 16 18 20 A MAX 0.775 (19,69) 0.775 (19,69) 0.920 (23.37) 0.975 (24,77) A MIN 0.745 (18,92) 0.745 (18,92) 0.850 (21.59) 0.940 (23,88) DIM A 16 9 0.260 (6,60) 0.240 (6,10) 1 8 0.070 (1,78) MAX 0.035 (0,89) MAX 0.310 (7,87) 0.290 (7,37) 0.020 (0,51) MIN 0.200 (5,08) MAX Seating Plane 0.125 (3,18) MIN 0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0.010 (0,25) M 0°– 15° 0.010 (0,25) NOM 14/18 PIN ONLY 4040049/C 08/95 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001 (20 pin package is shorter then MS-001.) 20 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TLV2401, TLV2402, TLV2404 FAMILY OF 900-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION SLOS244 – FEBRUARY 2000 MECHANICAL INFORMATION P (R-PDIP-T8) PLASTIC DUAL-IN-LINE PACKAGE 0.400 (10,60) 0.355 (9,02) 8 5 0.260 (6,60) 0.240 (6,10) 1 4 0.070 (1,78) MAX 0.310 (7,87) 0.290 (7,37) 0.020 (0,51) MIN 0.200 (5,08) MAX Seating Plane 0.125 (3,18) MIN 0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0°– 15° 0.010 (0,25) M 0.010 (0,25) NOM 4040082 / B 03/95 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 21 TLV2401, TLV2402, TLV2404 FAMILY OF 900-nA/Ch RAIL-TO-RAIL INPUT/OUTPUT OPERATIONAL AMPLIFIERS WITH REVERSE BATTERY PROTECTION SLOS244 – FEBRUARY 2000 MECHANICAL INFORMATION PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PINS SHOWN 0,30 0,19 0,65 14 0,10 M 8 0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 7 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 8 14 16 20 24 28 A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 DIM 4040064/F 01/97 NOTES: A. B. C. D. 22 All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. 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