LINER LT8610

LTC3621/LTC3621-2
17V, 1A Synchronous
Step-Down Regulator with
3.5µA Quiescent Current
Features
n
n
n
n
n
n
n
n
n
n
n
n
n
Description
Wide VIN Range: 2.7V to 17V
Wide VOUT Range: 0.6V to VIN
95% Max Efficiency
Low IQ < 3.5µA, Zero-Current Shutdown
Constant Frequency (1MHz/2.25MHz)
Full Dropout Operation with Low IQ
1A Rated Output Current
±1% Output Voltage Accuracy
Current Mode Operation for Excellent Line and Load
Transient Response
Pulse-Skipping, Forced Continuous, Burst Mode®
Operation
Internal Compensation and Soft-Start
Overtemperature Protection
Compact 6-Lead DFN (2mm × 3mm) Package or
8-Lead MSOPE Package with Power Good Output
and Independent SGND Pin
Applications
The LTC®3621/LTC3621-2 is a high efficiency 17V, 1A
synchronous monolithic step-down regulator. The switching frequency is fixed to 1MHz or 2.25MHz. The regulator
features ultralow quiescent current and high efficiencies
over a wide VOUT range.
The step-down regulator operates from an input voltage
range of 2.7V to 17V and provides an adjustable output
range from 0.6V to VIN while delivering up to 1A of output
current. A user-selectable mode input is provided to allow
the user to trade off ripple noise for light load efficiency;
Burst Mode operation provides the highest efficiency at
light loads, while pulse-skipping mode provides the lowest voltage ripple.
List of LTC3621 Options
PART NAME
FREQUENCY
VOUT
LTC3621
1.00MHz
Adjustable
LTC3621-2
2.25MHz
Adjustable
L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks
and Hot Swap is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Protected by U.S. Patents, including 5481178, 6580258,
6498466, 6611131, 6177787, 5705919, 5847554.
Portable-Handheld Scanners
Automotive Applications
n Emergency Radio
n
n
Typical Application
Efficiency and Power Loss vs Load
2.5V VOUT with 400mA Burst Clamp, fSW = 1MHz
4.7µH
VIN
LTC3621
RUN
FB
MODE
INTVCC
GND
604k
22pF
VOUT
2.5V
1A
22µF
191k
1µF
3621 TA01a
80
EFFICIENCY
0.1
70
60
50
0.01
40
30
20
10
0
0.0001
POWER LOSS
POWER LOSS (W)
10µF
SW
90
EFFICIENCY (%)
VIN
2.7V TO 17V
1.0
100
0.001
VIN = 12V
0.01
0.001
0.1
LOAD CURRENT (A)
1
0.0001
3621 TA01b
3621f
For more information www.linear.com/LTC3621
1
LTC3621/LTC3621-2
Absolute Maximum Ratings
(Note 1)
VIN Voltage (Note 2).................................... 17V to –0.3V
SW Voltage DC................................. VIN + 0.3V to –0.3V
Transient (Note 2)....................................19V to –2.0V
RUN Voltage................................................ VIN to –0.3V
MODE, FB Voltages....................................... 6V to –0.3V
INTVCC, PGOOD Voltages............................. 6V to –0.3V
Operating Junction Temperature Range
(Note 3)................................................... –40°C to 125°C
Storage Temperature Range................... –65°C to 125°C
Pin Configuration
TOP VIEW
TOP VIEW
6 MODE
SW 1
7
GND
VIN 2
SW
VIN
RUN
PGOOD
5 INTVCC
4 FB
RUN 3
1
2
3
4
9
GND
8
7
6
5
SGND
MODE
INTVCC
FB
MS8E PACKAGE
8-LEAD PLASTIC MSOP
TJMAX = 125°C, θJA = 40°C/W, θJC = 10°C/W
EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB
DCB PACKAGE
6-LEAD (2mm × 3mm) PLASTIC DFN
TJMAX = 125°C, θJA = 64°C/W, θJC = 9.6°C/W
EXPOSED PAD (PIN 7) IS GND, MUST BE SOLDERED TO PCB
Order Information
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3621EDCB#PBF
LTC3621EDCB#TRPBF
LGDG
6-Lead (2mm × 3mm) Plastic DFN
–40°C to 125°C
LTC3621IDCB#PBF
LTC3621IDCB#TRPBF
LGDG
6-Lead (2mm × 3mm) Plastic DFN
–40°C to 125°C
LTC3621EMS8E#PBF
LTC3621EMS8E#TRPBF
LTGDH
8-Lead Plastic MSOP
–40°C to 125°C
LTC3621IMS8E#PBF
LTC3621IMS8E#TRPBF
LTGDH
8-Lead Plastic MSOP
–40°C to 125°C
LTC3621EDCB-2#PBF
LTC3621EDCB-2#TRPBF
LGHY
6-Lead (2mm × 3mm) Plastic DFN
–40°C to 125°C
LTC3621IDCB-2#PBF
LTC3621IDCB-2#TRPBF
LGHY
6-Lead (2mm × 3mm) Plastic DFN
–40°C to 125°C
LTC3621EMS8E-2#PBF
LTC3621EMS8E-2#TRPBF LTGHZ
8-Lead Plastic MSOP
–40°C to 125°C
LTC3621IMS8E-2#PBF
LTC3621IMS8E-2#TRPBF LTGHZ
8-Lead Plastic MSOP
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
The
l denotes the specifications which apply over the full operating
Electrical
Characteristics
junction temperature range, otherwise specifications are at TJ = 25°C. VIN = 12V, unless otherwise noted. (Notes 3, 6)
SYMBOL
PARAMETER
VIN
Operating Voltage
CONDITIONS
2.7
17
V
VOUT
Operating Voltage
0.6
VIN
V
IVIN
Input Quiescent Current
0.1
4.5
µA
µA
mA
Shutdown Mode, VRUN = 0V
Burst Mode Operation
Forced Continuous Mode
(Note 4), VFB < 0.6V
MIN
TYP
0
3.5
1.5
MAX
UNITS
3621f
2
For more information www.linear.com/LTC3621
LTC3621/LTC3621-2
Electrical
Characteristics
The
l denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at TJ = 25°C. VIN = 12V, unless otherwise noted. (Notes 3, 6)
SYMBOL
PARAMETER
VFB
Regulated Feedback Voltage
CONDITIONS
l
MIN
TYP
MAX
UNITS
0.594
0.591
0.6
0.6
0.606
0.609
V
V
10
nA
0.015
%/V
IFB
FB Input Current
ΔVLINE(REG)
Reference Voltage Line Regulation
VIN = 2.7V to 17V (Note 5)
0.01
ΔVLOAD(REG)
Output Voltage Load Regulation
(Note 5)
0.1
ILSW
NMOS Switch Leakage
PMOS Switch Leakage
RDS(ON)
NMOS On-Resistance
PMOS On-Resistance
VIN = 5V
DMAX
Maximum Duty Cycle
VFB = 0.5V, VMODE = 1.5V
tON(MIN)
Minimum On-Time
VFB = 0.7V, VMODE = 1.5V
VRUN
RUN Input High Threshold
RUN Input Low Threshold
IRUN
RUN Input Current
VMODE
Pulse-Skipping Mode
Burst Mode Operation
Forced Continuous Mode
IMODE
MODE Input Current
tSS
Internal Soft-Start Time
ILIM
Peak Current Limit
0.1
0.1
l
%
1
1
0.15
0.37
Ω
Ω
100
%
60
0.3
VRUN = 12V
0
VINTVCC – 0.4
1.0
VMODE = 3.6V
ns
1.0
V
V
20
nA
0.3
V
V
V
VINTVCC – 1.0
0
10
0.5
l
VUVLO
VINTVCC Undervoltage Lockout
VUVLO(HYS)
VINTVCC Undervoltage Lockout Hysteresis
VIN Ramping Up
VOVLO
VIN Overvoltage Lockout Rising
VOVLO(HYS)
VIN Overvoltage Lockout Hysteresis
fOSC
Oscillator Frequency
1.44
1.30
2.4
18
1.60
1.76
1.80
2.6
2.7
l
l
2.05
0.92
1.8
0.82
3.3
19
20
V
mV
2.25
1.00
MHz
MHz
MHz
MHz
3.6
3.9
V
±7.5
±11
%
350
VINTVCC LDO Output Voltage
ΔVPGOOD
Power Good Range
RPGOOD
Power Good Resistance
PGOOD RDS(ON) at 500µA
275
tPGOOD
PGOOD Delay
PGOOD Low to High
PGOOD High to Low
0
32
IPGOOD
PGOOD Leakage Current
Ω
Cycles
Cycles
100
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Transient absolute maximum voltages should not be applied for
more than 4% of the switching duty cycle.
Note 3: The LTC3621 is tested under pulsed load conditions such that
TJ ≈ TA. The LTC3621E is guaranteed to meet specifications from
0°C to 85°C junction temperature. Specifications over the –40°C to
125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LTC3621I is guaranteed over the –40°C to 125°C operating junction
V
2.45
1.08
2.6
1.16
VINTVCC
VIN > 4V
A
A
mV
300
2.25MHz Parts
1MHz Parts
2.25MHz Parts
1MHz Parts
nA
ms
250
l
µA
µA
nA
temperature range. Note that the maximum ambient temperature
consistent with these specifications is determined by specific operating
conditions in conjunction with board layout, the rated package thermal
impedance and other environmental factors.
Note 4: The quiescent current in forced continuous mode does not include
switching loss of the power FETs.
Note 5: The LTC3621 is tested in a proprietary test mode that connects VFB
to the output of error amplifier.
Note 6: TJ is calculated from the ambient, TA, and power dissipation, PD,
according to the following formula:
TJ = TA + (PD • θJA)
3621f
For more information www.linear.com/LTC3621
3
LTC3621/LTC3621-2
Typical Performance Characteristics TJ = 25°C, unless otherwise noted.
VIN Supply Current
vs Input Voltage
Efficiency vs Load Current
(Burst Mode Operation)
100
Efficiency vs Load at Dropout
Operation
100
5
90
90
70
60
50
40
30
20
VOUT = 2.5V
VOUT = 3.3V
10 VIN = 12V
VOUT = 5V
FREQUENCY = 2.25MHz
0
0.001
0.1
0.01
1
LOAD CURRENT (A)
4
80
3
EFFICIENCY (%)
VIN SUPPLY CURRENT (µA)
EFFICIENCY (%)
80
SLEEP
2
1
0
Burst Mode
OPERATION
70
60
FORCED
CONTINUOUS
MODE
50
40
30
20
0
2
4
0
0.0001
6 8 10 12 14 16 18 20
INPUT VOLTAGE (V)
3621 G01
VIN = 5V
FREQUENCY = 2.25MHz
10
SD
0.001
0.1
0.01
LOAD CURRENT (A)
1
3621 G03
3621 G02
Burst Mode Operation
Pulse-Skipping Mode Operation
Load Step
SW
5V/DIV
SW
5V/DIV
VOUT
100mV/DIV
VOUT
AC-COUPLED
50mV/DIV
VOUT
AC-COUPLED
50mV/DIV
IL
500mA/DIV
IL
500mA/DIV
IL
500mA/DIV
ILOAD
500mA/DIV
3621 G04
VIN = 12V
VOUT = 3.3V
PULSE SKIP MODE
IOUT = 10mA
L = 2.2µH
Soft-Start Operation
VIN = 12V
VOUT = 3.3V
ILOAD = 0.05A
EFFICIENCY (%)
IL
0.5A/DIV
VOUT
1V/DIV
PGOOD
2V/DIV
3621 G07
96
94
92
90
88
86
84
82
80
78
76
74
72
70
3621 G06
40µs/DIV
Oscillator Frequency
vs Temperature
Efficiency vs Input Voltage
RUN
5V/DIV
400µs/DIV
3621 G05
4µs/DIV
2.50
VOUT = 2.5V
2.45
OSCILLATOR FREQUENCY (MHz)
4µs/DIV
VIN = 12V
VOUT = 3.3V
Burst Mode OPERATION
IOUT = 50mA
L = 2.2µH
ILOAD = 1A
ILOAD = 10mA
2.40
2.35
2.30
2.25
2.20
2.15
2.10
2.05
0
5
20
10
15
INPUT VOLTAGE (V)
3621 G08
2.00
–50 –25
50
25
75
0
TEMPERATURE (°C)
100
125
3621 G09
3621f
4
For more information www.linear.com/LTC3621
LTC3621/LTC3621-2
Typical Performance Characteristics TJ = 25°C, unless otherwise noted.
Oscillator Frequency
vs Supply Voltage
Efficiency vs Load at 1MHz
2.50
90
2.45
EFFICIENCY (%)
80
70
60
50
40
30
20
VOUT = 2.5V
VOUT = 3.3V
VOUT = 5V
10
VIN = 12V
0
0.0001
0.001
0.1
0.01
LOAD CURRENT (A)
600.5
600.0
2.40
REFERENCE VOLTAGE
OSCILLATOR FREQUENCY (MHz)
100
Reference Voltage
vs Temperature
2.35
2.30
2.25
2.20
2.15
2.10
599.5
599.0
598.5
598.0
2.05
1
2.00
12
7
SUPPLY VOLTAGE (V)
2
3621 G16
597.5
–100
17
–50
3521 G11
3621 G10
RDS(ON) vs Input Voltage
RDS(ON) vs Temperature
700
550
4
300
400
350
300
0
2
4
BOTTOM FET
200
BOTTOM FET
–4
100
–50
–25
50
25
0
75
TEMPERATURE (°C)
100
–5
125
0.5
Switch Leakage
vs Temperature
6
–0.1
–0.3
0.08
0.07
SW LEAKAGE (µA)
VIN SUPPLY CURRENT (µA)
0.1
0.09
5
4
SLEEP
3
2
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
INPUT VOLTAGE (V)
3621 G15
0.06
BOTTOM FET
0.05
0.04
0.03
0.02
1
0
–50 –25
1500
500
1000
LOAD CURRENT (mA)
3621 G14
VIN Supply Current
vs Temperature
0.3
0
3621 G13
Line Regulation
∆VOUT ERROR (%)
0
–1
–3
150
6 8 10 12 14 16 18 20
INPUT VOLTAGE (V)
1
–2
3621 G12
–0.5
2
250
200
VIN = 12V
VOUT = 3.3V
FORCED CONTINUOUS MODE
3
TOP FET
∆VOUT (%)
TOP FET
400
100
5
450
500
Load Regulation
600
500
RDS(ON) (mΩ)
RDS(ON) (mΩ)
600
150
50
100
0
TEMPERATURE (°C)
0.01
SHUTDOWN
50
25
75
0
TEMPERATURE (°C)
100
125
3521 G17
0
–50
TOP FET
–25
0
25
50
75
TEMPERATURE (°C)
100
125
3621 G18
3621f
For more information www.linear.com/LTC3621
5
LTC3621/LTC3621-2
Pin Functions
(DFN/MSOP)
SW (Pin 1/Pin 1): Switch Node Connection to the Inductor
of the Step-Down Regulator.
PGOOD (Pin 4, MSOP Package Only): VOUT within Regulation Indicator.
VIN (Pin 2/Pin 2): Input Voltage of the Step-Down Regulator.
INTVCC (Pin 5/Pin 6): Low Dropout Regulator. Bypass with
at least 1µF to Ground.
RUN (Pin 3/Pin 3): Logic Controlled RUN Input. Do not
leave this pin floating. Logic high activates the step-down
regulator.
FB (Pin 4/Pin 5): Feedback Input to the Error Amplifier
of the Step-Down Regulator. Connect a resistor divider
tap to this pin. The output voltage can be adjusted from
0.6V to VIN by:
VOUT = 0.6V • [1 + (R1/R2)]
MODE (Pin 6/Pin 7): Burst Mode Select of the Step-Down
Regulator. Tie MODE to INTVCC for Burst Mode operation
with a 400mA peak current clamp, tie MODE to GND for
pulse skipping operation, and tie MODE to a voltage between 1V and VINTVCC – 1V for forced continuous mode.
GND (Exposed Pad Pin 7/Pin 9): Ground Backplane for
Power and Signal Ground. Must be soldered to PCB ground.
SGND (Pin 8, MSOP Package Only): Signal Ground.
Block Diagram
0.8ms
SOFT-START
FB
0.6V
ERROR
AMPLIFIER
+
+
–
VIN
SLOPE
COMPENSATION
+
BURST
AMPLIFIER
MAIN
I-COMPARATOR
–
+
–
V
MODE
INTVCC
OSCILLATOR
CLK
OVERCURRENT
COMPARATOR
LDO
RUN
BUCK
LOGIC
AND
GATE DRIVE
+
–
PGOOD
VIN – 5V
SW
INTVCC
+
–
MS8E PACKAGE ONLY
REVERSE
COMPARATOR
GND
3621 BD
3621f
6
For more information www.linear.com/LTC3621
LTC3621/LTC3621-2
Operation
The LTC3621 uses a constant-frequency, peak current
mode architecture. It operates through a wide VIN range
and regulates with ultralow quiescent current. The operation frequency is set at either 2.25MHz or 1MHz. To suit
a variety of applications, the selectable MODE pin allows
the user to trade off output ripple for efficiency.
The output voltage is set by an external divider returned to
the FB pin. An error amplifier compares the divided output
voltage with a reference voltage of 0.6V and adjusts the
peak inductor current accordingly. In the MS8E package,
overvoltage and undervoltage comparators will pull the
PGOOD output low if the output voltage is not within 7.5%
of the programmed value. The PGOOD output will go high
immediately after achieving regulation and will go low 32
clock cycles after falling out of regulation.
Main Control Loop
During normal operation, the top power switch (P-channel
MOSFET) is turned on at the beginning of a clock cycle.
The inductor current is allowed to ramp up to a peak level.
Once that level is reached, the top power switch is turned
off and the bottom switch (N-channel MOSFET) is turned
on until the next clock cycle. The peak current level is controlled by the internally compensated ITH voltage, which is
the output of the error amplifier. This amplifier compares
the FB voltage to the 0.6V internal reference. When the
load current increases, the FB voltage decreases slightly
below the reference, which causes the error amplifier to
increase the ITH voltage until the average inductor current
matches the new load current.
The main control loop is shut down by pulling the RUN
pin to ground.
Low Current Operation
Two discontinuous-conduction modes (DCMs) are available
to control the operation of the LTC3621 at low currents.
Both modes, Burst Mode operation and pulse-skipping,
automatically switch from continuous operation to the
selected mode when the load current is low.
To optimize efficiency, Burst Mode operation can be selected by tying the MODE pin to INTVCC. In Burst Mode
operation, the peak inductor current is set to be at least
400mA, even if the output of the error amplifier demands
less. Thus, when the switcher is on at relatively light output
loads, FB voltage will rise and cause the ITH voltage to
drop. Once the ITH voltage goes below 0.2V, the switcher
goes into its sleep mode with both power switches off.
The switcher remains in this sleep state until the external
load pulls the output voltage below its regulation point.
During sleep mode, the part draws an ultralow 3.5µA of
quiescent current from VIN.
To minimize VOUT ripple, pulse-skipping mode can be
selected by grounding the MODE pin. In the LTC3621,
pulse-skipping mode is implemented similarly to Burst
Mode operation with the peak inductor current set to be
at about 66mA. This results in lower output voltage ripple
than in Burst Mode operation with the trade-off being
slightly lower efficiency.
Forced Continuous Mode Operation
Aside from the two discontinuous-conduction modes,
the LTC3621 also has the ability to operate in the forced
continuous mode by setting the MODE voltage between
1V and VINTVCC – 1V. In forced continuous mode, the
switcher will switch cycle by cycle regardless of what
the output load current is. If forced continuous mode is
selected, the minimum peak current is set to be –133mA
in order to ensure that the part can operate continuously
at zero output load.
High Duty Cycle/Dropout Operation
When the input supply voltage decreases towards the output
voltage, the duty cycle increases and slope compensation
is required to maintain the fixed switching frequency. The
LTC3621 has internal circuitry to accurately maintain the
peak current limit (ILIM) of 1.6A even at high duty cycles.
As the duty cycle approaches 100%, the LTC3621 enters
dropout operation. During dropout, if force continuous
mode is selected, the top PMOS switch is turned on
continuously, and all active circuitry is kept alive. However, if Burst Mode operation or pulse-skipping mode is
selected, the part will transition in and out of sleep mode
depending on the output load current. This significantly
reduces the quiescent current, thus prolonging the use
of the input supply.
3621f
For more information www.linear.com/LTC3621
7
LTC3621/LTC3621-2
Operation
VIN Overvoltage Protection
In order to protect the internal power MOSFET devices
against transient voltage spikes, the LTC3621 constantly
monitors the VIN pin for an overvoltage condition. When
VIN rises above 19V, the regulator suspends operation by
shutting off both power MOSFETs. Once VIN drops below
18.7V, the regulator immediately resumes normal operation. The regulator executes its soft-start function when
exiting an overvoltage condition.
Low Supply Operation
below 2.7V. As the input voltage rises slightly above the
undervoltage threshold, the switcher will begin its basic
operation. However, the RDS(ON) of the top and bottom
switch will be slightly higher than that specified in the
electrical characteristics due to lack of gate drive. Refer
to graph of RDS(ON) versus VIN for more details.
Soft-Start
The LTC3621 has an internal 800µs soft-start ramp. During
start-up soft-start operation, the switcher will operate in
pulse-skipping mode.
The LTC3621 incorporates an undervoltage lockout circuit
which shuts down the part when the input voltage drops
Applications Information
Output Voltage Programming
For non-fixed output voltage parts, the output voltage is
set by external resistive divider according to the following
equation:
 R2 
VOUT = 0.6V • 1+
 R1 
VOUT
R2
CFF
FB
R1
SGND
3621 F01
Figure 1. Setting the Output Voltage
Input Capacitor (CIN) Selection
The input capacitance, CIN, is needed to filter the square
wave current at the drain of the top power MOSFET. To
prevent large voltage transients from occurring, a low
ESR input capacitor sized for the maximum RMS current
should be used. The maximum RMS current is given by:
VOUT
VIN
VIN
–1
VOUT
This formula has a maximum at VIN = 2VOUT, where:
The resistive divider allows the FB pin to sense a fraction
of the output voltage as shown in Figure 1.
LTC3621
IRMS ≅IOUT(MAX)
IRMS ≅
IOUT
2
This simple worst-case condition is commonly used for
design because even significant deviations do not offer
much relief. Note that ripple current ratings from capacitor
manufacturers are often based on only 2000 hours of life
which makes it advisable to further derate the capacitor,
or choose a capacitor rated at a higher temperature than
required. Several capacitors may also be paralleled to meet
size or height requirements in the design. For low input
voltage applications, sufficient bulk input capacitance is
needed to minimize transient effects during output load
changes.
Output Capacitor (COUT) Selection
The selection of COUT is determined by the effective series
resistance (ESR) that is required to minimize voltage ripple
and load step transients as well as the amount of bulk
capacitance that is necessary to ensure that the control
3621f
8
For more information www.linear.com/LTC3621
LTC3621/LTC3621-2
Applications Information
loop is stable. Loop stability can be checked by viewing
the load transient response. The output ripple, ∆VOUT, is
determined by:
∆VOUT < ∆IL
1


+ESR
8 • f •COUT

The output ripple is highest at maximum input voltage
since ∆IL increases with input voltage. Multiple capacitors placed in parallel may be needed to meet the ESR
and RMS current handling requirements. Dry tantalum,
special polymer, aluminum electrolytic, and ceramic
capacitors are all available in surface mount packages.
Special polymer capacitors are very low ESR but have
lower capacitance density than other types. Tantalum
capacitors have the highest capacitance density but it is
important to only use types that have been surge tested
for use in switching power supplies. Aluminum electrolytic
capacitors have significantly higher ESR, but can be used
in cost-sensitive applications provided that consideration
is given to ripple current ratings and long-term reliability.
Ceramic capacitors have excellent low ESR characteristics
and small footprints.
Using Ceramic Input and Output Capacitors
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
VIN input. At best, this ringing can couple to the output and
be mistaken as loop instability. At worst, a sudden inrush
of current through the long wires can potentially cause
a voltage spike at VIN large enough to damage the part.
When choosing the input and output ceramic capacitors,
choose the X5R and X7R dielectric formulations. These
dielectrics have the best temperature and voltage characteristics of all the ceramics for a given value and size.
Since the ESR of a ceramic capacitor is so low, the input
and output capacitor must instead fulfill a charge storage
requirement. During a load step, the output capacitor must
instantaneously supply the current to support the load
until the feedback loop raises the switch current enough
to support the load. Typically, five cycles are required to
respond to a load step, but only in the first cycle does the
output voltage drop linearly. The output droop, VDROOP, is
usually about three times the linear drop of the first cycle.
Thus, a good place to start with the output capacitor value
is approximately:
COUT = 3
∆IOUT
f • VDROOP
More capacitance may be required depending on the duty
cycle and load-step requirements. In most applications,
the input capacitor is merely required to supply high
frequency bypassing, since the impedance to the supply
is very low. A 10μF ceramic capacitor is usually enough
for these conditions. Place this input capacitor as close
to the IN pin as possible.
Output Power Good
In the MS8E package, when the LTC3621’s output voltage
is within the ±7.5% window of the regulation point, the
output voltage is good and the PGOOD pin is pulled high
with an external resistor. Otherwise, an internal open-drain
pull-down device (275Ω) will pull the PGOOD pin low.
To prevent unwanted PGOOD glitches during transients
or dynamic VOUT changes, the LTC3621’s PGOOD falling edge includes a blanking delay of approximately 32
switching cycles.
Inductor Selection
Given the desired input and output voltages, the inductor
value and operating frequency determine the ripple current:
∆IL =
VOUT 
V

1– OUT
f •L  VIN(MAX) 
3621f
For more information www.linear.com/LTC3621
9
LTC3621/LTC3621-2
Applications Information
Lower ripple current reduces power losses in the inductor,
ESR losses in the output capacitors and output voltage
ripple. Highest efficiency operation is obtained at low
frequency with small ripple current. However, achieving
this requires a large inductor. There is a trade-off between
component size, efficiency and operating frequency.
A reasonable starting point is to choose a ripple current
that is about 40% of IOUT(MAX). To guarantee that ripple
current does not exceed a specified maximum, the inductance should be chosen according to:
L=
VOUT 
V

1– OUT
f • ∆IL(MAX)  VIN(MAX) 
Once the value for L is known, the type of inductor must
be selected. Actual core loss is independent of core size
for a fixed inductor value, but is very dependent on the
inductance selected. As the inductance or frequency increases, core losses decrease. Unfortunately, increased
inductance requires more turns of wire and therefore
copper losses will increase. Copper losses also increase
as frequency increases.
Ferrite designs have very low core losses and are preferred at high switching frequencies, so design goals can
concentrate on copper loss and preventing saturation.
Ferrite core material saturates “hard”, which means that
inductance collapses abruptly when the peak design current
is exceeded. This results in an abrupt increase in inductor
ripple current and consequent output voltage ripple. Do
not allow the core to saturate!
Different core materials and shapes will change the size/
current and price/current relationship of an inductor. Toroid
or shielded pot cores in ferrite or permalloy materials are
small and don’t radiate much energy, but generally cost
more than powdered iron core inductors with similar
characteristics. The choice of which style inductor to use
mainly depends on the price versus size requirements
and any radiated field/EMI requirements. New designs for
surface mount inductors are available from Toko, Vishay,
NEC/Tokin, Cooper, TDK and Würth Electronik. Refer to
Table 1 for more details.
Checking Transient Response
The regular loop response can be checked by looking at the
load transient response. Switching regulators take several
cycles to respond to a step in load current. When a load step
occurs, VOUT immediately shifts by an amount equal to the
∆ILOAD • ESR, where ESR is the effective series resistance
of COUT. ∆ILOAD also begins to charge or discharge COUT
generating a feedback error signal used by the regulator to
return VOUT to its steady-state value. During this recovery
time, VOUT can be monitored for overshoot or ringing that
would indicate a stability problem.
The initial output voltage step may not be within the
bandwidth of the feedback loop, so the standard second
order overshoot/DC ratio cannot be used to determine
phase margin. In addition, a feedforward capacitor can
be added to improve the high frequency response, as
shown in Figure 1. Capacitor CFF provides phase lead by
creating a high frequency zero with R2, which improves
the phase margin.
The output voltage settling behavior is related to the stability
of the closed-loop system and will demonstrate the actual
overall supply performance. For a detailed explanation of
optimizing the compensation components, including a
review of control loop theory, refer to application Note 76.
In some applications, a more severe transient can be caused
by switching in loads with large (>1µF) input capacitors.
The discharge input capacitors are effectively put in parallel with COUT, causing a rapid drop in VOUT. No regulator
can deliver enough current to prevent this problem if the
switch connecting the load has low resistance and is driven
quickly. The solution is to limit the turn-on speed of the
load switch driver. A Hot Swap™ controller is designed
specifically for this purpose and usually incorporates
current limiting, short-circuit protection and soft-starting.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
3621f
10
For more information www.linear.com/LTC3621
LTC3621/LTC3621-2
Applications Information
Table 1. Inductor Selection Table
INDUCTOR
IHLP-1616BZ-11 Series
IHLP-2020BZ-01 Series
FDV0620 Series
MPLC0525L Series
HCP0703 Series
RLF7030 Series
WE-TPC 4828 Series
INDUCTANCE
(µH)
1.0
2.2
4.7
1
2.2
3.3
4.7
5.6
6.8
1
2.2
3.3
4.7
1
1.5
2.2
1
1.5
2.2
3.3
4.7
6.8
8.2
1
1.5
2.2
3.3
4.7
6.8
1.2
1.8
2.2
2.7
3.3
3.9
4.7
DCR
(mΩ)
24
61
95
18.9
45.6
79.2
108
113
139
18
37
51
68
16
24
40
9
14
18
28
37
54
64
8.8
9.6
12
20
31
45
17
20
23
27
30
47
52
MAX CURRENT
(A)
4.5
3.25
1.7
7
4.2
3.3
2.8
2.5
2.4
5.7
4
3.2
2.8
6.4
5.2
4.1
11
9
8
6
5.5
4.5
4
6.4
6.1
5.4
4.1
3.4
2.8
3.1
2.7
2.5
2.35
2.15
1.72
1.55
produce the most improvement. Percent efficiency can
be expressed as:
% Efficiency = 100% – (L1 + L2 + L3 +…)
DIMENSIONS
(mm)
4.3 × 4.7
4.3 × 4.7
4.3 × 4.7
5.4 × 5.7
5.4 × 5.7
5.4 × 5.7
5.4 × 5.7
5.4 × 5.7
5.4 × 5.7
6.7 × 7.4
6.7 × 7.4
6.7 × 7.4
6.7 × 7.4
6.2 × 5.4
6.2 × 5.4
6.2 × 5.4
7 × 7.3
7 × 7.3
7 × 7.3
7 × 7.3
7 × 7.3
7 × 7.3
7 × 7.3
6.9 × 7.3
6.9 × 7.3
6.9 × 7.3
6.9 × 7.3
6.9 × 7.3
6.9 × 7.3
4.8 × 4.8
4.8 × 4.8
4.8 × 4.8
4.8 × 4.8
4.8 × 4.8
4.8 × 4.8
4.8 × 4.8
HEIGHT
(mm)
2
2
2
2
2
2
2
2
2
2
2
2
2
2.5
2.5
2.5
3
3
3
3
3
3
3
3.2
3.2
3.2
3.2
3.2
3.2
2.8
2.8
2.8
2.8
2.8
2.8
2.8
MANUFACTURER
Vishay
www.vishay.com
Toko
www.toko.com
NEC/Tokin
www.nec-tokin.com
Cooper Bussmann
www.cooperbussmann.com
TDK
www.tdk.com
Würth Elektronik
www.we-online.com
through inductor L but is “chopped” between the
internal top and bottom power MOSFETs. Thus, the
series resistance looking into the SW pin is a function
of both top and bottom MOSFET RDS(ON) and the duty
cycle (DC) as follows:
where L1, L2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in
the circuit produce losses, three main sources usually
account for most of the losses in LTC3621 circuits: 1) I2R
losses, 2) switching and biasing losses, 3) other losses.
RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC)
1.I2R losses are calculated from the DC resistances of
the internal switches, RSW, and external inductor, RL.
In continuous mode, the average output current flows
I2R losses = IOUT2(RSW + RL)
The RDS(ON) for both the top and bottom MOSFETs can be
obtained from the Typical Performance Characteristics
curves. Thus to obtain I2R losses:
3621f
For more information www.linear.com/LTC3621
11
LTC3621/LTC3621-2
Applications Information
2. The switching current is the sum of the MOSFET driver
and control currents. The power MOSFET driver current
results from switching the gate capacitance of the power
MOSFETs. Each time a power MOSFET gate is switched
from low to high to low again, a packet of charge dQ
moves from IN to ground. The resulting dQ/dt is a current out of IN that is typically much larger than the DC
control bias current. In continuous mode, IGATECHG =
f(QT + QB), where QT and QB are the gate charges of
the internal top and bottom power MOSFETs and f is
the switching frequency. The power loss is thus:
Switching Loss = IGATECHG • VIN
To avoid the LTC3621 from exceeding the maximum junction temperature, the user will need to do some thermal
analysis. The goal of the thermal analysis is to determine
whether the power dissipated exceeds the maximum
junction temperature of the part. The temperature rise is
given by:
TRISE = PD • θJA
As an example, consider the case when the LTC3621
is used in applications where VIN = 12V, IOUT = 1A,
f = 2.25MHz, VOUT = 1.8V. The equivalent power MOSFET
resistance RSW is:
The gate charge loss is proportional to VIN and f and
thus their effects will be more pronounced at higher
supply voltages and higher frequencies.
RSW =RDS(ON)TOP •
3.Other “hidden” losses such as transition loss and copper trace and internal load resistances can account for
additional efficiency degradations in the overall power
system. It is very important to include these “system”
level losses in the design of a system. Transition loss
arises from the brief amount of time the top power
MOSFET spends in the saturated region during switch
node transitions. The LTC3621 internal power devices
switch quickly enough that these losses are not significant compared to other sources. These losses plus
other losses, including diode conduction losses during
dead-time and inductor core losses, generally account
for less than 2% total additional loss.
= 370mΩ •
Thermal Conditions
In a majority of applications, the LTC3621 does not dissipate much heat due to its high efficiency and low thermal
resistance of its exposed pad package. However, in applications where the LTC3621 is running at high ambient
temperature, high VIN, high switching frequency, and
maximum output current load, the heat dissipated may
exceed the maximum junction temperature of the part. If
the junction temperature reaches approximately 160°C,
both power switches will be turned off until the temperature
drops about 15°C cooler.
VOUT
 V

+RDS(ON)BOT • 1– OUT 
VIN
VIN
 1.8V 
1.8V
+150mΩ • 1–
 12V 
12V
= 183mΩ
The VIN current during 2.25MHz force continuous operation with no load is about 5mA, which includes switching
and internal biasing current loss, transition loss, inductor
core loss and other losses in the application. Therefore,
the total power dissipated by the part is:
PD = IOUT2 • RSW + VIN • IIN(Q)
= 1A2 • 183mΩ + 12V • 5mA
= 243mW
The DFN 2mm × 3mm package junction-to-ambient thermal
resistance, θJA, is around 64°C/W. Therefore, the junction
temperature of the regulator operating in a 25°C ambient
temperature is approximately:
TJ = 0.243W • 64°C/W + 25°C = 40.6°C
Remembering that the above junction temperature is
obtained from an RDS(ON) at 25°C, we might recalculate
the junction temperature based on a higher RDS(ON) since
it increases with temperature. Redoing the calculation
assuming that RSW increased 5% at 40.6°C yields a new
3621f
12
For more information www.linear.com/LTC3621
LTC3621/LTC3621-2
Applications Information
junction temperature of 41.1°C. If the application calls
for a higher ambient temperature and/or higher switching
frequency, care should be taken to reduce the temperature
rise of the part by using a heat sink or forced air flow.
Board Layout Considerations
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3621 (refer to Figure 3). Check the following in
your layout:
1.Do the capacitors CIN connect to the VIN and GND as
close as possible? These capacitors provide the AC
current to the internal power MOSFETs and their drivers.
2.Are COUT and L closely connected? The (–) plate of
COUT returns current to GND and the (–) plate of CIN.
3.The resistive divider, R1 and R2, must be connected
between the (+) plate of COUT and a ground line terminated near GND. The feedback signal VFB should be
routed away from noisy components and traces, such
as the SW line, and its trace should be minimized. Keep
R1 and R2 close to the IC.
4. Solder the exposed pad (Pin 7 for DFN, Pin 9 for MSOP)
on the bottom of the package to the GND plane. Connect
this GND plane to other layers with thermal vias to help
dissipate heat from the LTC3621.
Design Example
As a design example, consider using the LTC3621 in an
application with the following specifications:
VIN = 10.8V to 13.2V
VOUT = 3.3V
IOUT(MAX) = 1A
IOUT(MIN) = 0A
fSW = 2.25MHz
Because efficiency and quiescent current is important at
both 500mA and 0A current states, Burst Mode operation
will be utilized.
Given the internal oscillator of 2.25MHz, we can calculate the inductor value for about 40% ripple current at
maximum VIN:
L=
3.3V

  3.3V 
1–
= 2.75µH
2.25MHz • 0.4A  13.2V
Given this, a 2.7µH or 3.3µH inductor would suffice.
COUT will be selected based on the ESR that is required to
satisfy the output voltage ripple requirement and the bulk
capacitance needed for loop stability. For this design, a
22µF ceramic capacitor will be used.
5. Keep sensitive components away from the SW pin. The
input capacitor, CIN, feedback resistors, and INTVCC
bypass capacitors should be routed away from the SW
trace and the inductor.
CIN should be sized for a maximum current rating of:
6.A ground plane is preferred.
Decoupling the VIN pin with 10µF ceramic capacitors is
adequate for most applications.
7.Flood all unused areas on all layers with copper, which
reduces the temperature rise of power components.
These copper areas should be connected to GND.
IRMS = 1A
 3.3V  13.2V 
–1
13.2V  3.3V 
1/2
= 0.43A
3621f
For more information www.linear.com/LTC3621
13
LTC3621/LTC3621-2
Package Description
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
DCB Package
6-Lead Plastic DFN (2mm × 3mm)
(Reference LTC DWG # 05-08-1715 Rev A)
0.70 ±0.05
3.55 ±0.05
1.65 ±0.05
(2 SIDES)
2.15 ±0.05
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
1.35 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.115
TYP
R = 0.05
TYP
2.00 ±0.10
(2 SIDES)
3.00 ±0.10
(2 SIDES)
0.40 ± 0.10
4
6
1.65 ± 0.10
(2 SIDES)
PIN 1 NOTCH
R0.20 OR 0.25
× 45° CHAMFER
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
3
0.200 REF
0.75 ±0.05
1
(DCB6) DFN 0405
0.25 ± 0.05
0.50 BSC
1.35 ±0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (TBD)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
3621f
14
For more information www.linear.com/LTC3621
LTC3621/LTC3621-2
Package Description
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
MS8E Package
8-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1662 Rev J)
BOTTOM VIEW OF
EXPOSED PAD OPTION
1.88
(.074)
1
1.88 ± 0.102
(.074 ± .004)
0.29
REF
1.68
(.066)
0.889 ± 0.127
(.035 ± .005)
0.05 REF
5.23
(.206)
MIN
DETAIL “B”
CORNER TAIL IS PART OF
DETAIL “B” THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
NO MEASUREMENT PURPOSE
1.68 ± 0.102 3.20 – 3.45
(.066 ± .004) (.126 – .136)
8
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
0.65
(.0256)
BSC
0.42 ± 0.038
(.0165 ± .0015)
TYP
8
7 6 5
0.52
(.0205)
REF
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
4.90 ± 0.152
(.193 ± .006)
DETAIL “A”
0° – 6° TYP
GAUGE PLANE
0.53 ± 0.152
(.021 ± .006)
DETAIL “A”
1
2 3
4
1.10
(.043)
MAX
0.86
(.034)
REF
0.18
(.007)
SEATING
PLANE
0.22 – 0.38
(.009 – .015)
TYP
0.65
(.0256)
BSC
0.1016 ± 0.0508
(.004 ± .002)
MSOP (MS8E) 0911 REV J
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD
SHALL NOT EXCEED 0.254mm (.010") PER SIDE.
3621f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection
of its circuits
as described
herein will not infringe on existing patent rights.
For more
information
www.linear.com/LTC3621
15
LTC3621/LTC3621-2
Typical Application
5VOUT with 400mA Burst Mode Operation, 2.25MHz
L1
3.3µH
VIN
12V
CIN
10µF
VIN
SW
LTC3621-2
RUN
FB
MODE
INTVCC
GND
VOUT
COUT 5V
22µF
CFB
22pF
R3
187k
3621 TA02
R4
25.5k
C1
1µF
1.2VOUT, Forced Continuous Mode, 1MHz
VIN
2.7V TO 17V
C3
10µF
L1
3.3µH
VIN
1.2V
SW
LTC3621
RUN
FB
MODE
INTVCC
GND
C3
22pF
R1
604k
C2
22µF
VOUT
R5
604k
C1
1µF
V
1V
3621 TA03
Related Parts
PART NUMBER
DESCRIPTION
COMMENTS
LTC3646/
LTC3646-1
40V, 1A (IOUT), 3MHz Synchronous Step-Down
DC/DC Converter
95% Efficiency, VIN: 4V to 40V, VOUT(MIN) = 0.6V, IQ = 140µA, ISD < 8µA,
3mm × 4mm DFN-14, MSOP-16E Packages
LTC3600
1.5A, 15V, 4MHz Synchronous Rail-to-Rail Single
Resistor Step-Down Regulator
95% Efficiency, VIN: 4V to 15V, VOUT(MIN) = 0V, IQ = 700µA, ISD < 1µA,
3mm × 3mm DFN-12, MSOP-12E Packages
LTC3601
15V, 1.5A (IOUT) 4MHz Synchronous Step-Down
DC/DC Converter
95% Efficiency, VIN: 4.5V to 15V, VOUT(MIN) = 0.6V, IQ = 300µA, ISD < 1µA,
4mm × 4mm QFN-20, MSOP-16E Packages
LTC3603
15V, 2.5A (IOUT) 3MHz Synchronous Step-Down
DC/DC Converter
95% Efficiency, VIN: 4.5V to 15V, VOUT(MIN) = 0.6V, IQ = 75µA, ISD < 1µA,
4mm × 4mm QFN-20, MSOP-16E Packages
LTC3633/
LTC3633A
15V, Dual 3A (IOUT) 4MHz Synchronous Step-Down
DC/DC Converter
95% Efficiency, VIN: 3.6V to 15V, VOUT(MIN) = 0.6V, IQ = 500µA, ISD < 15µA,
4mm × 5mm QFN-28, TSSOP-28E Packages. A Version Up to 20VIN
LTC3605/
LTC3605A
15V, 5A (IOUT) 4MHz Synchronous Step-Down
DC/DC Converter
95% Efficiency, VIN: 4V to 15V, VOUT(MIN) = 0.6V, IQ = 2mA, ISD < 15µA,
4mm × 4mm QFN-24 Package. A Version Up to 20VIN
LTC3604
15V, 2.5A (IOUT) 4MHz Synchronous Step-Down
DC/DC Converter
95% Efficiency, VIN: 3.6V to 15V, VOUT(MIN) = 0.6V, IQ = 300µA, ISD < 14µA,
3mm × 3mm QFN-16, MSOP-16E Packages
LTC1877
600mA (IOUT) 550kHz Synchronous Step-Down
DC/DC Converter
VIN: 2.7V to 10V, VOUT(MIN) = 0.8V, IO = 10µA, ISD < 1µA, MSOP-8 Package
LT8610/LT8611
42V, 2.5A (IOUT) Synchronous Step-Down
DC/DC Converter
96% Efficiency, VIN: 3.4V to 42V, VOUT(MIN) = 0.97V, IQ = 2.5µA, ISD < 1µA,
MSOP-16E Package
3621f
16 Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
For more information www.linear.com/LTC3621
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com/LTC3621
LT 0313 • PRINTED IN USA
 LINEAR TECHNOLOGY CORPORATION 2013