C500-LDP01-V1
Ladder Program I/O Unit
Operation Manual
Revised January 1992
Notice:
OMRON products are manufactured for use according to proper procedures by a qualified operator
and only for the purposes described in this manual.
The following conventions are used to indicate and classify warnings in this manual. Always heed the
information provided with them.
Caution Indicates information that, if not heeded, could result in minor injury or damage
to the product.
DANGER! Indicates information that, if not heeded, could result in loss of life or serious
injury.
OMRON Product References
All OMRON products are capitalized in this manual. The word “Unit” is also capitalized when it refers
to an OMRON product, regardless of whether or not it appears in the proper name of the product.
The abbreviation “Ch,” which appears in some displays and on some OMRON products, often means
“word” and is abbreviated “Wd” in documentation in this sense.
The abbreviation “PC” means Programmable Controller and is not used as an abbreviation for anything else.
Visual Aids
The following headings appear in the left column of the manual to help you locate different types of
information.
Note Indicates information of particular interest for efficient and convenient operation
of the product.
1, 2, 3...
1. Indicates lists of one sort or another, such as procedures, checklists, etc.
OMRON, 1992
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About this Manual:
This manual describes the installation and operation of the C500-LD01-V1 Ladder Program I/O Unit and
includes the sections described below.
Please read this manual completely and be sure you understand the information provide before attempting to install and operation the Ladder Program I/O Unit.
Section 1 introduces the Unit and describes its components and the way it fits into a PC system. A comparison of the C500-LD01-V1 and the C500-LD01 is also provided.
Section 2 provides information on switch settings and how certain switch settings affect indicator operation. These switch must be set before mounting and operating the Unit.
Section 3 describes the data areas available for use in programming the Unit.
Section 4 provides information related to programming and operating the Unit. A list of programming instructions is provided in Appendix C Programming Instructions. Details on programming can be found in
the C500 Operation Manual.
Section 5 describes the scan of the Unit and how the operating mode affects it. It also describes scan time
and I/O response time calculations and provides tables of instruction execution times.
Section 6 provides basic troubleshooting steps, error messages provided by the indicators, and the fuse
replacement procedure.
#
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Section 1-2
Features
The C500-LDP01-V1 Ladder Program I/O Unit executes a ladder program to
control external I/O independently of the PC. The ladder program contained in
the Unit is written by the user.
The C500-LDP01-V1 Ladder Program I/O Unit can be used with the following
SYSMAC C-series PCs: C500, C1000H, C2000H.
Applications Examples
• External I/O can be controlled by the Ladder Program I/O Unit instead of the
PC.
• The Ladder Program I/O Unit can be used as a timer.
• The Ladder Program I/O Unit can be used as a high-speed input unit.
• By controlling external inputs and outputs, the Ladder Program I/O Unit can
reduce the processing load handled by the PC.
C500 Instructions
The Ladder Program I/O Unit uses the same instructions as the C500, so ladder
programs can be constructed in the same way. A total of 49 different instructions
is available. (Not all C500 instructions are supported.)
External I/O Points:
16 Input/16 Output
The 16 DC inputs and 16 transistor outputs can be connected to external I/O devices so the Unit can be used as for normal I/O operation. Of the 16 DC inputs, 8
inputs (2 groups of 4) can be set for high-speed inputs with a minimum pulse
width of 0.5 ms, so inputs shorter than the scan time can be detected.
PC I/O Points:
16 Input and 16 Output
The Unit connects to the PC through 16 input points and 16 output points, so
control signals can be passed back and forth between the PC and the Unit. Furthermore, when the I/O WRITE and I/O READ (WRIT(87)/READ(88)) instructions are executed in the PC program, up to 32 words of data can be transferred
to or from the Unit.
Built-in Realtime Clock
A realtime clock is built into the Unit, so it can act as a timer and manage I/O
timing.
1-2
System Configuration
The following figure shows a typical system configuration:
GPC
Output devices
RS-485
connecting
cable
Input devices
Memory Pack
C500-MP303-EV2
The Unit can be programmed through the GPC with Memory Pack
C500-MP303-EV2, through the FIT, or through LSS running on an IBM AT/XT
compatible computer. Refer to Appendix C Programming Instructions for a list of
instructions. Online operations between the Unit and the GPC/FIT/LSS are possible in PROGRAM or MONITOR mode. They are not possible in RUN mode.
1-3
Section 1-3
Comparing the C500-LDP01 and the C500-LDP01-V1
The following table shows the improvements that have been made to create the
C500-LDP01-V1.
Item
Instruction set
C500-LDP01
C500-LDP01-V1
40 instructions
The following instructions were added to make a
total of 49 instructions.
ASL(25): ARITHMETIC SHIFT LEFT
ASR(26): ARITHMETIC SHIFT RIGHT
ROL(27): ROTATE LEFT
ROR(28): ROTATE RIGHT
COM(29): COMPLEMENT
INC(38): INCREMENT
DEC(39): DECREMENT
SLD(74): ONE DIGIT SHIFT LEFT
SRD(75): ONE DIGIT SHIFT RIGHT
Number of
2 words
words allocated 16 PC output bits (0000 through 0015)
16 PC input bits (0100 through 0115)
The PC cannot access the Unit using the I/O
WRITE and the I/O READ (WRIT(87)/READ(88))
instructions.
2 words
16 PC output bits (0000 through 0015)
16 PC input bits (0100 through 0115)
With the proper switch settings, the PC can
control the Unit using the I/O WRITE and I/O
READ (WRIT(87)/READ(88)) instructions.
(Up to 32 words are written or read.)
Operating
modes
Linked
operation
RUN
Linked
operation
PROGRAM
RUN
MONITOR
(DEBUG)
PROGRAM
Independent
operation
RUN
PROGRAM
Independent
operation
The GPC/FIT/LSS* can operate with the Unit in
PROGRAM mode only.
RUN
MONITOR
(DEBUG)
PROGRAM
The GPC/FIT/LSS* can operate with the Unit in
either PROGRAM or MONITOR (debug) mode.
*GPC: Graphic Programming Console
FIT:
Factory Intelligent Terminal
LSS: Ladder Support Software
1-4
Section 1-4
Nomenclature
Front Panel
Back Panel
Mounting screw
Indicators
Switches
Remove the display window
to access the switches.
Backplane connector
Output connectors
Connector for transistor outputs.
(Use connector provided.)
Input connector
Connector for 24 VDC power supply input.
(Use connector provided.)
RS-485 interface connector
Connector for the GPC, FIT, or
LSS. Use one of the following
cables:
3G2A2-CN221 (2 m)
C500-CN523 (5 m)
C500-CN131 (10 m)
C500-CN231 (20 m)
C500-CN331 (30 m)
C500-CN431 (40 m)
C500-CN531 (50 m)
DIP Switch
Mounting screw
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2-1
Section 2-1
Front Panel Switches and Selectors
Switch/Selector Location
Remove the display window using a standard screwdriver to access the
switches and selectors shown below.
Reset switch (SW2)
Indicator selector (SW3)
Mode selector (SW4)
Mode switch (SW5)
Standard
screwdriver
Switch/Selector Functions
Switch
No.
SW 2
Designation
Reset switch
Function
The Unit can be reset and restarted by pressing the reset switch.
Note Resetting the Unit completely clears I/O bit status and data memory.
If the back panel DIP switch is set for PC-linked operation, the Unit will enter RUN or
PROGRAM mode after resetting, depending on the status of the PC. If the back panel
DIP switch is set for independent operation, the Unit will enter RUN, MONITOR (debug),
or PROGRAM mode, depending on the setting of SW4. The same process occurs when
the power is turned on.
SW 3
Display
selector
Select indicator operation with this selector. Refer to the following pages for details.
SW 4
Mode selector
Changing this selector followed by pressing and releasing SW5 will alter the operating
mode as shown below. This switch also determines the mode entered when power is
turned on or the Unit is reset.
SW 4 set to up position . . . . . RUN
SW 4 set to center . . . . . . . . MONITOR (debug)
SW 4 set to down position . . PROGRAM
SW 5
Mode switch
When this switch is pressed and released, the Unit will enter the mode set on SW4. The
operation of this switch is enabled by turning on pin 5 of the back panel DIP switch, and
disabled by turning off pin 5.
The Unit cannot be switched to RUN or MONITOR mode when the program is being
transferred from a Programming Device or an error has occurred.
%
Display Selector
SW3
0
1
2
3
Section 2-1
Switching the display selector (SW3) alters the indicator operation as follows:
Description
Indicate operating mode
Indicate the status of output
bits 0000 to 0007
Indicate the status of output
bits 0008 to 0015
Indicate the status of input
bits 0100 to 0107
Indicator
Function
0
RUN
Lit during operation. Not lit in PROGRAM
mode.
1
MONITOR
(debug)
Lit in MONITOR (debug) mode. Not lit in
RUN or PROGRAM mode.
2
PROGRAM
Lit in PROGRAM mode. Not lit during
operation.
3
PC stop
Lit while the PC is not in operation (either
in PROGRAM mode or in case of error).
4
Error
Lit to indicate an error during operation.
Refer to 6-1 Error Messages and
Troubleshooting for details.
5
High-speed
input 1 is
set.
Lit when external input bits 0200 through
0203 are set for high-speed inputs (Pin 3
of the DIP switch is turned on).
6
High-speed
input 2 is
set.
Lit when external input bits 0204 through
0207 are set for high-speed inputs (Pin 4
of the DIP switch is turned on).
7
Communica
ting
Lit when the Unit is communicating with
the GPC, FIT, or LSS.
0
0000
Lit while corresponding output is ON.
1
0001
2
0002
3
0003
4
0004
5
0005
6
0006
7
0007
0
0008
1
0009
2
0010
3
0011
4
0012
5
0013
6
0014
7
0015
0
0100
1
0101
2
0102
3
0103
4
0104
5
0105
6
0106
7
0107
Lit while corresponding output is ON.
Lit while corresponding input is ON.
$
SW3
4
5
6
7
/
Section 2-1
Description
Indicate the status of input
bits 0108 to 0115
Indicate the status of
external input bits 0200 to
0207
Indicate the status of
external input bits 0208 to
0215
Indicate the status of
external output bits 0300 to
0307
Indicator
Function
0
0108
1
0109
2
0110
3
0111
4
0112
5
0113
6
0114
7
0115
0
0200
1
0201
2
0202
3
0203
4
0204
5
0205
6
0206
7
0207
0
0208
1
0209
2
0210
3
0211
4
0212
5
0213
6
0214
7
0215
0
0300
1
0301
2
0302
3
0303
4
0304
5
0305
6
0306
7
0307
Lit while corresponding input is ON.
Lit while corresponding input is ON.
Lit while corresponding input is ON.
Lit while corresponding output is ON.
SW3
8
9
A
B
Section 2-1
Description
Indicate the status of
external output bits 0308 to
0315
Indicate the year of the clock
Indicate the month of the
clock
Indicate the date of the clock
Indicator
Function
0
0308
Lit while corresponding output is ON.
1
0309
2
0310
3
0311
4
0312
5
0313
6
0314
7
0315
0
8
1
4
2
2
3
1
4
8
5
4
6
2
7
1
0
------
1
------
2
------
3
1
x 101
4
8
x 100
5
4
6
2
7
1
0
------
1
------
2
2
3
1
4
8
5
4
6
2
7
1
x 101
The last two digits of the calendar year are
displayed. Data: 00 to 99
x 100
Data: 01 to 12
Indicators 0 through 2 are always OFF.
Data: 01 to 31
Indicators 0 and 1 are always OFF.
x 101
x 100
,
SW3
C
D
E
F
0
Section 2-1
Description
Indicate the hour of the clock
Indicate the minutes of the
clock
Indicate the seconds of the
clock
Indicate the day of the week
Indicator
Function
0
------
Data: 00 to 23 (24-hour clock)
Indicators 0 and 1 are always OFF.
1
------
2
2
3
1
4
8
5
4
6
2
7
1
0
------
1
4
2
2
3
1
4
8
5
4
6
2
7
1
0
------
1
4
2
2
3
1
4
8
5
4
6
2
7
1
0
------
Data: 00 to 06
Indicators 0 through 4 are always OFF.
1
------
00: Sunday; 01: Monday; 02: Tuesday;
2
------
03: Wednesday; 04: Thursday; 05: Friday;
3
------
06: Saturday
4
------
5
4
6
2
7
1
x 101
x 100
Data: 00 to 59 (minutes)
Indicator 0 is always OFF.
x 101
x 100
Data: 00 to 59 (seconds)
Indicator 0 is always OFF.
x 101
x 100
x 100
! " 2-2
Section 2-2
Back Panel DIP Switch
The DIP switch on the back panel sets the operating conditions of the Unit. All
pins are OFF at the time of delivery.
Not used
(Must be OFF.)
*1 *2 *3 *4
Not used.
(Must be OFF.)
*1. PC Data Transfer
2
Function
OFF
Data transfer between the PC and this Unit is the same as
that for a standard 16-point I/O Unit.
ON
Data transfer between the PC and this Unit is carried out
automatically via the I/O WRITE and I/O READ
(WRIT(87)/READ(88)) instructions.
*2. High-speed Inputs 1
3
Function
OFF
Sets external input bits 0200 to 0203 for standard inputs.
ON
Sets external input bits 0200 to 0203 for high-speed
inputs. A pulse width of 0.5 ms or longer can be received.
*3. High-speed Inputs 2
4
Function
OFF
Sets external input bits 0204 to 0207 for standard inputs.
ON
Sets external input bits 0204 to 0207 for high-speed
inputs. A pulse width of 0.5 ms or longer can be received.
*4. Independent Operation/Linked Operation
5
Note
Function
OFF
Operates in the same mode as the PC when the PC is in
RUN or PROGRAM mode, but won’t enter MONITOR
mode. The Unit will be in RUN mode if the PC is in
MONITOR mode. Front panel switches 4 and 5 are
disabled.
ON
Operating mode switched independently of PC operating
mode. Switches 4 and 5 (front panel) determine operating
mode.
1. Refer to Section 3 Data Areas for information about PC data transfer.
2. Refer to Section 5 Program Execution Timing for information about
high-speed inputs 1 and 2.
3. Refer to Section 4 Programming and Appendix C Programming Instructions
for information about linked operation with the PC.
Caution If power is applied to the PC when pin 5 is OFF and the PC is set for RUN or
MONITOR mode, the Ladder Program I/O Unit will automatically switch to RUN
mode. If the Unit is communicating with the GPC , FIT, or LSS it will switch to
RUN mode when the operation is completed.
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3-1
Section 3-1
IR (Internal Relay) Area
Data
Word/bit address
16 bits (0000 to 0015)
Output bits as seen from the PC
IR 00
00
08
01
09
02
10
03
11
04
12
05
13
06
14
07
16 bits (0100 to 0115)
Input bits as seen from the PC
15
IR 01
Output bits as seen from the Unit.
Cannot be used as work bits. The use of these bits depends on
the setting of pin 2 of the back panel DIP switch. Refer to
following subsections for details.
00
08
01
09
02
10
03
11
04
12
05
13
06
14
07
15
16 external input bits
(0200 to 0215)
IR 02
Bits 0200 to 0207 can be set for high-speed inputs.
Cannot be used as work bits.
00
08
01
09
02
10
03
11
04
12
05
13
06
14
07
16 external output bits
(0300 to 0315)
Input bits as seen from the Unit.
Cannot be used as work bits. The use of these bits depends on
the setting of pin 2 of the back panel DIP switch. Refer to
following subsections for details.
15
IR 03
Cannot be used as work bits.
00
08
01
09
02
10
03
11
04
12
05
13
06
14
07
15
"# $" #% &
Section 3-1
3-1-1 Normal I/O Operation
When pin 2 of the back panel DIP switch is OFF, data is transferred through 2
words allocated for I/O. If pin 2 is OFF, data cannot be not transferred to and from
the Ladder Program I/O Unit using the I/O WRITE and I/O READ
(WRIT(87)/READ(88)) instructions from the PC.
The output bit data in PC word n (the first word allocated to the Unit by the PC) is
input to word 00 in the Ladder Program I/O Unit. The bits of word 00 are treated
as input bits when programming the Ladder Program I/O Unit.
The input bit data in PC word n+1 is output from word 01 in the Ladder Program
I/O Unit. The bits of word 01 are treated as output bits when programming the
Ladder Program I/O Unit.
PC Word Allocation
Bit No.
IR n
IR n+1
Output
Input
Unit Word Allocation
Bit No.
Word 00
Word 01
Input
Output
00
Output bit 00
Input bit 00
00
Input bit 00
Output bit 00
01
Output bit 01
Input bit 01
01
Input bit 01
Output bit 01
02
Output bit 02
Input bit 02
02
Input bit 02
Output bit 02
03
Output bit 03
Input bit 03
03
Input bit 03
Output bit 03
04
Output bit 04
Input bit 04
04
Input bit 04
Output bit 04
05
Output bit 05
Input bit 05
05
Input bit 05
Output bit 05
06
Output bit 06
Input bit 06
06
Input bit 06
Output bit 06
07
Output bit 07
Input bit 07
07
Input bit 07
Output bit 07
08
Output bit 08
Input bit 08
08
Input bit 08
Output bit 08
09
Output bit 09
Input bit 09
09
Input bit 09
Output bit 09
10
Output bit 10
Input bit 10
10
Input bit 10
Output bit 10
11
Output bit 11
Input bit 11
11
Input bit 11
Output bit 11
12
Output bit 12
Input bit 12
12
Input bit 12
Output bit 12
13
Output bit 13
Input bit 13
13
Input bit 13
Output bit 13
14
Output bit 14
Input bit 14
14
Input bit 14
Output bit 14
15
Output bit 15
Input bit 15
15
Input bit 15
Output bit 15
"# $" #% &
Section 3-1
3-1-2 Operation via WRIT(87)/READ(88)
When pin 2 of the back panel DIP switch is ON, data can be transferred to and
from the Ladder Program I/O Unit using the I/O WRITE and I/O READ
(WRIT(87)/READ(88)) instructions from the PC. WRIT(87) and READ(88) are
used automatically for this data transfer in the Ladder Program I/O Unit and are
not available for user programming except in the PC. The Ladder Program I/O
Unit must be mounted to the CPU Rack or Expansion I/O Rack of a PC that supports WRIT(87)/READ(88).
Data written by the WRIT(87) instruction in the PC program is stored in DM 064
through DM 095 in the Unit. A maximum of 32 words can be transferred. Data
read by the READ(88) instruction in the PC is stored in DM 096 through DM 127.
A maximum of 32 words of data can be read. The bits in parentheses are controlled automatically (as described below) when WRIT(87)/READ(88) are enabled. Treat these as read-only bits. The other input and output bits shown below can be used as normal I/O bits.
Do not output to word n with the MOV(21) instruction in the PC program. When
outputting to word n, set the PC Busy, PC Write Completed, and PC Read Completed Flags to 0 (OFF). Also, do not output to word 01 with the MOV(21) instruction in the Ladder Program I/O Unit program. When outputting to word 01, set the
I/O Busy, I/O Read End, I/O Write End, I/O Read OK, and I/O Write OK Flags to 0
(OFF).
Bit 0103 (the I/O Read OK Flag) is turned ON when data has been transferred
correctly with the WRIT(87) instruction. It remains ON until the WRIT(87) instruction is executed again. Bit 0104 (the I/O Write OK Flag) is turned ON when
data has been written from the Ladder Program I/O Unit. It is turned OFF when
the READ(88) instruction is executed in the PC.
PC Word Allocation
Bit No.
%
Unit Word Allocation
IR n
IR n+1
Bit No.
Word 00
Word 01
Output
Input
Input
Output
00
(PC Busy)
(I/O Busy)
00
(PC Busy)
(I/O Busy)
01
(PC Write
Complete)
(I/O Read
End)
01
(PC Write
Complete)
(I/O Read
End)
02
(PC Read
Complete)
(I/O Write
End)
02
(PC Read
Complete)
(I/O Write
End)
03
Output bit 03
(I/O Read Ok)
03
Input bit 03
(I/O Read Ok)
04
Output bit 04
(I/O Write Ok)
04
Input bit 04
(I/O Write Ok)
05
Output bit 05
Input bit 05
05
Input bit 05
Output bit 05
06
Output bit 06
Input bit 06
06
Input bit 06
Output bit 06
07
Output bit 07
Input bit 07
07
Input bit 07
Output bit 07
08
Output bit 08
Input bit 08
08
Input bit 08
Output bit 08
09
Output bit 09
Input bit 09
09
Input bit 09
Output bit 09
10
Output bit 10
Input bit 10
10
Input bit 10
Output bit 10
11
Output bit 11
Input bit 11
11
Input bit 11
Output bit 11
12
Output bit 12
Input bit 12
12
Input bit 12
Output bit 12
13
Output bit 13
Input bit 13
13
Input bit 13
Output bit 13
14
Output bit 14
Input bit 14
14
Input bit 14
Output bit 14
15
Output bit 15
Input bit 15
15
Input bit 15
Output bit 15
'! 3-2
Section 3-2
Work Bits
Works bits are available for use in programming as required by the user. In the
Ladder Program I/O Unit, work bits run from word 04 to word 12 and from bit
0400 to bit 1207, as shown below.
Word/bit address
Word 04
Word 05
Word 06
Word 07
00
08
00
08
00
08
00
08
01
09
01
09
01
09
01
09
02
10
02
10
02
10
02
10
03
11
03
11
03
11
03
11
04
12
04
12
04
12
04
12
05
13
05
13
05
13
05
13
06
14
06
14
06
14
06
14
07
15
07
15
07
15
07
15
Word 08
Word 09
Word 10
Word 11
00
08
00
08
00
08
00
08
01
09
01
09
01
09
01
09
02
10
02
10
02
10
02
10
03
11
03
11
03
11
03
11
04
12
04
12
04
12
04
12
05
13
05
13
05
13
05
13
06
14
06
14
06
14
06
14
07
15
07
15
07
15
07
15
Word 12
00
Not
01
usable.
02
03
04
05
06
07
$
( $ (% &
3-3
Section 3-6
SR (Special Relay) Area
The following 16 bits are available for use in programming. Most of these are
flags that can be read to determine program execution status or results. Bit
1304, the Carry Flag, is also manipulated by the user with STC(40) and
CLC(41). Refer to descriptions of similar bits in the C500 Operation Manual for
details.
Bit address
Description
1208
Always OFF
1209
Turns ON for scans over 100 ms
1210
1211
Always OFF
1212
3-4
1213
Always ON
1214
Always OFF
1215
Turns ON for one scan time at the beginning of operation.
1300
0.1 sec clock pulse
1301
0.2 sec clock pulse
1302
1.0 sec clock pulse
1303
Turns ON when the operational data is not BCD (ER flag).
1304
Turns ON if the operational result produces a carry (CY flag).
1305
Turns ON if the operational result is greater (GR flag).
1306
Turns ON if the operational result is equal to zero (EQ flag).
1307
Turns On if the operational result is less (LE flag).
TR (Temporary Relay) Bits
TR 0 through TR 7 can be used to store execution conditions at branches in ladder-diagram programs.
3-5
TC (Timer/Counter) Area
TC 00 through TC 15 can be used to define timers and counters in the program.
Each TC number can be used only once to define a timer or counter.
3-6
DM (Data Memory) Area
The DM area contains 128 words between DM 000 and DM 127 and is used for
storage of data by word. Although each word contains 16 bits, the DM area is
accessible in word units only.
Clock data is assigned to DM 60 to 63; these words cannot be used for standard
data. The clock can be set by writing data to these addresses in PROGRAM or
MONITOR mode from a Programming Device or from the program. The clock is
factory set to Sunday, January 1, year 00, 00:00:00. When power is applied, the
clock starts at this time, and will continue timing for up to 10 days even if the power is cut off.
DM 064 through DM 127 are used for data transfer when pin 2 of the back panel
DIP switch is turned ON (i.e., data transfer by the WRIT(87) and READ(88) instructions is enabled), and this region of the DM area cannot be used as normal
DM words.
/
( $ (% &
Section 3-6
DM address
000
016
032
048
064
080
096
112
001
017
033
049
065
081
097
113
002
018
034
050
066
082
098
114
003
019
035
051
067
083
099
115
004
020
036
052
068
084
100
116
005
021
037
053
069
085
101
117
006
022
038
054
070
086
102
118
007
023
039
055
071
087
103
119
008
024
040
056
072
088
104
120
009
025
041
057
073
089
105
121
010
026
042
058
074
090
106
122
011
027
043
059
075
091
107
123
012
028
044
060
076
092
108
124
013
029
045
061
077
093
109
125
014
030
046
062
078
094
110
126
015
031
047
063
079
095
111
127
DM 000
15
14
13
12
11
10
09
08
07
06
05
04
03
02
01
00
DM 001
15
14
13
12
11
10
09
08
07
06
05
04
03
02
01
00
DM 126
15
14
13
12
11
10
09
08
07
06
05
04
03
02
01
00
DM 127
15
14
13
12
11
10
09
08
07
06
05
04
03
02
01
00
Data Configuration in DM 060 to DM 127
Word
Bits 8 to 15
Bits 0 to 7
DM 060
Minutes (0 to 59)
Seconds (0 to 59)
DM 061
Date (1 to 31)
Hour (0 to 23)
DM 062
Calendar year (last two digits: 00 to 99)
Month (1 to 12)
DM 063
------
Day of the week (Sunday [00] to Saturday [06])
DM 064 to DM 095 Back panel DIP switch pin 2 OFF: Used as normal DM words.
Back panel DIP switch pin 2 ON: Used to store data transferred by the WRIT(87) instruction in
the PC, and therefore cannot be used as normal DM words.
DM 096 to DM 127 Back panel DIP switch pin 2 OFF: Used as normal DM words.
Back panel DIP switch pin 2 ON: Used as normal DM words, but the data stored here will be
read out by READ(88) in the PC.
Note
1. If incorrect data is written to words DM 060 through DM 063, a clock data
write error will occur, and indicator 3 will flash.
2. DM 064 through DM 095, which contain the data written from the PC in the
WRIT(87) instruction, should be read only and not written to from the program.
,
!""!
/ ! !8 8" 3! ,
8!"" # : 6! ! 8 "" " # ! ! 8 # 4
( 4-1
Program Addresses and Memory Capacity
Instructions vary in length from 1 to 17 bytes. Since each instruction requires one
address, the maximum number of addresses available in a program also varies.
The instructions along with the corresponding number of bytes required for each
are listed in Appendix C Programming instructions.
The memory capacity available for the program is 4K and hence the approximate maximum number of instructions which can be programmed is 524(based
on an average length of 8 bytes per instruction).
4-2
Operating Modes
Any one of three modes, RUN mode, MONITOR (debug) mode, or PROGRAM
mode, can be selected in this Unit.
RUN Mode
Only executes the program. Programming Devices cannot be connected in this
mode, and the Unit scans and processes the program at high-speed. Select this
mode for normal operation.
MONITOR Mode
Executes the program. Execution of the program is possible while Programming
Devices are connected. The processing time is longer than that in RUN mode,
because of the time required to process transmissions to and from the Programming Device. MONITOR mode is mainly used to debug new programs. Refer to
the following pages in this section for information about operations that can be
performed online in MONITOR mode.
PROGRAM Mode
Does not execute the program. Normally used to transfer or compare the program. Refer to the following pages in this section for information about operations that can be performed online in PROGRAM mode.
4-3
Changing the Operating Mode
The program can be transferred to the Ladder Program I/O Unit only when it is in
PROGRAM mode. The table below shows the mode which the Unit will enter
when the Unit is turned on or reset. The operating mode is controlled by the settings of pin 5 of the back panel DIP switch, switch 4 on the front of the Unit, and
the status of the PC.
SW4
PC in RUN or MONITOR mode
Pin 5 ON:
Independent
Operation
Pin 5 OFF:
Linked
Operation
PC in PROGRAM mode
Pin 5 ON:
Independent
Operation
Pin 5 OFF:
Linked
Operation
Up
RUN
RUN
RUN
PROGRAM
Center
MONITOR
MONITOR
MONITOR
PROGRAM
Down
PROGRAM
RUN
PROGRAM
PROGRAM
4-3-1 Linked Operation
The operating mode of the Unit is linked to the operating mode of the PC. After
the operating mode shown above is entered when the Unit is turned on or reset,
the operating mode of the Unit can be changed to RUN or MONITOR mode as
long as the PC is in RUN or MONITOR mode. The operating mode cannot be
changed to PROGRAM mode or when the PC is in PROGRAM mode. When the
PC mode is changed, the operating mode is determined by switch 4.
Switching to RUN Mode
First set switch 4 to the up position, then press and release switch 5. The Unit will
enter RUN mode. (If switch 3 is set to 0, indicator 0 will light.)
Switching to MONITOR Mode First set switch 4 to the center position, then press and release switch 5. The Unit
will enter MONITOR mode. (If switch 3 is set to 0, indicator 1 will light.)
4-3-2 Independent Operation
The operating mode can be changed arbitrarily. After the operating mode determined by switch 4 is entered when the Unit is turned on or reset, the operating
mode can be changed as explained below.
Switching to RUN Mode
First set switch 4 to the up position, then press and release switch 5. The Unit will
enter RUN mode. (If switch 3 is set to 0, indicator 0 will light.)
Switching to MONITOR Mode First set switch 4 to the center position, then press and release switch 5. The Unit
will enter MONITOR mode. (If switch 3 is set to 0, indicator 1 will light.)
Switching to PROGRAM ModeFirst set switch 4 to the down position, then press and release switch 5. The Unit
will enter PROGRAM mode. (If switch 3 is set to 0, indicator 2 will light.)
Note
1. The operating mode cannot be changed from PROGRAM mode to MONITOR mode or RUN mode while the program is being transferred from a Programming Device. The operating mode can be changed when the program
transfer has been completed.
2. If an error occurs that stops the Unit, the operating mode will be switched to
PROGRAM mode regardless of the setting of pin 5 of the back panel DIP
switch. Refer to 6-1 Error Messages and Troubleshooting regarding errors
that stop operation.
3. When switching from PROGRAM mode to MONITOR or RUN mode, or
from MONITOR or RUN mode to PROGRAM mode, the I/O bits and work
bits will be reset completely. The DM area will not be affected.
4-4
Programming Devices
Please use the GPC, FIT, or LSS for programming. The programming procedure
for the Ladder Program I/O Unit is identical to that for C-series PCs. Refer to the
GPC, FIT, or LSS Operation Manual for details.
GPC
Main unit
System Memory Cassette
Operation Manual
3G2C5-GPC03-E/3G2C5-GPC04-E
C500-MP303-EV2
Catalog No. W84
FIT
Main unit
Operation Manual
FIT10-SET11-E
Catalog No. W150
LSS
Main unit
Operation Manual
C500-SF312-EV2/C500-SF711-EV2
Catalog No. W113
4-5
Online Operations
Online operations between the Unit and the GPC/FIT/LSS are possible only in
PROGRAM or MONITOR mode. They are not possible in RUN mode.
Only those operations listed below are possible online.
4-5-1 Online Operations with the GPC
Menu No.
o
1
2
3
4
Operation
MONITOR
PROGRAM
Connect/disconnect PC
Yes
Yes
Mode changes
No
No
Error readout
Yes
Yes
Error clear
Yes
Yes
Monitoring bit status
Yes
Yes
Monitoring I/O status
Yes
Yes
Force set/reset
Yes
Yes
Change PV1
Yes
Yes
Change PV2
Yes
Yes
Change ASCII
Yes
Yes
Multipoint I/O monitor
Yes
Yes
Word monitor
Yes
Yes
Change TC PV
Yes
Yes
Change TC SV1
No
No
Change TC SV2
No
No
Pause monitor display
Yes
Yes
Time chart monitoring
Yes
Yes
Generating
No
No
Comparing
No
No
Reading
No
No
PC memory clear
No
Yes
Transfer (GPC to Unit)
No
Yes
Transfer (Unit to
GPC)/Compare
Yes
Yes
DM area
t
transfer
f
Transfer (GPC to Unit)
Yes
Yes
Transfer (Unit to
GPC)/Compare
Yes
Yes
Comment
Transfer (GPC to factory
computer)
No
No
memory
Transfer (factory
computer to GPC)
No
No
transfer
Compare
No
No
Monitoring
g
I/O Table
User program
g
t
transfer
f
4-5-2 Online Operations with the FIT/LSS
The online operations that can be performed between the FIT/LSS and the Ladder Program I/O Unit are limited to monitoring and DM processes. Set the FIT/
LSS as if connecting to a C500 PC. A ”yes” indicates that the operation can be
performed in this mode.
Monitoring
Operation
Application
Monitor I/O status
MONITOR
PROGRAM
Yes
Yes
Ladder Program I/O Unit to
FIT/LSS
Yes
Yes
FIT/LSS to Ladder Program I/O
Unit
Yes
Yes
Compare
Yes
Yes
Ladder diagram (without comments)
Yes
Yes
Ladder diagram (with comments)
Yes
Yes
Online editing
g
Line connection
No
No
I/O comments
No
No
Line comments
No
No
Scan time read
No
No
Data area clear
No
Yes
Search
Yes
Yes
I/O comments
Yes
Yes
Line comments
Yes
Yes
Memory display
Yes
Yes
Program transfer
I/O Monitor Operations
Operation
Force Set/Reset
MONITOR
Yes
PROGRAM
Yes
Basic Screen Function Keys
Function
MONITOR
PROGRAM
Release
Yes
Yes
Set value
No
No
Stop
Yes
Yes
Function Keys for Monitoring I/O
Function
MONITOR mode
PROGRAM mode
HEX:A
Yes
Yes
Release
No
No
Forced Release
No
No
Clear
Yes
Yes
Change
Yes
Yes
Stop
Yes
Yes
Note When checking TIM and TIMH(15) instructions with the ladder diagram monitor
operation while in MONITOR mode, the observed timing might be longer than
expected.
!" # "!
/ ! !8 " ! 4: !" 6! !!": ! 6!
: '02 ' " !8 2 (4 12 '/2( 1 ! / '! 56! / '02 ( / " '02 / ; ' .
.
7
)
5-1
Section 5-2
Operation in RUN and MONITOR Modes
In RUN mode, the overseeing processes, program execution, and I/O refresh
are repeated cyclically, as shown on the left below.
MONITOR mode processing is identical to RUN mode processing, but Programming Device servicing is performed after program execution, as shown in the
flowchart on the right below. The processing time in MONITOR mode is much
longer than that in RUN mode, because of the Programming Device servicing.
MONITOR Mode
Initialization
Overseeing
processes
Overseeing
processes
Program
execution
Ladder Program I/O Unit scan
Initialization
Program
execution
Programming
Device
servicing
I/O refresh
Ladder Program I/O Unit scan
RUN Mode
I/O refresh
Note In MONITOR mode, data is transferred between the Ladder Program I/O Unit
and the Programming Device during Programming Device servicing. The time
required for Programming Device servicing varies depending on the processes
performed, but the minimum time required is 20 ms.
5-2
Scan Time
It is important to know the scan time of the Unit in order to determine whether or
not the program is operating correctly and to determine if I/O processing is timed
properly.
The explanation below is for the scan time in RUN mode. The scan time will vary
depending on the setting of pin 2 of the back panel DIP switch.
%
" *+ )
Section 5-3
Pin 2 ON (WRIT(87)/READ(88) Operation)
Data is transferred to and from the PC using the I/O WRITE/READ
(WRIT(87)/READ(88)) instructions.
Pin 2 OFF (Normal I/O Operation)
Data is transferred to and from the PC through 2 words allocated for I/O.
Process
Content
Time requirements
Overseeing Watchdog timer set; indicators set, etc. 177 s
Program
execution
Program executed.
I/O refresh
Pin 2 ON
Input refresh
WRIT(87)
execution (see
Note 2 below)
Clock read/store
READ(88)
execution (see
Note 2 below)
Output refresh
Total execution time for all
instructions varies with program size, the instructions
used, and execution conditions. Refer to Instruction
Execution Times for details.
Pin 2 OFF
Input refresh
Clock read/store
Output refresh
Varies with the method of
data transfer to/from the PC.
Input refresh:
47.50 s
WRIT(87):
1.361 ms
Clock read/store: 192.50 s
READ(88):
753.75 s
Output refresh: 35.00 s
Scan time = Overseeing time + Program execution time + I/O refresh time
Note
1. The method of data transfer between the Unit and the PC is determined by
the setting of pin 2 of the back panel DIP switch.
The scan time is longer when pin 2 is ON, because of the time required to
execute WRIT(87) and READ(88), but these instructions allow a large
amount of data to be transferred all at once.
2. When WRIT(87) is executed during the I/O refresh, the data written from the
PC is stored in DM 064 through DM 095 in the Unit.
When READ(88) is executed, the data stored in DM 096 through DM 127 in
the Unit is transferred to the PC.
3. The processing times given for the execution of WRIT(87) and READ(88)
are the times required for the transfer of the maximum 32 words of data.
Long Scan Times
Scan time (ms)
Possible adverse affects
10 or greater
TIMH(15) inaccurate
100 or greater
A watchdog timer error occurs, operation stops, and the Unit
is automatically switched to PROGRAM mode.
Note If the scan time exceeds 100 ms, operation of the Unit is stopped and the Unit is
automatically switched to PROGRAM mode. It is necessary to recheck the program at this point.
5-3
Instruction Execution Times
This following table lists the execution times for all instructions that are available
for the Ladder Program I/O Unit. The maximum and minimum execution times
and the conditions which cause them are given where relevant. When “word” is
referred to in the Conditions column, it implies the content of PC I/O bits, external
I/O bits, or work bits.
$
" *+ )
Section 5-3
Execution times for instructions depend on whether they are executed with an
ON or an OFF execution condition. The OFF execution time for an instruction
can also vary depending on the circumstances, i.e., whether it is in an interlocked program section and the execution condition for IL is OFF or whether it is
reset by an OFF execution condition. “When interlocked” and “When reset” are
used to indicate these two times.
No. of
bytes
LD
8
------
6.875
5.625
LD NOT
8
------
6.875
5.625
AND
7
------
6.250
5.000
AND NOT
7
------
6.250
5.000
OR
7
------
6.250
5.000
OR NOT
7
------
6.250
5.000
AND LD
5
------
2.500
3.750
OR LD
5
------
3.750
2.500
OUT
14
------
11.250
6.875
OUT NOT
14
------
6.875
11.250
TIM
6
126.875
When reset
When interlocked
Min: Constant for SV
112.500
145.000
Max: Word for SV
148.750
CNT
Conditions
OFF execution time (µs)*
Top: Min.; Bottom: Max.
Instruction
6
ON execution time
(µs)* Top: Min.;
Bottom: Max.
111.875
When reset
When interlocked
Min: Constant for SV
105.625
60.000
Max: Word for SV
140.000
NOP(00)
1
------
0.625
--
END(01)
6
------
1.875
--
IL(02)
5
------
2.500
3.750
ILC(03)
2
------
1.250
1.250
JMP(04)
3
------
15.625
24.375
JME(05)
3
Min: JMP(04) is not executed.
12.500
------
Max: JMP(04) is executed.
48.750
SFT(10)
6
100.625
Min: With 1-word shift register
KEEP(11)
17
CNTR(12)
6
DIFD(14)
/
6
6
When interlocked
71.875
13.125
Max: With 10-word shift register
230.000
145.000
------
13.750
2.500
139.375
When reset
When interlocked
105.000
56.875
With no
OFF to ON
transition
When interlocked
69.375
47.500
With no ON
to OFF
transition
When interlocked
71.250
49.375
Min: Constant for SV
DIFU(13)
When reset
Max: Word for SV
221.875
------
61.250
------
63.250
" *+ )
Instruction
No. of
bytes
TIMH(15)
6
WSFT(16)
CMP(20)
MOV(21)
MVN(22)
BIN(23)
BCD(24)
ASL(25)
ASR(26)
ROL(27)
ROR(28)
COM(29)
ADD(30)
SUB(31)
ANDW(34)
ORW(35)
XORW(36)
XNRW(37)
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
Section 5-3
Conditions
ON execution time
(µs)* Top: Min.;
Bottom: Max.
128.125
OFF execution time (µs)*
Top: Min.; Bottom: Max.
When reset
When interlocked
Min: Constant for SV
113.750
146.250
Max: Word for SV
150.000
Min: When shifting 1 word
110.000
When reset
When interlocked
Max: When shifting 128 words
using DM
1.511 ms
29.375
26.875
Min: When comparing a constant
to a word
98.750
When reset
When interlocked
Max: When comparing two TC
195.625
29.375
26.875
Min: When transferring a constant 86.875
to a word
When reset
When interlocked
Max: When transferring TC to DM
29.375
26.875
Min: When transferring a constant 88.125
to a word
When reset
When interlocked
Max: When transferring TC to DM
29.375
26.875
Min: When converting a word to a 116.875
word
When reset
When interlocked
Max: When converting TC to DM
29.375
26.875
Min: When converting a word to a 110.000
word
When reset
When interlocked
Max: When converting TC to DM
149.375
29.375
26.875
Min: When shifting a word
85.625
When reset
When interlocked
Max: When shifting DM
89.375
29.375
26.875
Min: When shifting a word
85.625
When reset
When interlocked
Max: When shifting DM
89.375
29.375
26.875
Min: When rotating a word
93.750
When reset
When interlocked
Max: When rotating DM
97.500
29.375
26.875
Min: When rotating a word
93.750
When reset
When interlocked
Max: When rotating DM
97.500
29.375
26.875
Min: When inverting a word
78.125
When reset
When interlocked
Max: When inverting DM
81.875
29.375
26.875
Min: Constant + word to word
211.875
When reset
When interlocked
Max: TC + TC to DM
291.875
29.375
26.875
Min: Constant -- word to word
217.500
When reset
When interlocked
Max: TC -- TC to DM
297.500
29.375
26.875
Min: Constant AND word to word
123.125
When reset
When interlocked
Max: TC AND TC to DM
231.250
29.375
26.875
Min: Constant OR word to word
123.125
When reset
When interlocked
Max: TC OR TC to DM
231.250
29.375
26.875
Min: Constant XOR word to word
123.125
When reset
When interlocked
Max: TC XOR TC to DM
231.250
29.375
26.875
Min: Constant XNOR word to
word
124.375
When reset
When interlocked
Max: TC XNOR TC to DM
232.500
29.375
26.875
148.125
149.375
136.250
,
",- # )
Instruction
No. of
bytes
INC(38)
10
Section 5-4
Conditions
ON execution time
(µs)* Top: Min.;
Bottom: Max.
OFF execution time (µs)*
Top: Min.; Bottom: Max.
Min: When incrementing a word
112.500
When reset
When interlocked
Max: When incrementing DM
116.250
29.375
26.875
Min: When decrementing a word
125.625
When reset
When interlocked
26.875
DEC(39)
10
Max: When decrementing DM
129.375
29.375
STC(40)
9
------
9.375
5.000
CLC(41)
9
------
9.375
5.000
SLD(74)
10
Min: When shifting 1 word
75.000
When reset
When interlocked
Max: When shifting 128 DM words 5.276 ms
29.375
26.875
Min: When shifting 1 word
When reset
When interlocked
Max: When shifting 128 DM words 5.274 ms
29.375
26.875
Min: When decoding a word to a
word
228.125
When reset
When interlocked
Max: When decoding TC to DM
495.000
29.375
26.875
Min: When encoding a word to a
word
300.625
When reset
When interlocked
Max: When encoding TC to DM
718.750
29.375
26.875
SRD(75)
10
MLPX(76)
DMPX(77)
5-4
10
10
73.750
I/O Response Time
The Ladder Program I/O Unit reads input signals during the I/O refresh period,
and then executes the program. The results from the program execution are
then output at the next I/O refresh. The I/O response time thus depends upon the
scan time, input ON delay, and output ON delay. Normally, only those
high-speed inputs that occur during the I/O refresh are read.
When the high-speed inputs (I/O bits 0200 through 0207) are activated by turning on pins 3 and 4 of the back panel DIP switch, high-speed inputs that occur
during the I/O refresh can also be read.
An explanation of normal I/O timing and high-speed input timing follows.
0
",- # )
Section 5-4
5-4-1 Normal I/O Timing
Minimum I/O Response Time The Unit responds most quickly when it receives an input signal just prior to I/O
the refresh.
Minimum I/O response time = input ON delay + scan time + output ON delay
I/O refresh
Scan time
Scan time
The Unit
ON
Input
signal
OFF
Input ON delay
ON
OFF
Output ON delay
Unit reads
input signal
ON
Output
signal
OFF
Minimum I/O response time
Maximum I/O Response Time The Unit takes the longest to respond when it receives an input signal just after
the I/O refresh.
Maximum I/O response time =
input ON delay + (scan time x 2) + output ON delay
I/O refresh
Scan time
Scan time
The Unit
ON
Input
signal
OFF
Input ON delay
ON
OFF
Output
signal
ON
I/O refresh
Output
ON delay
OFF
Maximum I/O response time
",- # )
Section 5-4
5-4-2 High-speed Inputs
High-speed inputs can be used by turning on pin 3 and/or pin 4 on the back panel
DIP switch. Pin 3 enables high-speed inputs on IR 0200 through IR 0203; pin 4
on IR 0204 through IR 0207. When high-speed inputs are enabled, any pulse of
0.5 ms or longer will be acknowledged regardless of when it occurs, as shown
below. The numbers in the following diagrams indicate processing as follows:
1, 2, 3...
1. When a pulse is received that is 0.5 ms or longer, the high-speed input buffer
is turned ON. The ON status is maintained until the next refresh period regardless of whether or not the input remains ON.
2. When the next I/O refresh period is reached, the bit status is read from the
high-speed input buffer to the input bit.
3. If the input is OFF during the I/O refresh period, the high-speed input buffer
is turned OFF after status has been read. If the input is still ON, the
high-speed input buffer remains ON at least until the next I/O refresh period.
4. Because the high-speed input buffer is reset if the input is OFF after reading
status, the input bit is reset during the next I/O refresh period (unless the input has again come ON to activate the high-speed input buffer).
High-speed Inputs Between I/O Refresh Periods
I/O refresh
Scan time
Scan time
Scan time
The Unit
ON
Input bit
a: Less than 0.5 ms
x: 0.5 ms
b: 0.5 ms or longer
OFF
(2)
x
ON
High-speed
input buffer
OFF
(4)
(1)
b
a
ON
High-speed
input
OFF
(3)
High-speed Input Continuing after I/O Refresh Period
I/O refresh
Scan time
Scan time
Scan time
The Unit
ON
Input bit
x: 0.5 ms
b: 0.5 ms or longer
OFF
(2)
(2)
x
(4)
ON
(1)
High-speed
input buffer OFF
(3)
b
ON
High-speed
OFF
input
(3)
%
& '()!
/ ! 3 ! 8 4 ! 8" / ! "! 4 " 3
$
$
5 1 /8" 1! $
-
* ( ).
6-1
Error Messages and Troubleshooting
Error
Possible Cause
Indicators do not light
Indicator 4 lights during PROGRAM or
MONITOR when SW 3 is set to 0
(GPC/FIT/LSS connection error)
Indicator 4 lights during RUN or
MONITOR mode when SW 3 is set to
0 (operation continues)
Correction
PC power is OFF
Apply power to PC
Unit is not mounted securely
Mount Unit and tighten mounting
screws
GPC/FIT/LSS power is OFF
Apply power to the GPC/FIT/LSS
Cable to GPC/FIT/LSS is
disconnected
Reconnect the cable properly and
secure with screws
Broken cable or poor contact to
GPC/FIT/LSS
Repair or replace the cable
JMP(04) and JME(05) are not used in
pairs
Rewrite the program to use JMP(04)
and JME(05) in pairs
Clock data read error
Reset clock data in PROGRAM mode
If an error occurs that stops the Unit, the indicator indicated in the following table
will flash regardless of the setting of SW 3. Possible errors vary depending on
which indicator flashes.
Fatal Errors
Indicator
0
Section 6-1
Error
Possible Cause
Correction
Incorrect RAM (verified when
power is connected or at reset
time)
Failed RAM
Replace Unit
Incorrect EEPROM write
Unable to write program to Unit
Replace Unit
Pin 1, 6, 7, or 8 set incorrectly
Pin 1, 6, 7, or 8 set to ON
Turn OFF pins 1, 6, 7, and 8
1
Program error
Program within Unit has been
corrupted
Rewrite program. If error persists,
replace Unit. Transfer data to the
entire user program area. If
transmission is interrupted after
sending END(01), the write will be
invalid; always write completely to
end of program memory area.
2
No END instruction
END(01) is missing in program
Insert END(01) and retransfer the
program
3
Clock data write error
Incorrect clock data written to
DM 60 DM to 63
Write correct clock data
4
Program conversion error
Program contains an instruction
which cannot be used in the Unit
Review program
Program is too long and cannot
be written to the Unit
5
Too many jumps
Program contains 10 or more
JMP(04) instructions
Reduce jumps to 9 or less
6
Too many DIFU(13)/DIFD(14)s
Program contains 17 or more
DIFU(13)/DIFD(14)s
Reduce DIFU(13)/DIFD(14)s to
16 or less
7
CPU error
Watchdog timer error has
occurred
Review and correct program to
limit scan time to 100 ms
maximum
(
6-2
Section 6-2
Maintenance
Stand-by Unit
It is recommended to keep a stand-by Unit on hand at all times.
Fuse Replacement
The Ladder Program I/O Unit uses two fuses; one for each eight outputs. Replace blown fuses, after eliminating the cause, with fuses of the following specifications:
125 V, 2 A (5.2 mm dia. x 20 mm)
Replace fuses according to the following procedure.
1, 2, 3... 1.
2.
3.
4.
5.
6.
7.
Disconnect the PC power supply.
Remove input and output connectors.
Remove the Unit from the Backplane.
Remove the 8 cover mounting screws (4 on each side).
Remove the cover and circuit boards.
Replace the fuses.
To re-assemble, reverse the above procedure.
Circuit board
Circuit board
Back cover
Back
cover
mounting
screws
(8 pcs.)
Circuit
board
mounting
screws
(4 pcs.)
Fuse
Appendix A
Standard Models
Product Name
Ladder Program I/O Unit
GPC
C500-LDP01-V1
Main unit
3G2C5-GPC03-E/3G2C5-GPC04-E
System Memory Cassette
C500-MP303-EV2
FIT
LSS
Model No.
FIT10-SET11-E
3 1/2” FD 720 KB (4 floppy disks)
C500-SF312-EV2
5 1/4” FD 360 KB (8 floppy disks)
C500-SF711-EV2
$
Appendix B
Specifications
Item
Specification
Words allocated in the PC
2 words
The I/O WRITE and I/O READ (WRIT(87)/READ(88)) instructions can be used
when enabled via a switch setting.
Control method
Stored program
Main control element
MPU, C-MOS
Programming
Ladder diagram
Instruction Length
1 to 17 bytes/instruction
Instructions
49 (basic instruction: 12/advanced instruction: 37)
Processing time
Typically 7 s/step
Program memory
EEPROM 4 Kbytes
Program length
Approximately 524 addresses (variable depending on instructions used)
I/O bits
64
16 PC output bits (0000 to 0015)
16 PC input bits (0100 to 0115)
16 external input bits (0200 to 0215)
16 external output bits (0300 to 0315)
External I/O bits 0200 to 0207 can be set as high-speed inputs in 2 groups of 4
each.
Work bits
136 total (0400 to 1207)
Timers/counters
16 total
Timer: 0 to 999.9 s, accuracy +0/--0.1 s
TC 00 to TC 15
Counter: 0 to 9999 counts
TR bits
8 total (TR 0 to TR 7)
SR flags and bits
16 total (1208 to 1307)
Data memory
128 words (DM 000 through DM 127)
DM 060 through DM 063 are allocated for clock data.
DM 064 through DM 127 are dedicated to the I/O WRITE/READ
(WRIT(87)/READ(88)) instructions when they are enabled.
Power failure back-up functions
When power fails, the I/O bits, work bits, timers, counters, and the DM area will be
cleared. The clock is backed up by a capacitor for approximately 10 days. Clock
data is stored in the DM area from DM 60 to DM 63 when power is supplied.
Block transfer capacity (via
WRIT(87)/READ(88))
Read/write area: 32 words
This function can be enabled or disabled with a switch setting.
Diagnostic functions
CPU error (watchdog timer)
Memory error, etc.
Program Check
No END instruction
JMP--JME error
Too many DIFU/DIFD
Internal current consumption
Maximum 800 mA 5 VDC
Weight
Maximum 600 g
External dimensions (mm)
34.5 x 250 x 93 mm (WxHxD)
,
Appendix B
External Input/Output Specifications
DC inputs
Item
Specification
+10%/
--15%
Input voltage
24 VDC
Input impedance
3.3 k
Input current
7 mA typical (at 24 VDC)
ON voltage
Minimum 16.0 VDC
OFF voltage
Maximum 5.0 VDC
ON response time
Maximum 0.5 ms
OFF response time
Maximum 0.5 ms
Number of circuits
16 points (8/common, 2 circuits)
High-speed input
8 (input bits 0200 to 0207 when pins 3 and 4 of the DIP switch are set to ON)
0.5 ms minimum pulse width
"
Circuit configuration
0.047F
IN 00
to
3.3K
470
Internal circuit
COM
1
IN 07
470
0.047F
COM
2
3.3K
IN 08
to
IN 15
Wiring diagram
NC
NC
NC
COM2
15
14
13
24
VDC
+
12
11
10
09
08
0
B
A
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
NC
NC
NC
COM1
07
06
05
04
03
02
01
00
+
24
VDC
Appendix B
Transistor Output
Item
Specification
Maximum switching capacity
16 mA/4.5 VDC to 100 mA/26.4 VDC
Current leakage
Maximum 0.1 mA
Residual voltage
Maximum 0.4 V
ON response time
Maximum 0.2 ms
OFF response time
Maximum 0.3 ms
Number of circuits
16 points (8/common, 2 circuits)
Fuse
2 A, 125 V (5.2 mm (dia.) x 20 mm) GG92
External power supply
4.5 to 26.4 VDC, minimum 50 mA
Circuit configuration
4.5 to
26.4 VDC
Internal circuit
10K
OUT 00
to
OUT07
COM 1
2A
fuse
12K
4.5 to
26.4 VDC
10K
OUT 08
to
OUT 15
COM 2
2A
fuse
12K
Wiring diagram
NC
NC
4.5 to 26.4 VDC
COM2
L
L
L
4.5 to
26.4 VDC
L
+
L
L
L
L
15
14
13
12
11
10
09
08
B
A
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
NC
NC
4.5 to 26.4 VDC
COM1
07
06
05
04
03
02
01
00
L
L
L
L
L
+
4.5 to
26.4 VDC
L
L
L
Appendix B
Maximum Switching Capacity of Transistor Outputs
The maximum switching capacity of transistor outputs, relative to the voltage of external output power supply,
is shown below.
Maximum switching capacity (mA)
Special characteristics between maximum
switching capacity and power supply voltage
150
100
50
16
0
4.5
10
20.4
26.4 30
External power supply voltage (V)
I/O Connectors
During assembly, connect external inputs and outputs using the connectors included.
Although I/O connectors are identical in shape, the connections differ. Be certain to follow the labels when
connecting.
Connectors on the Unit (Fujitsu)
FCN-365P024-AU
(1) FCN-361J024-AU (soldered)
FCN-360C024-B (connected cover)
2 pieces
(2) FCN-363J024 (solderless housing)
FCN-363J-AU (contact)
FCN-360C024-B (Connector cover)
2 sets each
(3) FCN-367J024-AU/F (pressure welded)
2 pieces
OMRON Connectors (OMRON supplies each as a set)
C500-CE241 (soldered)
C500-CE242 (solderless crimp type)
C500-CE243 (pressure-welded)
Appendix C
Programming Instructions
A PC instruction is input either by inputting the corresponding Programming Device key(s) (e.g., LD, AND,
OR, NOT) or by using function codes. To input an instruction via its function code, press FUN, the function
code, and then WRITE.
Function Code
Name
Mnemonic
No. of bytes
----
AND
AND
7
----
AND LOAD
AND LD
5
----
AND NOT
AND NOT
7
----
COUNTER
CNT
6
----
LOAD
LD
8
----
LOAD NOT
LD NOT
8
----
OR
OR
7
----
OR NOT
OR NOT
7
----
OR LOAD
OR LD
5
----
OUTPUT
OUT
14
----
OUTPUT NOT
OUT NOT
14
----
TIMER
TIM
6
00
NO OPERATION
NOP
1
01
END
END
6
02
INTERLOCK
IL
5
03
INTERLOCK CLEAR
ILC
2
04
JUMP
JMP
3
05
JUMP END
JME
3
10
SHIFT REGISTER
SFT
6
11
KEEP
KEEP
17
12
REVERSIBLE COUNTER
CNTR
6
13
DIFFERENTIATE UP
DIFU
6
14
DIFFERENTIATE DOWN
DIFD
6
15
HIGH-SPEED TIMER
TIMH
6
16
WORD SHIFT
WSFT
10
20
COMPARE
CMP
10
21
MOVE
MOV
10
22
MOVE NOT
MVN
10
23
BCD-TO-BINARY
BIN
10
24
BINARY-TO-BCD
BCD
10
25
ARITHMETIC SHIFT LEFT
ASL
10
26
ARITHMETIC SHIFT RIGHT
ASR
10
27
ROTATE LEFT
ROL
10
28
ROTATE RIGHT
ROR
10
29
COMPLEMENT
COM
10
30
BCD ADD
ADD
10
31
BCD SUBTRACT
SUB
10
34
AND WORD
ANDW
10
"
Appendix C
Function Code
Name
Mnemonic
No. of bytes
35
OR WORD
ORW
10
36
EXCLUSIVE OR
XORW
10
37
EXCLUSIVE NOR
XNRW
10
38
INCREMENT
INC
10
39
DECREMENT
DEC
10
40
SET CARRY
STC
9
41
CLEAR CARRY
CLC
9
74
ONE DIGIT SHIFT LEFT
SLD
10
75
ONE DIGIT SHIFT RIGHT
SRD
10
76
4-TO-16 DECODER
MLPX
10
77
16-TO-4 ENCODER
DMPX
10
Applicable Data Areas
The following table shows the addresses that can be used in each data area when programming. These are listed
in the instruction tables by area. Any word/bit in the applicable areas can be designated as long as the end of the
area is not exceeded, i.e., if two words are required for an operand, the last word in an area cannot be designated.
In this respect, the IR, work bit, and SR area are considered as one consecutive area. Refer to the C500 Operation
Manual for details. Indirect addressing is not possible for the Ladder Program I/O Unit.
Prefix
None (indicated with IR prefix)
Item
Word address
Bit address
PC output bits
IR 00
IR 0000 to IR 0015
PC input bits
IR 01
IR 0100 to IR 0115
External input bits
IR 02
IR 0200 to IR 0215
External output bits
IR 03
IR 0300 to IR 0315
None
Work bits
04 to 12
0400 to 1207
None (indicated with SR prefix)
SR bits
12 to 13
SR 1208 to SR 1307
TR
Temporary bits
------
TR 0 to TR 7
TIM/CNT (indicated as TC)
Timer/counter numbers
TC 00 to TC 15 (PV)
TC 00 to TC 15 (defining
or Completion Flag)
DM
Data memory
DM 000 to DM 127
------
#
Constants
#0000 to 9999
#0000 to FFFF
------
Note Data transferred by WRIT(87) and READ(88) instructions is stored in DM 064 through DM 127 when pin 2 of
the back panel DIP switch is turned ON. If data will be transferred by the WRIT(87) and READ(88) instructions, DM 064 through DM 095 should be treated as read-only in the program. Refer to 3-6 DM Area for
details on the use of DM 060 through DM 127.
"
Appendix C
Instruction Tables
The following tables list all of the ladder diagram programming instructions for the Ladder Program I/O Unit. These
are all the same as corresponding instructions for the C500, except that data areas differ and not all C500 instructions are supported (see table at the end of this appendix). Refer to the C500 Operation Manual for details.
Basic Instructions
Name and
Mnemonic
Symbol
LOAD
LD
B
LOAD NOT
LD NOT
B
AND
AND
B
AND NOT
AND NOT
B
OR
OR
B
OR NOT
OR NOT
B
AND LOAD
AND LD
Function
Operand Data Areas
Defines the status of bit B as the execution B:
condition for subsequent operations in the IR
SR
instruction line.
Work bits
TC
TR
Defines the status of the inverse of bit B as the B:
execution condition for subsequent operations IR
SR
in the instruction line.
Work bits
TC
Logically ANDs the status of the designated bit B:
IR
with the current execution condition.
SR
Work bits
TC
Logically ANDs the inverse of the designated bit B:
with the current execution condition.
IR
SR
Work bits
TC
Logically ORs the status of the designated bit B:
with the current execution condition.
IR
SR
Work bits
TC
Logically ORs the inverse of the designated bit B:
with the execution condition.
IR
SR
Work bits
TC
Logically ANDs the resultant execution None
conditions of the preceding logic blocks.
"
Name and
Mnemonic
Appendix C
Symbol
Function
Operand Data Areas
OR LOAD
OR LD
Logically ORs the resultant execution conditions None
of the preceding logic blocks.
OUTPUT
OUT
Turns ON B for an ON execution condition; turns B:
IR (except IR 00 and IR 02)
OFF B for an OFF execution condition.
Work bits
TR
B
OUTPUT NOT
OUT NOT
Turns OFF B for an ON execution condition; B:
IR (except IR 00 and IR 02)
turns ON B for an OFF execution condition.
Work bits
B
COUNTER
CNT
CP
R
CNT N
A decrementing counter. SV: 0 to 9999; CP: N:
count pulse; R: reset input. The TC bit is entered TC
as a constant.
SV:
IR
SR
Work bits
#
ON-delay (decrementing) timer operation. Set N:
value: 000.0 to 999.9 s. The same TC bit cannot TC
be assigned to more than one timer/counter. The
TC bit is entered as a constant.
SV:
IR
SR
Work bits
#
SV
TIMER
TIM
TIM N
SV
Special Instructions
Name
Mnemonic
Symbol
NO OPERATION
NOP(00)
Function
Operand Data Areas
Nothing is executed and program None
operation moves to the next instruction.
None
END
END(01)
%
END(01)
Required at the end of each program. None
Instructions located after END(01) will not
be executed.
"
Name
Mnemonic
Appendix C
Symbol
INTERLOCK
IL(02)
INTERLOCK
CLEAR
ILC(03)
Function
IL(02)
ILC(03)
JUMP
JMP(04)
JUMP END
JME(05)
JMP(04)
Operand Data Areas
If an interlock condition is OFF, all outputs None
and all timer PVs between the current
IL(02) and the next ILC(03) are turned OFF
or reset, respectively. Other instructions
are treated as NOP. Counter PVs are
maintained. If the execution condition is
ON, execution continues normally.
When the execution condition for the None
JMP(04) instruction is ON, all instructions
between JMP(04) and the next JME(05)
are ignored or treated as NOP(00)
JME(05)
SHIFT REGISTER
SFT(10)
I
P
R
SFT(10)
St
E
Creates a bit shift register for data from the St/E:
starting word (St) through to the ending IR (except IR00 and IR02)
word (E). I: input bit; P: shift pulse; R: reset Work bits (except word 12)
input. St must be less than or equal to E. St
and E must be in the same data area.
15
00
E
KEEP
KEEP(11)
S
KEEP(11)
R
REVERSIBLE
COUNTER
CNTR (12)
R
DIFFERENTIATE
UP
DIFU(13)
DIFFERENTIATE
DOWN
DIFD(14)
HIGH-SPEED
TIMER
TIMH(15)
00
St
IN
Defines a bit (B) as a latch, controlled by B:
IR (except IR00 and IR02)
the set (S) and reset (R) inputs.
Work bits
B
II
DI
15
CNTR(12)
N
SV
DIFU(13) B
DIFD(14) B
TIMH(15) N
SV
WORD SHIFT
WSFT(16)
WSFT(16)
St
E
Increases or decreases the PV by one N:
whenever the increment input (II) or TC
decrement input (DI) signals, respectively,
go from OFF to ON. SV: 0 to 9999; R: reset
input. Each TC bit can be used for one
timer/counter only. The TC bit is entered as
a constant.
SV:
IR
SR
Work bits
#
DIFU(13) turns ON the designated bit (B) B:
for one scan on reception of the leading IR (except IR00 and IR02)
(rising) edge of the input signal; DIFD(14) Work bits
turns ON the bit for one scan on reception
of the trailing (falling) edge. A maximum of
16 DIFFERENTIATE UP/DOWN instructions can be used
A high-speed, ON-delay (decrementing) N:
timer. SV: 00.02 to 99.99 s. Each TC bit can TC
be assigned to only one timer or counter.
The TC bit is entered as a constant.
SV:
IR
SR
Work bits
#
The data in the words from the starting St/E:
word (St) through to the ending word (E), is IR
shifted left in word units, writing all zeros Work bits (except word 12)
into the starting word. St must be less than
or equal to E, and St and E must be in the
same data area.
$
"
Name
Mnemonic
Appendix C
Symbol
COMPARE
CMP(20)
CMP(20)
Cp1
Cp2
MOVE
MOV(21)
Compares the data in two 4-digit Cp1/Cp2:
hexadecimal words (Cp1 and Cp2) and IR
outputs result to the GR, EQ, or LE Flags. SR
Work bits
TC
DM
#
MOV(21)
S
D
D:
IR
Work bits (except word 12)
DM
MVN(22)
S
D
Transfers the inverse of the data in the S:
IR
source word (S) to destination word (D).
SR
Work
bits
TC
DM
#
D:
IR
Work bits (except word 12)
DM
BIN(23)
S
R
Converts 4-digit, BCD data in source word S:
(S) into 16-bit binary data, and outputs IR
SR
converted data to result word (R).
Work
bits
TC
S
R
DM
(BCD)
(BIN)
R:
IR
Work bits (except word 12)
DM
BCD TO BINARY
BIN(23)
BINARY TO BCD
BCD(24)
BCD(24)
S
R
ASL(25)
Wd
x100
x160
x101
x161
x102
x162
x103
x163
Converts binary data in source word (S) S:
into BCD, and outputs converted data to IR
SR
result word (R).
Work
bits
S
R
DM
(BCD)
(BIN)
x160
x100
x161
x101
x162
x102
x163
x103
R:
IR
Work bits (except word 12)
DM
Each bit within a single word of data (Wd) Wd:
is shifted one bit to the left, with zero written IR
Work bits (except word 12)
to bit 00 and bit 15 moving to CY.
DM
15
CY
/
Operand Data Areas
Transfers data from source word, (S) to S:
destination word (D).
IR
SR
Work
bits
TC
DM
#
MOVE NOT
MVN(22)
ARITHMETIC
SHIFT LEFT
ASL(25)
Function
00
Wd
0
"
Name
Mnemonic
ARITHMETIC
SHIFT RIGHT
ASR(26)
Appendix C
Symbol
ASR(26)
Wd
Function
Each bit within a single word of data (Wd) Wd:
is shifted one bit to the right, with zero IR
written to bit 15 and bit 00 moving to CY. Work bits (except word 12)
DM
15
0
ROTATE LEFT
ROL(27)
ROL(27)
Wd
00
Wd
ROR(28)
Wd
15
COM(29)
Wd
BCD ADD
ADD(30)
BCD SUBTRACT
SUB(31)
ADD(30)
Au
Ad
R
SUB(31)
Mi
Su
R
AND WORD
ANDW(34)
ANDW(34)
I1
I2
R
OR WORD
ORW(35)
ORW(35)
I1
I2
R
Wd:
IR
Work bits (except word 12)
DM
00
CY
Each bit within a single word of data (Wd)
is moved one bit to the right, with bit 00
moving to carry (CY), and CY moving to bit
15.
15
CY
COMPLEMENT
COM(29)
CY
Each bit within a single word of data (Wd)
is moved one bit to the left, with bit 15
moving to carry (CY), and CY moving to bit
00.
Wd
ROTATE RIGHT
ROR(28)
Operand Data Areas
00
Wd:
IR
Work bits (except word 12)
DM
Wd
Inverts bit status of one word (Wd) of data, Wd:
IR
changing 0s to 1s, and vice versa.
Work bits (except word 12)
DM
Wd
Wd
Adds two 4-digit BCD values (Au and Ad) Au/Ad:
and content of CY, and outputs the result to IR
SR
the specified result word (R).
Work
bits
Au + Ad +
CY
R CY
TC
DM
#
R:
IR
Work bits (except word 12)
DM
Subtracts both the 4-digit BCD subtrahend
(Su) and content of CY, from the 4-digit
BCD minuend (Mi) and outputs the result to
the specified result word (R).
Mi/Su:
IR
SR
Work
bits
TC
DM
#
R:
IR
Work bits (except word 12)
DM
Logically ANDs two 16-bit input words (I1
and I2) and sets the bits in the result word
(R) if the corresponding bits in the input
words are both ON.
I1/I2:
IR
SR
Work
bits
TC
DM
#
R:
IR
Work bits (except word 12)
DM
Logically ORs two 16-bit input words (I1
and I2) and sets the bits in the result word
(R) when one or both of the corresponding
bits in the input words is/are ON.
I1/I2:
IR
SR
Work
bits
TC
DM
#
R:
IR
Work bits (except word 12)
DM
Mi -- Su -- CY
R CY
,
"
Name
Mnemonic
EXCLUSIVE OR
XORW(36)
EXCLUSIVE NOR
XNRW(37)
Appendix C
Symbol
XORW(36)
I1
I2
R
XNRW(37)
I1
I2
R
INCREMENT
INC(38)
INC(38)
Wd
DECREMENT
DEC(39)
DEC(39)
Wd
SET CARRY
STC(40)
Function
Operand Data Areas
Exclusively ORs two 16-bit input words (I1
and I2) and sets the bits in the result word
(R) when the corresponding bits in input
words differ in status.
I1/I2:
IR
SR
Work
bits
TC
DM
#
R:
IR
Work bits (except word 12)
DM
Exclusively NORs two 16-bit input words
(I1 and I2) and sets the bits in the result
word (R) when the corresponding bits in
both input words have the same status.
I1/I2:
IR
SR
Work
bits
TC
DM
#
R:
IR
Work bits (except word 12)
DM
Increments the value of a 4-digit BCD word Wd:
(Wd) by one, without affecting carry (CY). IR
Work bits (except word 12)
DM
Decrements the value of a 4-digit BCD Wd:
word by 1, without affecting carry (CY).
IR
Work bits (except word 12)
DM
Sets the Carry Flag (i.e., turns CY ON).
None
STC(40)
CLEAR CARRY
CLC(41)
Clears the Carry Flag (i.e, turns CY OFF). None
CLC(41)
ONE DIGIT SHIFT
LEFT
SLD(74)
SLD(74)
St
E
Shifts all data, between the starting word
(St) and ending word (E), one digit (four
bits) to the left, writing zero into the
rightmost digit of the starting word. St and
E must be in the same data area.
St
St + 1
E
0
0
St/E:
IR
Work bits (except word 12)
DM
"
Name
Mnemonic
ONE DIGIT SHIFT
RIGHT
SRD(75)
Appendix C
Symbol
SRD(75)
E
St
Function
Operand Data Areas
Shifts all data, between starting word (St)
and ending word (E), one digit (four bits) to
the right, writing zero into the leftmost digit
of the ending word. St and E must be in the
same data area.
St/E:
IR
Work bits (except word 12)
DM
E
E -- 1
0
4-TO-16
DECODER
MLPX(76)
MLPX(76)
S
Di
R
St
Converts up to four hexadecimal digits in
the source word (S), into decimal values
from 0 to 15, and turns ON the
corresponding bit(s) in the result word(s)
(R). There is one result word for each
converted digit. Digits to be converted are
designated by Di. (The rightmost digit
specifies the first digit. The next digit to the
left gives the number of digits to be
converted minus 1. The two leftmost digits
are not used.)
S
S:
IR
SR
Work
bits
TC
DM
Di:
IR
Work
bits (except
word
12)
TC
DM
#
R:
IR
Work
bits
(except
word
12)
DM
S:
IR
SR
Work
bits
TC
DM
R:
IR
Work
bits (except
word
12)
DM
Di:
IR
Work
bits
(except
word
12)
TC
DM
#
0 to F
R
15
16-TO-4
ENCODER
DMPX(77)
DMPX(77)
S
R
Di
00
Determines the position of the leftmost ON
bit in the source word(s) (starting word: S)
and turns ON the corresponding bit(s) in
the specified digit of the result word (R).
One digit is used for each source word.
Digits to receive the converted values are
designated by Di. (The rightmost digit
specifies the first digit. The next digit to left
gives the number of words to be converted
minus 1. The two leftmost digits are not
used.)
15
00
S
R
0 to F
"
Appendix C
Unsupported Instructions
The following C500 instructions are not supported by the Ladder Programming I/O Unit and will be treated as NOP
if used. WRIT(87) and READ(88) are used internally only and cannot be programmed by the user in the Ladder
Program I/O Unit.
Name
Mnemonic
FAILURE ALARM
FAL(06)
SEVERE FAILURE ALARM
FALS(07)
BCD MULTIPLY
MUL(32)
BCD DIVIDE
DIV(33)
BLOCK TRANSFER
XFER(70)
BLOCK SET
BSET(71)
SQUARE ROOT
ROOT(72)
DATA EXCHANGE
XCHG(73)
7-SEGMENT DECODER
SDEC(78)
FLOATING POINT DIVIDE
FDIV(79)
SINGLE WORD DISTRIBUTE
DIST(80)
DATA COLLECT
COLL(81)
MOVE BIT
MOVB(82)
MOVE DIGIT
MOVD(83)
REVERSIBLE SHIFT REGISTER
SFTR(84)
TABLE COMPARE
TCMP(85)
I/O WRITE
WRIT(87)
I/O READ
READ(88)
NETWORK SEND
SEND(90)
SUBROUTINE START
SBN(92)
WATCHDOG TIMER REFRESH
WDT(94)
I/O REFRESH
IORF(97)
NETWORK RECEIVE
RECV(98)
Appendix D
Error and Arithmetic Flag Operation
The following table shows the instructions that affect the Error (ER), Carry (CY), Greater Than (GT), Equals
(EQ), and Less Than (LT) Flags. Vertical arrows in the table indicate the flags that are turned ON and OFF
according to the result of the instruction. Instructions not shown do not affect any of the flags in the table.
In general, ER indicates that operand data is not within requirements. CY indicates arithmetic or data shift results. GT indicates that a compared value is larger than some standard, LT that it is smaller, and EQ, that it is
the same. The status of these flags is maintained until another instruction that affects the flag is executed.
Although ladder diagram instructions, TIM, TIMH(15), CNT, and CNTR(12) are executed when ER is ON, other instructions with a vertical arrow under the ER column are not executed if ER is ON. All of the other flags in
the following table will also not operate when ER is ON.
The status of these flags cannot be monitored from the Programming Device, because the flags are turned
OFF when the END(01) instruction is executed.
Instructions
1303 (ER)
TIM
1304 (CY)
1305 (GR)
1306 (EQ)
1307 (LE)
Unaffected
Unaffected
Unaffected
Unaffected
OFF
OFF
OFF
OFF
Unaffected
Unaffected
Unaffected
Unaffected
CNT
END(01)
OFF
CNTR(12)
TIMH(15)
CMP(20)
Unaffected
Unaffected
MOV(21)
Unaffected
Unaffected
Unaffected
Unaffected
Unaffected
Unaffected
Unaffected
Unaffected
Unaffected
Unaffected
Unaffected
Unaffected
Unaffected
Unaffected
Unaffected
Unaffected
Unaffected
Unaffected
Unaffected
MVN(22)
BIN(23)
BCD(24)
ASL(25)
Unaffected
ASR(26)
ROL(27)
ROR(28)
COM(29)
Unaffected
Unaffected
ADD(30)
SUB(31)
ANDW(34)
Unaffected
ORW(35)
XORW(36)
XNRW(37)
INC(38)
DEC(39)
STC(40)
Unaffected
ON
Unaffected
Unaffected
Unaffected
CLC(41)
Unaffected
OFF
Unaffected
Unaffected
Unaffected
Unaffected
Unaffected
Unaffected
Unaffected
SLD(74)
SRD(75)
MLPX(76)
DMPX(77)
#
-
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Revision History
A manual revision code appears as a suffix to the catalog number on the front cover of the manual.
Cat. No. W151--E1--3
Revision code
The following table outlines the changes made to the manual during each revision. Page numbers refer to the
previous version.
Revision code
Date
Revised content
1
February 1989
Original production (C500-LDP01)
2
June 1989
Corrections to pages 18, 22 to 26
3
January 1992
Revision for new model (C500-LDP01-V1). For a list of the differences between
the C500-LDP01 and the C500-LDP01-V1 refer to Section 1-3 Comparing the
C500-LDP01 and the C500-LDP01-V1.
%
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