SANYO EN6473A

Ordering number : EN6473A
CMOS IC
LC75878W
1/8 to 1/10 Duty
General-Purpose
LCD Display Driver
Overview
The LC75878W is 1/8 to 1/10 duty general-purpose LCD display driver used for character and graphics display. This
product operates under the control of a microcontroller and can directly drive an LCD with up to 730 segments. It can
also control up to 4 general-purpose output ports.
Features
• 1/8duty–1/4bias, 1/9duty–1/4bias, and 1/10duty–1/4bias drive schemes can be controlled from serial data.
1/8duty–1/4bias: up to 600 segments
1/9duty–1/4bias: up to 666 segments
1/10duty–1/4bias: up to 730 segments
• Serial data input supports CCB format communication with the system controller.
• Serial data control of the power-saving mode based backup function and all the segments forced off function.
• Direct display of display data without the use of a decoder provides high generality.
• Built-in display contrast adjustment circuit.
• Up to 4 general-purpose output ports are included.
• Independent LCD driver block power supply VLCD.
• The INH pin is provided. This pin turns off the display and forces the general-purpose output ports to the low
level.
• RC oscillator circuit
•
•
CCB is a registered trademark of SANYO Electric Co., Ltd.
CCB is SANYO Semiconductor's original bus format. All bus addresses are managed by SANYO
Semiconductor for this format.
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer' s products or
equipment.
O2710HKIM B8-8235/41000RM(OT) No.6473-1/35
LC75878W
Specifications
Absolute Maximum Ratings at Ta = 25°C, VSS = 0V
Parameter
Symbol
Maximum supply voltage
Conditions
Ratings
Unit
VDD max
VDD
-0.3 to +7.0
VLCD max
VLCD
-0.3 to +12.0
VIN1
CE, CL, DI, INH
VIN2
OSC
VIN3
VLCD1, VLCD2, VLCD3, VLCD4
VOUT1
OSC, P1 to P4
VOUT2
VLCD0, S1 to S75, COM1 to COM10
IOUT1
S1 to S75
IOUT2
COM1 to COM10
3
IOUT3
P1 to P4
5
Allowable power dissipation
Pd max
Ta=85°C
Operating temperature
Topr
-40 to +85
°C
Storage temperature
Tstg
-55 to +125
°C
Input voltage
Output voltage
Output current
V
-0.3 to +7.0
V
-0.3 to VDD+0.3
-0.3 to VLCD+0.3
-0.3 to VDD+0.3
V
-0.3 to VLCD+0.3
μA
300
mA
200
mW
Allowable Operating Ranges at Ta = -40 to +85°C, VSS = 0V
Parameter
Supply voltage
Symbol
Ratings
Conditions
min
typ
unit
max
VDD
VDD
2.7
6.0
VLCD
VLCD, When the display contrast adjustment
circuit is used
7.0
11.0
VLCD
VLCD, When the display contrast adjustment
circuit is not used
4.5
11.0
Output voltage
VLCD0
VLCD0
VLCD4
+4.5
VLCD
Input voltage
VLCD1
VLCD1
3/4(VLCD0
-VLCD4)
VLCD0
VLCD2
VLCD2
2/4(VLCD0
-VLCD4)
VLCD0
VLCD3
VLCD3
1/4(VLCD0
-VLCD4)
VLCD0
V
V
V
VLCD4
VLCD4
0
1.5
Input high level voltage
VIH
CE, CL, DI, INH
0.8VDD
6.0
V
Input low level voltage
VIL
CE, CL, DI, INH
0
0.2VDD
V
Recommended external resistance
ROSC
OSC
Recommended external
COSC
OSC
Guaranteed oscillation range
fOSC
OSC
Data setup time
tds
CL, DI
[Figure 2]
160
ns
Data hold time
tdh
CL, DI
[Figure 2]
160
ns
CE wait time
tcp
CE, CL
[Figure 2]
160
ns
CE setup time
tcs
CE, CL
[Figure 2]
160
ns
CE hold time
tch
CE, CL
[Figure 2]
160
ns
High level clock pulse width
tφH
CL
[Figure 2]
160
ns
Low level clock pulse width
tφL
CL
[Figure 2]
160
ns
INH switching time
tc
INH, CE
[Figure 3],[ Figure 4],[ Figure 5]
10
μs
capacitance
25
43
kΩ
680
pF
50
100
kHz
No.6473-2/35
LC75878W
Electrical Characteristics for the Allowable Operating Ranges
Parameter
Symbol
Conditions
Ratings
min
typ
unit
max
Hysteresis
VH
CE, CL, DI, INH
Input high level current
IIH
CE, CL, DI, INH: VI=6.0V
Input low level current
IIL
CE, CL, DI, INH: VI=0V
Output high level voltage
VOH1
S1 to S75: IO=-20μA
VLCD0-0.6
VOH2
COM1 to COM10: IO=-100μA
VLCD0-0.6
VOH3
P1 to P4: IO=-1mA
VOL1
S1 to S75: IO=20μA
VLCD4+0.6
VOL2
COM1 to COM10: IO=100μA
VLCD4+0.6
VOL3
P1 to P4: IO=1mA
VMID1
S1 to S75: IO=±20μA
Output low level voltage
Output middle level voltage
0.1VDD
VMID3
5.0
μA
μA
-5.0
V
VDD-1.0
V
1.0
*1
VMID2
V
COM1 to COM10: IO=±100μA
COM1 to COM10: IO=±100μA
2/4(VLCD0
2/4(VLCD0
-VLCD4)
-VLCD4)
-0.6
+0.6
3/4(VLCD0
3/4(VLCD0
-VLCD4)
-VLCD4)
-0.6
+0.6
1/4(VLCD0
1/4(VLCD0
-VLCD4)
-VLCD4)
-0.6
Oscillator frequency
fOSC
OSC: ROSC=43kΩ, COSC=680pF
Current drain
IDD1
VDD: Power saving mode
IDD2
VDD: VDD=6.0V, Outputs open
fOSC=50kHz
ILCD1
VLCD: Power saving mode
ILCD2
VLCD: VLCD=11.0V
Outputs open
40
fOSC=50kHz
V
+0.6
50
60
kHz
5
200
400
5
500
1000
250
500
When the display contrast adjustment circuit is
μA
used.
ILCD3
VLCD: VLCD=11.0V
Outputs open
fOSC=50kHz
When the display contrast adjustment circuit is
not used.
Note: *1. Excluding the bias voltage generation divider resistor built into VLCD0, VLCD1, VLCD2, VLCD3, and
VLCD4. (See Figure 1.)
VLCD
CONTRAST
ADJUSTER
VLCD0
VLCD1
VLCD2
To the common and segment drivers
VLCD3
VLCD4
Excluding these resistors
Figure 1
No.6473-3/35
LC75878W
1. When CL is stopped at the low level
VIH
CE
VIL
tφH
tφL
VIH
50%
VIL
CL
tcp
tcs
tch
VIH
DI
VIL
tdh
tds
2. When CL is stopped at the high level
VIH
CE
VIL
tφL
t φH
VIH
50%
VIL
CL
tcp
tcs
tch
VIH
VIL
DI
tds
tdh
Figure 2
Package Dimensions
unit:mm (typ)
3181C
16.0
0.5
14.0
51
50
100
26
14.0
76
1
0.5
0.2
25
16.0
75
0.145
(1.4)
0.1
1.6max
(1.0)
SANYO : SQFP100(14X14)
No.6473-4/35
LC75878W
S75/ COM9
S74/ COM10
S73
S72
S71
S70
S69
S68
S67
S66
S65
S64
S63
S62
S61
S60
S59
S58
S57
S56
S55
S54
S53
S52
S51
Pin Assignment
75
COM8
COM7
COM6
COM5
COM4
COM3
COM2
COM1
P1
P2
P3
P4
VDD
VLCD
VLCD0
VLCD1
VLCD2
VLCD3
VLCD4
VSS
OSC
IN H
CE
CL
DI
51
76
50
LC75878W
(SQFP100)
100
26
25
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S11
S12
S13
S14
S15
S16
S17
S18
S19
S20
S21
S22
S23
S24
S25
1
S50
S49
S48
S47
S46
S45
S44
S43
S42
S41
S40
S39
S38
S37
S36
S35
S34
S33
S32
S31
S30
S29
S28
S27
S26
Top view
GENERAL
PORT
OSC
COMMON
DRIVER
S1
S74/COM10
S7 3
S7 5/COM9
COM8
COM1
P4
P1
Block Diagram
SEGMENT DRIVER & LATCH
CLOCK
GENERATOR
CONTROL
REGISTER
VLCD
CONTRAST
ADJUSTER
SHIFT REGISTER
VLCD0
VLCD1
CCB
INTERFACE
VLCD2
VLCD3
CE
CL
DI
INH
VLCD4
VDD
VSS
No.6473-5/35
LC75878W
Pin Functions
Handling
Symbol
Pin No.
Function
Active
I/O
when
unused
S1 to S73
1 to 73
S74/COM10
74
Segment driver outputs.
The S74/COM10 and S75/COM9 pins can be used as common driver outputs under
S75/COM9
75
the control data.
COM1 to
83 to 76
Common driver outputs.
COM8
P1 to P4
84 to 87
OSC
96
General-purpose output ports.
-
O
OPEN
-
O
OPEN
-
O
OPEN
-
I/O
VDD
H
I
Oscillator connection.
An oscillator circuit is formed by connecting an external resistor and capacitor at
this pin.
CE
CL
98
99
DI
100
INH
97
Serial data transfer inputs.
These pins are connected to the microcontroller.
I
CE: Chip enable
CL: Synchronization clock
DI: Transfer data
GND
-
I
L
I
GND
-
O
OPEN
-
I
OPEN
-
I
OPEN
-
I
OPEN
-
I
GND
-
-
-
-
-
-
-
-
-
Input that turns the display off and forces the general-purpose output ports low.
• When INH is low (VSS)
• Display off
S1 to S73 = “L” (VLCD4).
S74/COM10, S75/COM9 = “L” (VLCD4)
COM1 to COM8 = “L” (VLCD4).
• General-purpose output ports P1 to P4 = low (VSS)
• When INH is high (VDD)
• Display on
• The states of the general-purpose output ports can be set by
the PC1 to PC4 control data.
However, serial data can be transferred when the INH pin is low.
VLCD0
90
LCD drive 4/4 bias voltage (high level) supply pin. The level on this pin can be
changed by the display contrast adjustment circuit.
However, (VLCD0 - VLCD4) must be greater than or equal to 4.5V.
Also, external power must not be applied to this pin since the pin circuit includes the
display contrast adjustment circuit.
VLCD1
91
LCD drive 3/4 bias voltage (middle level) supply pin. This pin can be used to supply
the 3/4 (VLCD0 - VLCD4) voltage level externally.
VLCD2
92
LCD drive 2/4 bias voltage (middle level) supply pin. This pin can be used to supply
the 2/4 (VLCD0 - VLCD4) voltage level externally.
VLCD3
93
LCD drive 1/4 bias voltage (middle level) supply pin. This pin can be used to supply
the 1/4 (VLCD0 - VLCD4) voltage level externally.
VLCD4
94
LCD drive 0/4 bias voltage (low level) supply pin. Fine adjustment of the display
contrast can be implemented by connecting an external variable resistor to this pin.
However, (VLCD0 - VLCD4) must be greater than or equal to 4.5V, and VLCD4
must be in the range 0 V to 1.5V, inclusive.
VDD
88
VLCD
89
Logic block power supply connection. Provide a voltage of between 2.7 and 6.0V.
LCD driver block power supply connection. Provide a voltage of between 7.0 and
11.0V when the display contrast adjustment circuit is used and provide a voltage of
between 4.5 and 11.0V when the circuit is not used.
VSS
95
Power supply connection. Connect to ground.
No.6473-6/35
DI
CL
CE
D1
D2
CCB address
8 bits
1 1 0 1 0 0 1 0 D241 D242
B0 B1 B2 B3 A0 A1 A2 A3
CCB address
8 bits
1 1 0 1 0 0 1 0 D121 D122
B0 B1 B2 B3 A0 A1 A2 A3
CCB address
8 bits
1 1 0 1 0 0 1 0
B0 B1 B2 B3 A0 A1 A2 A3
1. 1/8 duty
(1) When CL is stopped at the low level
When the display data is transferred.
Serial Data Transfer Format
Display
data
120 bits
D337 D338 D339 D340 D341 D342 D343 D344 D345 D346 D347 D348 D349 D350 D351 D352 D353 D354 D355 D356 D357 D358 D359 D360 0
Display
data
120 bits
D217 D218 D219 D220 D221 D222 D223 D224 D225 D226 D227 D228 D229 D230 D231 D232 D233 D234 D235 D236 D237 D238 D239 D240 0
Display
data
120 bits
D97 D98 D99 D100 D101 D102 D103 D104 D105 D106 D107 D108 D109 D110 D111 D112 D113 D114 D115 D116 D117 D118 D119 D120 0
0
0
0
Fixed
data
5 bits
0
Fixed
data
5 bits
0
Fixed
data
5 bits
0
0
0
0
0
0
0
0
0
0
DD
3 bits
1
DD
3 bits
0
DD
3 bits
0
0
1
0
LC75878W
No.6473-7/35
1
0
1
0
0
1
0
1
0
1
0
0
1
0
CCB address
8 bits
B0 B1 B2 B3 A0 A1 A2 A3
1
CCB address
8 bits
CL
Control
data
13 bits
0
DD
3 bits
Display
data
120 bits
1
D577 D578 D579 D580 D581 D582 D583 D584 D585 D586 D587 D588 D589 D590 D591 D592 D593 D594 D595 D596 D597 D598 D599 D600 0
Display
data
120 bits
D457 D458 D459 D460 D461 D462 D463 D464 D465 D466 D467 D468 D469 D470 D471 D472 D473 D474 D475 D476 D477 D478 D479 D480 0
PC1 PC2 PC3 PC4 CT0 CT1 CT2 CT3 CTC SC BU DT1 DT2 1
D481 D482
D361 D362
Note: B0 to B3, A0 to A3 ...... CCB address
DD ............................... Direction data
CCB address
8 bits
1 1 0 1 0 0 1 0
B0 B1 B2 B3 A0 A1 A2 A3
When the control data is transferred.
CE
DI
1
B0 B1 B2 B3 A0 A1 A2 A3
0
0
Fixed
data
5 bits
0
Fixed
data
5 bits
0
0
0
0
0
1
0
DD
3 bits
1
DD
3 bits
0
0
1
LC75878W
No.6473-8/35
DI
CL
CE
1
0
1
0
0
1
0
CCB address
8 bits
0
0
1
A3
0
1
1
0
B0 B1 B2 B3 A0 A1 A2
1
0
CCB address
8 bits
1
0
0
A3
1
1
1
0
A3
B0 B1 B2 B3 A0 A1 A2
CCB address
8 bits
B0 B1 B2 B3 A0 A1 A2
1
(2) When CL is stopped at the high level
When the display data is transferred.
D241 D242
D121 D122
D1 D2
Display
data
120 bits
D337 D338 D339 D340 D341 D342 D343 D344 D345 D346 D347 D348 D349 D350 D351 D352 D353 D354 D355 D356 D357 D358 D359 D360 0
Display
data
120 bits
D217 D218 D219 D220 D221 D222 D223 D224 D225 D226 D227 D228 D229 D230 D231 D232 D233 D234 D235 D236 D237 D238 D239 D240 0
Display
data
120 bits
D97 D98 D99 D100 D101 D102 D103 D104 D105 D106 D107 D108 D109 D110 D111 D112 D113 D114 D115 D116 D117 D118 D119 D120 0
0
0
0
0
Fixed
data
5 bits
0
Fixed
data
5 bits
0
0
0
Fixed
data
5 bits
0
0
0
0
0
0
0
DD
3 bits
1
DD
3 bits
0
0
1
0
DD
3 bits
0
LC75878W
No.6473-9/35
DI
CL
CE
1
1
0
1
0
0
1
0
0
1
0
1
0
0
1
CCB address
8 bits
B0 B1 B2 B3 A0 A1 A2
1
A3
0
When the control data is transferred.
CCB address
8 bits
1
0
0
A3
1
1
1
0
A3
B0 B1 B2 B3 A0 A1 A2
CCB address
8 bits
B0 B1 B2 B3 A0 A1 A2
Control
data
13 bits
DD
3 bits
0
Display
data
120 bits
1
0
0
Fixed
data
5 bits
0
Fixed
data
5 bits
0
0
0
0
0
1
1
DD
3 bits
0
DD
3 bits
0
0
1
Note: B0 to B3, A0 to A3 ...... CCB address
DD................................ Direction data
CCB address: ............ 4BH
D1 to D600: .............. Display data
PC1 to PC4: .............. General-purpose output port state setting data
CT0 to CT3, CTC: .... Display contrast setting data
SC: ............................ Segment on/off control data
BU: ........................... Normal mode/power saving mode control data
DT1, DT2:................. Display technique setting data
D577 D578 D579 D580 D581 D582 D583 D584 D585 D586 D587 D588 D589 D590 D591 D592 D593 D594 D595 D596 D597 D598 D599 D600 0
Display
data
120 bits
D457 D458 D459 D460 D461 D462 D463 D464 D465 D466 D467 D468 D469 D470 D471 D472 D473 D474 D475 D476 D477 D478 D479 D480 0
PC1 PC2 PC3 PC4 CT0 CT1 CT2 CT3 CTC SC BU DT1 DT2 1
D481 D482
D361 D362
LC75878W
No.6473-10/35
DI
CL
CE
1
0
1
0
0
1
0
D1
D2
1
0
1
0
0
1
0
CCB address
8 bits
B0 B1 B2 B3 A0 A1 A2 A3
1
CCB address
8 bits
D271 D272
1 1 0 1 0 0 1 0 D136 D137
B0 B1 B2 B3 A0 A1 A2 A3
CCB address
8 bits
B0 B1 B2 B3 A0 A1 A2 A3
1
2. 1/9 duty
(1) When CL is stopped at the low level
When the display data is transferred.
Display
data
135 bits
D383 D384 D385 D386 D387 D388 D389 D390 D391 D392 D393 D394 D395 D396 D397 D398 D399 D400 D401 D402 D403 D404 D405 0
Display
data
135 bits
D248 D249 D250 D251 D252 D253 D254 D255 D256 D257 D258 D259 D260 D261 D262 D263 D264 D265 D266 D267 D268 D269 D270 0
Display
data
135 bits
D113 D114 D115 D116 D117 D118 D119 D120 D121 D122 D123 D124 D125 D126 D127 D128 D129 D130 D131 D132 D133 D134 D135 0
0
0
0
0
0
0
Fixed
data
6 bits
0
Fixed
data
6 bits
0
Fixed
data
6 bits
0
0
0
0
0
0
0
0
0
0
0
DD
3 bits
1
DD
3 bits
0
DD
3 bits
0
0
1
LC75878W
No.6473-11/35
CCB address
8 bits
1 1 0 1 0 0 1 0
B0 B1 B2 B3 A0 A1 A2 A3
Display
data
126 bits
Control
data
13 bits
DD
3 bits
0
1
D653 D654 D655 D656 D657 D658 D659 D660 D661 D662 D663 D664 D665 D666 0
Display
data
135 bits
0
0
0
0
0
0
0
Fixed
data
15 bits
0
0
D518 D519 D520 D521 D522 D523 D524 D525 D526 D527 D528 D529 D530 D531 D532 D533 D534 D535 D536 D537 D538 D539 D540 0
PC1 PC2 PC3 PC4 CT0 CT1 CT2 CT3 CTC SC BU DT1 DT2 1
Note: B0 to B3, A0 to A3 ...... CCB address
DD ............................... Direction data
DI
CL
CE
When the control data is transferred.
CCB address
8 bits
1 1 0 1 0 0 1 0 D541 D542
B0 B1 B2 B3 A0 A1 A2 A3
CCB address
8 bits
1 1 0 1 0 0 1
0 D406 D407
B0 B1 B2 B3 A0 A1 A2 A3
0
0
0
0
0
Fixed
data
6 bits
0
0
0
0
0
1
0
1
0
DD
3 bits
1
DD
3 bits
0
LC75878W
No.6473-12/35
DI
CL
CE
CCB address
8 bits
1 1 0 1 0 0 1
B0 B1 B2 B3 A0 A1 A2
CCB address
8 bits
1 1 0
1 0 0 1
B0 B1 B2 B3 A0 A1 A2
CCB address
8 bits
1 1 0 1 0 0 1
B0 B1 B2 B3 A0 A1 A2
D1 D2
0
D271 D272
A3
0
D136 D137
A3
0
A3
(2) When CL is stopped at the high level
When the display data is transferred.
Display
data
135 bits
D383 D384 D385 D386 D387 D388 D389 D390 D391 D392 D393 D394 D395 D396 D397 D398 D399 D400 D401 D402 D403 D404 D405 0
Display
data
135 bits
D248 D249 D250 D251 D252 D253 D254 D255 D256 D257 D258 D259 D260 D261 D262 D263 D264 D265 D266 D267 D268 D269 D270 0
Display
data
135 bits
D113 D114 D115 D116 D117 D118 D119 D120 D121 D122 D123 D124 D125 D126 D127 D128 D129 D130 D131 D132 D133 D134 D135 0
0
0
0
0
0
0
Fixed
data
6 bits
0
Fixed
data
6 bits
0
Fixed
data
6 bits
0
0
0
0
0
0
0
0
0
DD
3 bits
1
DD
3 bits
0
DD
3 bits
0
0
0
1
0
LC75878W
No.6473-13/35
DI
CL
CE
0
0
CCB address
8 bits
1 1 0 1 0 0 1
B0 B1 B2 B3 A0 A1 A2
D541 D542
Display
data
126 bits
Control
data
13 bits
DD
3 bits
0
1
0
0
0
0
0
0
0
Fixed
data
15 bits
0
0
0
0
0
0
0
Fixed
data
6 bits
0
0
0
0
0
1
0
DD
3 bits
0
DD
3 bits
1
Note: B0 to B3, A0 to A3 ...... CCB address
DD................................ Direction data
· CCB address: ............ 4BH
· D1 to D666: .............. Display data
· PC1 to PC4: .............. General-purpose output port state setting data
· CT0 to CT3, CTC: .... Display contrast setting data
· SC: ............................ Segment on/off control data
· BU: ........................... Normal mode/power saving mode control data
· DT1, DT2:................. Display technique setting data
D653 D654 D655 D656 D657 D658 D659 D660 D661 D662 D663 D664 D665 D666 0
Display
data
135 bits
D518 D519 D520 D521 D522 D523 D524 D525 D526 D527 D528 D529 D530 D531 D532 D533 D534 D535 D536 D537 D538 D539 D540 0
0 PC1 PC2 PC3 PC4 CT0 CT1 CT2 CT3 CTC SC BU DT1 DT2 1
A3
When the control data is transferred.
CCB address
8 bits
1
0
0
A3
1
1
1
0 D406 D407
A3
B0 B1 B2 B3 A0 A1 A2
CCB address
8 bits
1 1 0 1 0 0 1
B0 B1 B2 B3 A0 A1 A2
0
1
LC75878W
No.6473-14/35
DI
CL
CE
1
0
1
0
0
1
0
1
0
1
0
0
1
0
CCB address
8 bits
B0 B1 B2 B3 A0 A1 A2 A3
1
CCB address
8 bits
B0 B1 B2 B3 A0 A1 A2 A3
1
CCB address
8 bits
1 1 0 1 0 0 1
0
B0 B1 B2 B3 A0 A1 A2 A3
3. 1/10 duty
(1) When CL is stopped at the low level
When the display data is transferred.
D2
D301 D302
D151 D152
D1
Display
data
150 bits
D429 D430 D431 D432 D433 D434 D435 D436 D437 D438 D439 D440 D441 D442 D443 D444 D445 D446 D447 D448 D449 D450 0
Display
data
150 bits
D279 D280 D281 D282 D283 D284 D285 D286 D287 D288 D289 D290 D291 D292 D293 D294 D295 D296 D297 D298 D299 D300 0
Display
data
150 bits
D129 D130 D131 D132 D133 D134 D135 D136 D137 D138 D139 D140 D141 D142 D143 D144 D145 D146 D147 D148 D149 D150 0
0
0
0
0
0
0
0
Fixed
data
7 bits
0
Fixed
data
7 bits
0
Fixed
data
7 bits
0
0
0
0
0
0
0
0
0
0
0
0
1
DD
3 bits
0
DD
3 bits
0
DD
3 bits
0
0
1
LC75878W
No.6473-15/35
1
0
0
1
0
CCB address
8 bits
CCB address
8 bits
1 1 0 1 0 0 1 0
B0 B1 B2 B3 A0 A1 A2 A3
D729 D730 0
0
0
0
0
0
0
0
Control
data
13 bits
0
0
DD
3 bits
Display
data
150 bits
1
0
0
0
0
Fixed
data
27 bits
0
0
0
0
0
0
0
0
D579 D580 D581 D582 D583 D584 D585 D586 D587 D588 D589 D590 D591 D592 D593 D594 D595 D596 D597 D598 D599 D600 0
PC1 PC2 PC3 PC4 CT0 CT1 CT2 CT3 CTC SC BU DT1 DT2 1
Display
data
130 bits
D601 D602
Note: B0 to B3, A0 to A3 ...... CCB address
DD ............................... Direction data
DI
0
When the control data is transferred.
CE
CL
1
B0 B1 B2 B3 A0 A1 A2 A3
1
CCB address
8 bits
1 1 0 1 0 0 1 0 D451 D452
B0 B1 B2 B3 A0 A1 A2 A3
0
0
0
0
0
Fixed
data
7 bits
0
0
0
0
0
0
0
1
0
DD
3 bits
0
DD
3 bits
1
0
1
LC75878W
No.6473-16/35
DI
CL
CE
0
0
0
0
CCB address
8 bits
1
0
0
A3
1
1
1
D1 D2
D301 D302
0 D151 D152
A3
B0 B1 B2 B3 A0 A1 A2
CCB address
8 bits
1 1 0 1 0 0 1
B0 B1 B2 B3 A0 A1 A2
CCB address
8 bits
0
1
A3
0
1
1
B0 B1 B2 B3 A0 A1 A2
1
(2) When CL is stopped at the high level
When the display data is transferred.
Display
data
150 bits
D429 D430 D431 D432 D433 D434 D435 D436 D437 D438 D439 D440 D441 D442 D443 D444 D445 D446 D447 D448 D449 D450 0
Display
data
150 bits
D279 D280 D281 D282 D283 D284 D285 D286 D287 D288 D289 D290 D291 D292 D293 D294 D295 D296 D297 D298 D299 D300 0
Display
data
150 bits
D129 D130 D131 D132 D133 D134 D135 D136 D137 D138 D139 D140 D141 D142 D143 D144 D145 D146 D147 D148 D149 D150 0
0
0
0
0
0
0
Fixed
data
7 bits
0
0
0
0
Fixed
data
7 bits
0
Fixed
data
7 bits
0
0
0
0
0
0
0
0
0
0
DD
3 bits
1
DD
3 bits
0
DD
3 bits
0
0
1
0
LC75878W
No.6473-17/35
DI
CL
CE
CCB address
8 bits
1 1 0 1 0 0 1
B0 B1 B2 B3 A0 A1 A2
D729 D730 0
0
0
0
0
0
0
Control
data
13 bits
0 PC1 PC2 PC3 PC4 CT0 CT1 CT2 CT3 CTC SC BU DT1 DT2 1
A3
0
0
0
DD
3 bits
Display
data
150 bits
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Fixed
data
7 bits
0
0
0
0
0
0
0
1
0
DD
3 bits
0
DD
3 bits
1
Note: B0 to B3, A0 to A3 ...... CCB address
DD................................ Direction data
· CCB address: ............ 4BH
· D1 to D730: .............. Display data
· PC1 to PC4: .............. General-purpose output port state setting data
· CT0 to CT3, CTC: .... Display contrast setting data
· SC: ............................ Segment on/off control data
· BU: ........................... Normal mode/power saving mode control data
· DT1, DT2:................. Display technique setting data
Fixed
data
27 bits
0
D579 D580 D581 D582 D583 D584 D585 D586 D587 D588 D589 D590 D591 D592 D593 D594 D595 D596 D597 D598 D599 D600 0
Display
data
130 bits
0 D601 D602
A3
0 D451 D452
A3
When the control data is transferred.
CCB address
8 bits
1 1 0 1 0 0 1
B0 B1 B2 B3 A0 A1 A2
CCB address
8 bits
1 1 0 1 0 0 1
B0 B1 B2 B3 A0 A1 A2
0
1
LC75878W
No.6473-18/35
LC75878W
Control Data Functions
1. PC1 to PC4: General-purpose output port state setting data
These control data bits set the states of the general-purpose output ports P1 to P4.
Output pin
P1
P2
P3
P4
General-purpose output port state setting data
PC1
PC2
PC3
PC4
For example, if PC1 and PC2 are set to 1, and PC3 and PC4 are set to 0, then the output pins P1 and P2 will output
high levels (VDD) and the output pins P3 and P4 will output low levels (VSS).
2. CT0 to CT3, CTC: Display contrast setting data
These control data bits set the display contrast.
CT0 to CT3: Display contrast setting (11 steps)
CT0
CT1
CT2
CT3
0
0
0
0
0.94VLCD=VLCD-(0.03VLCD×2)
LCD drive 4/4 bias voltage supply VLCD0 level
1
0
0
0
0.91VLCD=VLCD-(0.03VLCD×3)
0
1
0
0
0.88VLCD=VLCD-(0.03VLCD×4)
1
1
0
0
0.85VLCD=VLCD-(0.03VLCD×5)
0
0
1
0
0.82VLCD=VLCD-(0.03VLCD×6)
1
0
1
0
0.79VLCD=VLCD-(0.03VLCD×7)
0
1
1
0
0.76VLCD=VLCD-(0.03VLCD×8)
1
1
1
0
0.73VLCD=VLCD-(0.03VLCD×9)
0
0
0
1
0.70VLCD=VLCD-(0.03VLCD×10)
1
0
0
1
0.67VLCD=VLCD-(0.03VLCD×11)
0
1
0
1
0.64VLCD=VLCD-(0.03VLCD×12)
CTC: Display contrast adjustment circuit state setting
CTC
Display contrast adjustment circuit state
0
The display contrast adjustment circuit is disabled, and the VLCD0 pin level is forced to the VLCD level.
1
The display contrast adjustment circuit operates and the display contrast is adjusted.
Note that although the display contrast can be adjusted by operating the built-in display contrast adjustment circuit, it
is also possible to apply fine adjustments to the contrast by connecting an external variable resistor to the VLCD4 pin
and modifying the VLCD4 pin voltage. However, the following conditions must be met: (VLCD0 – VLCD4) ≥ 4.5V,
and 1.5V ≥ VLCD4 ≥ 0V.
No.6473-19/35
LC75878W
3. SC: Segment on/off control data
This control data bit controls the on/off state of the segments.
SC
Display state
0
On
1
Off
However, note that when the segments are turned off by setting SC to 1, the segments are turned off by outputting
segment off waveforms from the segment output pins.
4. BU: Normal mode/power saving mode control data
This control data bit controls the normal mode and power saving mode.
BU
Mode
0
Normal mode
Power-saving mode.
The common and segment pins go to the VLCD4 level and the oscillator on the OSC pin is stopped. Note that the
states of the general-purpose output ports P1 to P4 are set by PC1 to PC4 in the control data during power saving
1
mode as well as normal mode.
5. DT1, DT2: Display technique setting data
This control data bits set the display technique.
Output pins
DT1
DT2
Display technique
S75/COM9
S74/COM10
0
0
1/8 duty 1/4 bias drive
S75
S74
1
0
1/9 duty 1/4 bias drive
COM9
S74
0
1
1/10 duty 1/4 bias drive
COM9
COM10
Notes: Sn (n = 74 or 75): Segment outputs
COMn (n = 9 or 10): Common outputs
No.6473-20/35
LC75878W
Display Data and Output Pin Correspondence
• 1/8 duty
Output Pin
COM1
COM2
COM3
COM4
COM5
COM6
COM7
S1
D1
D2
D3
D4
D5
D6
D7
COM8
D8
S2
D9
D10
D11
D12
D13
D14
D15
D16
S3
D17
D18
D19
D20
D21
D22
D23
D24
S4
D25
D26
D27
D28
D29
D30
D31
D32
S5
D33
D34
D35
D36
D37
D38
D39
D40
S6
D41
D42
D43
D44
D45
D46
D47
D48
S7
D49
D50
D51
D52
D53
D54
D55
D56
S8
D57
D58
D59
D60
D61
D62
D63
D64
S9
D65
D66
D67
D68
D69
D70
D71
D72
S10
D73
D74
D75
D76
D77
D78
D79
D80
S11
D81
D82
D83
D84
D85
D86
D87
D88
S12
D89
D90
D91
D92
D93
D94
D95
D96
S13
D97
D98
D99
D100
D101
D102
D103
D104
S14
D105
D106
D107
D108
D109
D110
D111
D112
S15
D113
D114
D115
D116
D117
D118
D119
D120
S16
D121
D122
D123
D124
D125
D126
D127
D128
S17
D129
D130
D131
D132
D133
D134
D135
D136
S18
D137
D138
D139
D140
D141
D142
D143
D144
S19
D145
D146
D147
D148
D149
D150
D151
D152
S20
D153
D154
D155
D156
D157
D158
D159
D160
S21
D161
D162
D163
D164
D165
D166
D167
D168
S22
D169
D170
D171
D172
D173
D174
D175
D176
S23
D177
D178
D179
D180
D181
D182
D183
D184
S24
D185
D186
D187
D188
D189
D190
D191
D192
S25
D193
D194
D195
D196
D197
D198
D199
D200
S26
D201
D202
D203
D204
D205
D206
D207
D208
S27
D209
D210
D211
D212
D213
D214
D215
D216
S28
D217
D218
D219
D220
D221
D222
D223
D224
S29
D225
D226
D227
D228
D229
D230
D231
D232
S30
D233
D234
D235
D236
D237
D238
D239
D240
S31
D241
D242
D243
D244
D245
D246
D247
D248
S32
D249
D250
D251
D252
D253
D254
D255
D256
S33
D257
D258
D259
D260
D261
D262
D263
D264
S34
D265
D266
D267
D268
D269
D270
D271
D272
S35
D273
D274
D275
D276
D277
D278
D279
D280
S36
D281
D282
D283
D284
D285
D286
D287
D288
S37
D289
D290
D291
D292
D293
D294
D295
D296
S38
D297
D298
D299
D300
D301
D302
D303
D304
S39
D305
D306
D307
D308
D309
D310
D311
D312
S40
D313
D314
D315
D316
D317
D318
D319
D320
S41
D321
D322
D323
D324
D325
D326
D327
D328
S42
D329
D330
D331
D332
D333
D334
D335
D336
S43
D337
D338
D339
D340
D341
D342
D343
D344
S44
D345
D346
D347
D348
D349
D350
D351
D352
S45
D353
D354
D355
D356
D357
D358
D359
D360
Continued on next page.
No.6473-21/35
LC75878W
Continued from preceding page.
Output Pin
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
S46
D361
D362
D363
D364
D365
D366
D367
D368
S47
D369
D370
D371
D372
D373
D374
D375
D376
S48
D377
D378
D379
D380
D381
D382
D383
D384
S49
D385
D386
D387
D388
D389
D390
D391
D392
S50
D393
D394
D395
D396
D397
D398
D399
D400
S51
D401
D402
D403
D404
D405
D406
D407
D408
S52
D409
D410
D411
D412
D413
D414
D415
D416
S53
D417
D418
D419
D420
D421
D422
D423
D424
S54
D425
D426
D427
D428
D429
D430
D431
D432
S55
D433
D434
D435
D436
D437
D438
D439
D440
S56
D441
D442
D443
D444
D445
D446
D447
D448
S57
D449
D450
D451
D452
D453
D454
D455
D456
S58
D457
D458
D459
D460
D461
D462
D463
D464
S59
D465
D466
D467
D468
D469
D470
D471
D472
S60
D473
D474
D475
D476
D477
D478
D479
D480
S61
D481
D482
D483
D484
D485
D486
D487
D488
S62
D489
D490
D491
D492
D493
D494
D495
D496
S63
D497
D498
D499
D500
D501
D502
D503
D504
S64
D505
D506
D507
D508
D509
D510
D511
D512
S65
D513
D514
D515
D516
D517
D518
D519
D520
S66
D521
D522
D523
D524
D525
D526
D527
D528
S67
D529
D530
D531
D532
D533
D534
D535
D536
S68
D537
D538
D539
D540
D541
D542
D543
D544
S69
D545
D546
D547
D548
D549
D550
D551
D552
S70
D553
D554
D555
D556
D557
D558
D559
D560
S71
D561
D562
D563
D564
D565
D566
D567
D568
S72
D569
D570
D571
D572
D573
D574
D575
D576
S73
D577
D578
D579
D580
D581
D582
D583
D584
S74/COM10
D585
D586
D587
D588
D589
D590
D591
D592
S75/COM9
D593
D594
D595
D596
D597
D598
D599
D600
Note: Applies when the S74/COM10 and S75/COM9 output pins are set to their segment output function.
For example, the table below lists the segment output states for the S11 output pin.
Display data
Output pin state (S11)
D81
D82
D83
D84
D85
D86
D87
D88
0
0
0
0
0
0
0
0
The LCD segments for COM1 to COM8 are off
1
0
0
0
0
0
0
0
The LCD segment for COM1 is on
0
1
0
0
0
0
0
0
The LCD segment for COM2 is on
0
0
1
0
0
0
0
0
The LCD segment for COM3 is on
0
0
0
1
0
0
0
0
The LCD segment for COM4 is on
0
0
0
0
1
0
0
0
The LCD segment for COM5 is on
0
0
0
0
0
1
0
0
The LCD segment for COM6 is on
0
0
0
0
0
0
1
0
The LCD segment for COM7 is on
0
0
0
0
0
0
0
1
The LCD segment for COM8 is on
1
1
1
1
1
1
1
1
The LCD segments for COM1 to COM8 are on
No.6473-22/35
LC75878W
• 1/9 duty
Output Pin
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
S1
D1
D2
D3
D4
D5
D6
D7
D8
D9
S2
D10
D11
D12
D13
D14
D15
D16
D17
D18
S3
D19
D20
D21
D22
D23
D24
D25
D26
D27
S4
D28
D29
D30
D31
D32
D33
D34
D35
D36
S5
D37
D38
D39
D40
D41
D42
D43
D44
D45
S6
D46
D47
D48
D49
D50
D51
D52
D53
D54
S7
D55
D56
D57
D58
D59
D60
D61
D62
D63
S8
D64
D65
D66
D67
D68
D69
D70
D71
D72
S9
D73
D74
D75
D76
D77
D78
D79
D80
D81
S10
D82
D83
D84
D85
D86
D87
D88
D89
D90
S11
D91
D92
D93
D94
D95
D96
D97
D98
D99
S12
D100
D101
D102
D103
D104
D105
D106
D107
D108
S13
D109
D110
D111
D112
D113
D114
D115
D116
D117
S14
D118
D119
D120
D121
D122
D123
D124
D125
D126
S15
D127
D128
D129
D130
D131
D132
D133
D134
D135
S16
D136
D137
D138
D139
D140
D141
D142
D143
D144
S17
D145
D146
D147
D148
D149
D150
D151
D152
D153
S18
D154
D155
D156
D157
D158
D159
D160
D161
D162
S19
D163
D164
D165
D166
D167
D168
D169
D170
D171
S20
D172
D173
D174
D175
D176
D177
D178
D179
D180
S21
D181
D182
D183
D184
D185
D186
D187
D188
D189
S22
D190
D191
D192
D193
D194
D195
D196
D197
D198
S23
D199
D200
D201
D202
D203
D204
D205
D206
D207
S24
D208
D209
D210
D211
D212
D213
D214
D215
D216
S25
D217
D218
D219
D220
D221
D222
D223
D224
D225
S26
D226
D227
D228
D229
D230
D231
D232
D233
D234
S27
D235
D236
D237
D238
D239
D240
D241
D242
D243
S28
D244
D245
D246
D247
D248
D249
D250
D251
D252
S29
D253
D254
D255
D256
D257
D258
D259
D260
D261
S30
D262
D263
D264
D265
D266
D267
D268
D269
D270
S31
D271
D272
D273
D274
D275
D276
D277
D278
D279
S32
D280
D281
D282
D283
D284
D285
D286
D287
D288
S33
D289
D290
D291
D292
D293
D294
D295
D296
D297
S34
D298
D299
D300
D301
D302
D303
D304
D305
D306
S35
D307
D308
D309
D310
D311
D312
D313
D314
D315
S36
D316
D317
D318
D319
D320
D321
D322
D323
D324
S37
D325
D326
D327
D328
D329
D330
D331
D332
D333
S38
D334
D335
D336
D337
D338
D339
D340
D341
D342
S39
D343
D344
D345
D346
D347
D348
D349
D350
D351
S40
D352
D353
D354
D355
D356
D357
D358
D359
D360
S41
D361
D362
D363
D364
D365
D366
D367
D368
D369
S42
D370
D371
D372
D373
D374
D375
D376
D377
D378
S43
D379
D380
D381
D382
D383
D384
D385
D386
D387
S44
D388
D389
D390
D391
D392
D393
D394
D395
D396
S45
D397
D398
D399
D400
D401
D402
D403
D404
D405
Continued on next page.
No.6473-23/35
LC75878W
Continued from preceding page.
Output Pin
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
S46
D406
D407
D408
D409
D410
D411
D412
D413
D414
S47
D415
D416
D417
D418
D419
D420
D421
D422
D423
S48
D424
D425
D426
D427
D428
D429
D430
D431
D432
S49
D433
D434
D435
D436
D437
D438
D439
D440
D441
S50
D442
D443
D444
D445
D446
D447
D448
D449
D450
S51
D451
D452
D453
D454
D455
D456
D457
D458
D459
S52
D460
D461
D462
D463
D464
D465
D466
D467
D468
S53
D469
D470
D471
D472
D473
D474
D475
D476
D477
S54
D478
D479
D480
D481
D482
D483
D484
D485
D486
S55
D487
D488
D489
D490
D491
D492
D493
D494
D495
S56
D496
D497
D498
D499
D500
D501
D502
D503
D504
S57
D505
D506
D507
D508
D509
D510
D511
D512
D513
S58
D514
D515
D516
D517
D518
D519
D520
D521
D522
S59
D523
D524
D525
D526
D527
D528
D529
D530
D531
S60
D532
D533
D534
D535
D536
D537
D538
D539
D540
S61
D541
D542
D543
D544
D545
D546
D547
D548
D549
S62
D550
D551
D552
D553
D554
D555
D556
D557
D558
S63
D559
D560
D561
D562
D563
D564
D565
D566
D567
S64
D568
D569
D570
D571
D572
D573
D574
D575
D576
S65
D577
D578
D579
D580
D581
D582
D583
D584
D585
S66
D586
D587
D588
D589
D590
D591
D592
D593
D594
S67
D595
D596
D597
D598
D599
D600
D601
D602
D603
S68
D604
D605
D606
D607
D608
D609
D610
D611
D612
S69
D613
D614
D615
D616
D617
D618
D619
D620
D621
S70
D622
D623
D624
D625
D626
D627
D628
D629
D630
S71
D631
D632
D633
D634
D635
D636
D637
D638
D639
S72
D640
D641
D642
D643
D644
D645
D646
D647
D648
S73
D649
D650
D651
D652
D653
D654
D655
D656
D657
S74/COM10
D658
D659
D660
D661
D662
D663
D664
D665
D666
Note: Applies when the S74/COM10 output pin is set to its segment output function.
For example, the table below lists the segment output states for the S11 output pin.
Display data
D91
D92
D93
D94
D95
D96
D97
D98
D99
Output pin state (S11)
0
0
0
0
0
0
0
0
0
The LCD segments for COM1 to COM9 are off
1
0
0
0
0
0
0
0
0
The LCD segment for COM1 is on
0
1
0
0
0
0
0
0
0
The LCD segment for COM2 is on
0
0
1
0
0
0
0
0
0
The LCD segment for COM3 is on
0
0
0
1
0
0
0
0
0
The LCD segment for COM4 is on
0
0
0
0
1
0
0
0
0
The LCD segment for COM5 is on
0
0
0
0
0
1
0
0
0
The LCD segment for COM6 is on
0
0
0
0
0
0
1
0
0
The LCD segment for COM7 is on
0
0
0
0
0
0
0
1
0
The LCD segment for COM8 is on
0
0
0
0
0
0
0
0
1
The LCD segment for COM9 is on
1
1
1
1
1
1
1
1
1
The LCD segments for COM1 to COM9 are on
No.6473-24/35
LC75878W
• 1/10 duty
Output Pin
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10
S1
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
S2
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
S3
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
S4
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
S5
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
S6
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
S7
D61
D62
D63
D64
D65
D66
D67
D68
D69
D70
S8
D71
D72
D73
D74
D75
D76
D77
D78
D79
D80
S9
D81
D82
D83
D84
D85
D86
D87
D88
D89
D90
S10
D91
D92
D93
D94
D95
D96
D97
D98
D99
D100
S11
D101
D102
D103
D104
D105
D106
D107
D108
D109
D110
S12
D111
D112
D113
D114
D115
D116
D117
D118
D119
D120
S13
D121
D122
D123
D124
D125
D126
D127
D128
D129
D130
S14
D131
D132
D133
D134
D135
D136
D137
D138
D139
D140
S15
D141
D142
D143
D144
D145
D146
D147
D148
D149
D150
S16
D151
D152
D153
D154
D155
D156
D157
D158
D159
D160
S17
D161
D162
D163
D164
D165
D166
D167
D168
D169
D170
S18
D171
D172
D173
D174
D175
D176
D177
D178
D179
D180
S19
D181
D182
D183
D184
D185
D186
D187
D188
D189
D190
S20
D191
D192
D193
D194
D195
D196
D197
D198
D199
D200
S21
D201
D202
D203
D204
D205
D206
D207
D208
D209
D210
S22
D211
D212
D213
D214
D215
D216
D217
D218
D219
D220
S23
D221
D222
D223
D224
D225
D226
D227
D228
D229
D230
S24
D231
D232
D233
D234
D235
D236
D237
D238
D239
D240
S25
D241
D242
D243
D244
D245
D246
D247
D248
D249
D250
S26
D251
D252
D253
D254
D255
D256
D257
D258
D259
D260
S27
D261
D262
D263
D264
D265
D266
D267
D268
D269
D270
S28
D271
D272
D273
D274
D275
D276
D277
D278
D279
D280
S29
D281
D282
D283
D284
D285
D286
D287
D288
D289
D290
S30
D291
D292
D293
D294
D295
D296
D297
D298
D299
D300
S31
D301
D302
D303
D304
D305
D306
D307
D308
D309
D310
S32
D311
D312
D313
D314
D315
D316
D317
D318
D319
D320
S33
D321
D322
D323
D324
D325
D326
D327
D328
D329
D330
S34
D331
D332
D333
D334
D335
D336
D337
D338
D339
D340
S35
D341
D342
D343
D344
D345
D346
D347
D348
D349
D350
S36
D351
D352
D353
D354
D355
D356
D357
D358
D359
D360
S37
D361
D362
D363
D364
D365
D366
D367
D368
D369
D370
S38
D371
D372
D373
D374
D375
D376
D377
D378
D379
D380
S39
D381
D382
D383
D384
D385
D386
D387
D388
D389
D390
S40
D391
D392
D393
D394
D395
D396
D397
D398
D399
D400
S41
D401
D402
D403
D404
D405
D406
D407
D408
D409
D410
S42
D411
D412
D413
D414
D415
D416
D417
D418
D419
D420
S43
D421
D422
D423
D424
D425
D426
D427
D428
D429
D430
S44
D431
D432
D433
D434
D435
D436
D437
D438
D439
D440
S45
D441
D442
D443
D444
D445
D446
D447
D448
D449
D450
Continued on next page.
No.6473-25/35
LC75878W
Continued from preceding page.
Output Pin
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10
S46
D451
D452
D453
D454
D455
D456
D457
D458
D459
D460
S47
D461
D462
D463
D464
D465
D466
D467
D468
D469
D470
S48
D471
D472
D473
D474
D475
D476
D477
D478
D479
D480
S49
D481
D482
D483
D484
D485
D486
D487
D488
D489
D490
S50
D491
D492
D493
D494
D495
D496
D497
D498
D499
D500
S51
D501
D502
D503
D504
D505
D506
D507
D508
D509
D510
S52
D511
D512
D513
D514
D515
D516
D517
D518
D519
D520
S53
D521
D522
D523
D524
D525
D526
D527
D528
D529
D530
S54
D531
D532
D533
D534
D535
D536
D537
D538
D539
D540
S55
D541
D542
D543
D544
D545
D546
D547
D548
D549
D550
S56
D551
D552
D553
D554
D555
D556
D557
D558
D559
D560
S57
D561
D562
D563
D564
D565
D566
D567
D568
D569
D570
S58
D571
D572
D573
D574
D575
D576
D577
D578
D579
D580
S59
D581
D582
D583
D584
D585
D586
D587
D588
D589
D590
S60
D591
D592
D593
D594
D595
D596
D597
D598
D599
D600
S61
D601
D602
D603
D604
D605
D606
D607
D608
D609
D610
S62
D611
D612
D613
D614
D615
D616
D617
D618
D619
D620
S63
D621
D622
D623
D624
D625
D626
D627
D628
D629
D630
S64
D631
D632
D633
D634
D635
D636
D637
D638
D639
D640
S65
D641
D642
D643
D644
D645
D646
D647
D648
D649
D650
S66
D651
D652
D653
D654
D655
D656
D657
D658
D659
D660
S67
D661
D662
D663
D664
D665
D666
D667
D668
D669
D670
S68
D671
D672
D673
D674
D675
D676
D677
D678
D679
D680
S69
D681
D682
D683
D684
D685
D686
D687
D688
D689
D690
S70
D691
D692
D693
D694
D695
D696
D697
D698
D699
D700
S71
D701
D702
D703
D704
D705
D706
D707
D708
D709
D710
S72
D711
D712
D713
D714
D715
D716
D717
D718
D719
D720
S73
D721
D722
D723
D724
D725
D726
D727
D728
D729
D730
For example, the table below lists the segment output states for the S11 output pin.
Display data
Output pin state (S11)
D101
D102
D103
D104
D105
D106
D107
D108
D109
D110
0
0
0
0
0
0
0
0
0
0
The LCD segments for COM1 to COM10 are off
1
0
0
0
0
0
0
0
0
0
The LCD segment for COM1 is on
0
1
0
0
0
0
0
0
0
0
The LCD segment for COM2 is on
0
0
1
0
0
0
0
0
0
0
The LCD segment for COM3 is on
0
0
0
1
0
0
0
0
0
0
The LCD segment for COM4 is on
0
0
0
0
1
0
0
0
0
0
The LCD segment for COM5 is on
0
0
0
0
0
1
0
0
0
0
The LCD segment for COM6 is on
0
0
0
0
0
0
1
0
0
0
The LCD segment for COM7 is on
0
0
0
0
0
0
0
1
0
0
The LCD segment for COM8 is on
0
0
0
0
0
0
0
0
1
0
The LCD segment for COM9 is on
0
0
0
0
0
0
0
0
0
1
The LCD segment for COM10 is on
1
1
1
1
1
1
1
1
1
1
The LCD segments for COM1 to COM10 are on
No.6473-26/35
LC75878W
1/8 Duty, 1/4 Bias Drive Technique
VLCD0
VLCD1
VLCD2
VLCD3
VLCD4
VLCD0
VLCD1
VLCD2
VLCD3
VLCD4
COM 1
COM 2
VLCD0
VLCD1
VLCD2
VLCD3
VLCD4
COM 8
VLCD0
VLCD1
VLCD2
VLCD3
VLCD4
VLCD0
VLCD1
VLCD2
VLCD3
VLCD4
VLCD0
VLCD1
VLCD2
VLCD3
VLCD4
VLCD0
VLCD1
VLCD2
VLCD3
VLCD4
LCD driver output when all LCD
segments corresponding to COM1
to COM8 are turned off
LCD driver output when only LCD
segments corresponding to COM1
are turned on
LCD driver output when only LCD
segments corresponding to COM2
are turned on
LCD driver output when all LCD
segments corresponding to COM1
to COM8 are turned on
64T
512T
T=
1
fosc
No.6473-27/35
LC75878W
1/9 Duty, 1/4 Bias Drive Technique
VLCD0
VLCD1
VLCD2
VLCD3
VLCD4
VLCD0
VLCD1
VLCD2
VLCD3
VLCD4
COM 1
COM 2
VLCD0
VLCD1
VLCD2
VLCD3
VLCD4
COM 9
VLCD0
VLCD1
VLCD2
VLCD3
VLCD4
VLCD0
VLCD1
VLCD2
VLCD3
VLCD4
VLCD0
VLCD1
VLCD2
VLCD3
VLCD4
VLCD0
VLCD1
VLCD2
VLCD3
VLCD4
LCD driver output when all LCD
segments corresponding to COM1
to COM9 are turned off
LCD driver output when only LCD
segments corresponding to COM1
are turned on
LCD driver output when only LCD
segments corresponding to COM2
are turned on
LCD driver output when all LCD
segments corresponding to COM1
to COM9 are turned on
64T
576T
T=
1
fosc
No.6473-28/35
LC75878W
1/10 Duty, 1/4 Bias Drive Technique
VLCD0
VLCD1
VLCD2
VLCD3
VLCD4
VLCD0
VLCD1
VLCD2
VLCD3
VLCD4
COM 1
COM 2
VLCD0
VLCD1
VLCD2
VLCD3
VLCD4
COM10
VLCD0
VLCD1
VLCD2
VLCD3
VLCD4
VLCD0
VLCD1
VLCD2
VLCD3
VLCD4
VLCD0
VLCD1
VLCD2
VLCD3
VLCD4
VLCD0
VLCD1
VLCD2
VLCD3
VLCD4
LCD driver output when all LCD
segments corresponding to COM1
to COM10 are turned off
LCD driver output when only LCD
segments corresponding to COM1
are turned on
LCD driver output when only LCD
segments corresponding to COM2
are turned on
LCD driver output when all LCD
segments corresponding to COM1
to COM10 are turned on
64T
640T
T=
1
fosc
No.6473-29/35
LC75878W
The INH Pin and Display Control
Since the IC internal data (the display data and the control data) is undefined when power is first applied, applications
should set the INH pin low at the same time as power is applied to turn off the display (This sets the S1 to S73,
S74/COM10, S75/COM9, and COM1 to COM8 to the VLCD4 level and the P1 to P4 to the VSS level.) and during this
period send serial data from the controller. The controller should then set the INH pin high after the data transfer has
completed. This procedure prevents meaningless displays at power on. (See figures 3, 4, and 5.)
Power Supply Sequence
The following sequences must be observed when power is turned on and off. (See figures 3, 4, and 5.)
• Power on: Logic block power supply (VDD) on → LCD driver block power supply (VLCD) on
• Power off: LCD driver block power supply (VLCD) off → Logic block power supply (VDD) off
However, if the logic and LCD driver blocks use a shared power supply, then the power supplies can be turned on and
off at the same time.
• 1/8 duty
t2
t1
t3
VDD
VLCD
INH
tc
VIL
CE
VIL
Display and control data transfer
Internal data (D1 to D120)
Undefined
Defined
Undefined
Internal data (D121 to D240)
Undefined
Defined
Undefined
Internal data (D241 to D360)
Undefined
Defined
Undefined
Internal data (D361 to D480)
Undefined
Defined
Undefined
Internal data (D481 to D600)
Undefined
Defined
Undefined
Undefined
Defined
Undefined
Internal data
PC1 to PC4
CT0 to CT3, CTC
SC, BU, DT1, DT2
• t1 ≥ 0
• t2 > 0
• t3 ≥ 0 (t2 > t3)
• tc .... 10μs min
Figure 3
No.6473-30/35
LC75878W
• 1/9 duty
t2
t1
t3
VDD
VLCD
INH
tc
VIL
CE
VIL
Display and control data transfer
Internal data (D1 to D135)
Undefined
Defined
Undefined
Internal data (D136 to D270)
Undefined
Defined
Undefined
Internal data (D271 to D405)
Undefined
Defined
Undefined
Internal data (D406 to D540)
Undefined
Defined
Undefined
Internal data (D541 to D666)
Undefined
Defined
Undefined
PC1 to PC4
Internal data CT0 to CT3, CTC
SC, BU ,DT1, DT2
Undefined
Defined
Undefined
• t1 ≥ 0
• t2 > 0
• t3 ≥ 0 (t2 > t3)
• tc .... 10μs min
Figure 4
• 1/10 duty
t2
t1
t3
VDD
VLCD
INH
tc
VIL
CE
VIL
Display and control data transfer
Internal data (D1 to D150)
Undefined
Defined
Undefined
Internal data (D151 to D300)
Undefined
Defined
Undefined
Internal data (D301 to D450)
Undefined
Defined
Undefined
Internal data (D451 to D600)
Undefined
Defined
Undefined
Internal data (D601 to D730)
Undefined
Defined
Undefined
PC1 to PC4
Internal data CT0 to CT3, CTC
SC, BU, DT1, DT2
Undefined
Defined
Undefined
• t1 ≥ 0
• t2 > 0
• t3 ≥ 0 (t2 > t3)
• tc .... 10μs min
Figure 5
Notes on Transferring Display Data from the Controller
The display data is transferred to the LC75878W in five operations. All of the display data should be transferred within
30ms to maintain the quality of the displayed image.
No.6473-31/35
LC75878W
Sample Application Circuit 1
1/8 duty, 1/4 bias drive technique (for use with normal panels)
LCD panel
VDD
+5V
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
VSS
+8V
OPEN
C
C
C
VLCD
VLCD 0
VLCD 1
VLCD 2
VLCD 3
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
VLCD4 *2
C≥0.047μF
OSC
S71
S72
S73
COM10/S74
COM9/S75
INH
CE
CL
DI
From
the controller
P1
P2
P3
P4
General-purpose output ports
Used with the backlight
controller or other circuit.
Note: *2. If a variable resistor is not used for display contrast fine adjustment, the VLCD4 pin must be connected to
ground.
Sample Application Circuit 2
1/8 duty, 1/4 bias drive technique (for use with large panels)
LCD panel
+5V
VDD
VSS
+8V
VLCD
R
R
R
C
C
C
R
VLCD 0
VLCD 1
VLCD 2
VLCD 3
VLCD4 *2
C≥0.047μF
10kΩ≥R≥2.2kΩ
OSC
From
the controller
INH
CE
CL
DI
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S71
S72
S73
COM10/S74
COM9/S75
P1
P2
P3
P4
General-purpose output ports
Used with the backlight
controller or other circuit.
Note: *2. If a variable resistor is not used for display contrast fine adjustment, the VLCD4 pin must be connected to
ground.
No.6473-32/35
LC75878W
Sample Application Circuit 3
1/9 duty, 1/4 bias drive technique (for use with normal panels)
LCD panel
VDD
+5V
VSS
+8V
OPEN
C
C
C
VLCD
VLCD 0
VLCD 1
VLCD 2
VLCD 3
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
S75/COM9
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
VLCD 4 *2
C≥0.047μF
OSC
S71
S72
S73
COM10/S74
P1
P2
P3
P4
INH
CE
CL
DI
From
the controller
General-purpose output ports
Used with the backlight
controller or other circuit.
Note: *2. If a variable resistor is not used for display contrast fine adjustment, the VLCD4 pin must be connected to
ground.
Sample Application Circuit 4
1/9 duty, 1/4 bias drive technique (for use with large panels)
LCD panel
+5V
VDD
VSS
+8V
VLCD
R
R
R
C
C
C
R
VLCD 0
VLCD 1
VLCD 2
VLCD 3
VLCD 4 *2
C≥0.047μF
10kΩ≥R≥2.2kΩ
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
S75/COM9
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
OSC
S71
S72
S73
COM10/S74
From
the controller
INH
CE
CL
DI
P1
P2
P3
P4
General-purpose output ports
Used with the backlight
controller or other circuit.
Note: *2. If a variable resistor is not used for display contrast fine adjustment, the VLCD4 pin must be connected to
ground.
No.6473-33/35
LC75878W
Sample Application Circuit 5
1/10 duty, 1/4 bias drive technique (for use with normal panels)
LCD panel
+5V
COM1
VDD
VSS
+8V
OPEN
C
C
C
VLCD
VLCD0
VLCD1
VLCD2
VLCD3
COM2
COM3
COM4
COM5
COM6
COM7
COM8
S75/COM9
S74/COM10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
VLCD4 *2
C≥0.047μF
OSC
S71
S72
S73
INH
CE
CL
DI
From
the controller
P1
P2
P3
P4
General-purpose output ports
Used with the backlight
controller or other circuit.
Note: *2. If a variable resistor is not used for display contrast fine adjustment, the VLCD4 pin must be connected to
ground.
Sample Application Circuit 6
1/10 duty, 1/4 bias drive technique (for use with large panels)
VDD
+5V
VSS
VLCD
+8V
R
R
R
C
C
C
R
VLCD0
VLCD1
VLCD2
VLCD3
VLCD4 *2
C≥0.047μF
10kΩ≥R≥2.2kΩ
OSC
COM 1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
S75/COM9
S74/COM10
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S71
S72
S73
From
the controller
INH
CE
CL
DI
P1
P2
P3
P4
General-purpose output ports
Used with the backlight
controller or other circuit.
Note: *2. If a variable resistor is not used for display contrast fine adjustment, the VLCD4 pin must be connected to
ground.
No.6473-34/35
LC75878W
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using
products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd.
products described or contained herein.
SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all
semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or
malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise
to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt
safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not
limited to protective circuits and error prevention circuits for safe design, redundant design, and structural
design.
In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are
controlled under any of applicable local export control laws and regulations, such products may require the
export license from the authorities concerned in accordance with the above law.
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise,
without the prior written consent of SANYO Semiconductor Co.,Ltd.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the
SANYO Semiconductor Co.,Ltd. product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed
for volume production.
Upon using the technical information or products described herein, neither warranty nor license shall be granted
with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third
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intellectual property rights which has resulted from the use of the technical information and products mentioned
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This catalog provides information as of October, 2010. Specifications and information herein are subject
to change without notice.
PS No.6473-35/35