EMIF01-1003M3 1 line IPAD™, EMI filter and ESD protection in Micro QFN package Features ■ Single line EMI symmetrical (I/O) low-pass filter ■ High efficiency in EMI filtering ■ Very low PCB space consumption: – 1.0 mm x 0.6 mm ■ Very thin package: 0.6 mm max ■ High efficiency in ESD suppression (IEC 61000-4-2 level 4) ■ High reliability offered by monolithic integration ■ High reduction of parasitic elements through integration and wafer level packaging ■ Lead free package ■ Easy layout and flexibility due to single line topology ■ Low capacitance SOT-883 (JEDEC MO-236AA compliant) Figure 1. Pin configuration (top view) IN GND Complies with following standards ■ ■ OUT IEC 61000-4-2 level 4 input and output pins: – 15 kV (air discharge) – 8 kV (contact discharge) MIL STD 883G - Method 3015-7 Class 3B (all pins) Figure 2. Basic cell configuration Input Output R = 100 Ω CLINE = 30 pF typ. @ 0 V Applications Where EMI filtering in ESD sensitive equipment is required: ■ Keyboard for mobile phones ■ Computers and printers ■ Communication systems ■ MCU boards Description The EMIF01-1003M3 is a 1 line highly integrated device designed to suppress EMI/RFI noise in all systems exposed to electromagnetic interference. This filter includes ESD protection circuitry, which prevents damage to the application when subjected to ESD surges up to 15 kV on all pins. TM: IPAD is a trademark of STMicroelectronics November 2010 Doc ID 13976 Rev 2 1/11 www.st.com 11 Characteristics EMIF01-1003M3 1 Characteristics Table 1. Absolute ratings (limiting values at Tamb = 25° C unless otherwise specified) Symbol VPP Parameter ESD discharge IEC 61000-4-2 air discharge on input and output pins ESD discharge IEC 61000-4-2 contact discharge on input and output pins Junction temperature Value Unit 15 8 kV 125 °C Top Operating temperature range -40 to + 85 °C Tstg Storage temperature range -55 to +150 °C Tj Figure 3. Electrical characteristics (definitions) I Symbol VBR IRM VRM VCL RD IPP IR Cline FO Table 2. = = = = = = = = = Parameter Breakdown voltage Leakage current @ VRM Stand-off voltage Clamping voltage Dynamic resistance Peak pulse current Breakdown current Line capacitance Cut-off frequency IF VF VCL VBR VRM IPP Electrical characteristics (Tamb = 25° C) Symbol Test conditions Min. Typ. 5 6.5 VBR IR = 1 mA IRM VRM = 3 V per line RI/O Tolerance ± 10% 100 Cline VR= 0 VDC, VOSC = 30 mV, F = 1 MHz 30 S21 F = 900 MHz 2/11 V IRM IR Doc ID 13976 Rev 2 Max. Unit 8 V 100 nA Ω 39 pF -25 dB EMIF01-1003M3 Figure 4. 0.00 Characteristics S21 attenuation measurement (Vbias = 0 V) Figure 5. Line capacitance versus reverse voltage applied (typical value) dB C LINE (pF) 3.50E+01 -5.00 3.00E+01 -10.00 2.50E+01 2.00E+01 -15.00 1.50E+01 -20.00 1.00E+01 F (Hz) -30.00 100.0k V R (V) 5.00E+00 -25.00 1.0M 10.0M 0.00E+00 100.0M 0 1.0G 1 2 3 4 5 I-O Figure 6. ESD response to IEC 61000-4-2 (+15 kV air discharge) Figure 7. ESD response to IEC 61000-4-2 (- 15 kV air discharge) INPUT INPUT OUTPUT OUTPUT Doc ID 13976 Rev 2 3/11 Application schematic 2 EMIF01-1003M3 Application schematic Figure 8. Application schematic Keypad protection Key_Row_1 IN OUT GND Key_Row_2 IN OUT GND Key_Col_y IN OUT GND 4/11 Doc ID 13976 Rev 2 EMIF01-1003M3 3 Ordering information Ordering information Figure 9. Ordering information scheme EMIF yy - xxx z Mx EMI Filter Number of lines Information x = resistance value (Ohms) z = capacitance value / 10(pF) Package M3 = SOT-883 Doc ID 13976 Rev 2 5/11 Package information 4 EMIF01-1003M3 Package information ● Epoxy meets UL94, V0 ● Lead-free packages In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Table 3. SOT-883 dimensions Dimensions E Ref. Min. D b Min. Typ. Max. 0.50 0.18 0.2 A1 0.00 0.05 0.00 0.02 b 0.10 0.15 0.20 0.04 0.06 0.08 b1 0.45 0.50 0.55 0.18 0.20 0.22 D 0.60 0.24 E 1.00 0.39 e 0.35 0.14 e1 0.65 0.26 L1 3 Max. 0.45 2 e Typ. Inches A A A1 L Millimeters b1 1 e1 L 0.20 0.25 0.30 0.08 0.10 0.12 L1 0.20 0.25 0.30 0.08 0.10 0.12 Figure 10. Footprint (dimensions in mm) Figure 11. Marking 0.40 0.40 2 F 0.50 0.20 0.15 1 0.40 6/11 Doc ID 13976 Rev 2 3 EMIF01-1003M3 Package information Figure 12. Tape and reel specification 3.5 ±- 0.05 F F F 0.70 ± 0.05 F F F Note: F All dimensions in mm 1.15 ± 0.05 8.0 ± 0.3 0.55 ± 0.05 Ø 1.55 ± 0.05 4.0 ± 0.1 1.75 ± 0.1 2.0 ± 0.05 2.0 ± 0.1 User direction of unreeling Product marking may be rotated by 90° for assembly plant differentiation. In no case should this product marking be used to orient the component for its placement on a PCB. Only pin 1 mark is to be used for this purpose. Doc ID 13976 Rev 2 7/11 Recommendation on PCB assembly EMIF01-1003M3 5 Recommendation on PCB assembly 5.1 Stencil opening design 1. General recommendation on stencil opening design a) Stencil opening dimensions: L (Length), W (Width), T (Thickness). Figure 13. Stencil opening dimensions L T b) W General Design Rule Stencil thickness (T) = 75 ~ 125 µm W Aspect Ratio = ----- ≥ 1.5 T L×W Aspect Area = ---------------------------- ≥ 0.66 2T ( L + W ) 2. 5.2 8/11 Reference design a) Stencil opening thickness: 100 µm b) Stencil opening for leads: Opening to footprint ratio is 90%. Solder paste 1. Halide-free flux qualification ROL0 according to ANSI/J-STD-004. 2. “No clean” solder paste is recommended. 3. Offers a high tack force to resist component movement during high speed 4. Solder paste with fine particles: powder particle size is 20-45 µm. Doc ID 13976 Rev 2 EMIF01-1003M3 5.3 5.4 5.5 Recommendation on PCB assembly Placement 1. Manual positioning is not recommended. 2. It is recommended to use the lead recognition capabilities of the placement system, not the outline centering 3. Standard tolerance of ± 0.05 mm is recommended. 4. 3.5 N placement force is recommended. Too much placement force can lead to squeezed out solder paste and cause solder joints to short. Too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages. 5. To improve the package placement accuracy, a bottom side optical control should be performed with a high resolution tool. 6. For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder paste printing, pick and place and reflow soldering by using optimized tools. PCB design preference 1. To control the solder paste amount, the closed via is recommended instead of open vias. 2. The position of tracks and open vias in the solder area should be well balanced. The symmetrical layout is recommended, in case any tilt phenomena caused by asymmetrical solder paste amount due to the solder flow away. Reflow profile Figure 14. ST ECOPACK® recommended soldering reflow profile for PCB mounting Temperature (°C) 260°C max 255°C 220°C 180°C 125 °C 2°C/s recommended 2°C/s recommended 6°C/s max 6°C/s max 3°C/s max 3°C/s max 0 0 1 2 3 4 5 10-30 sec 90 to 150 sec Note: 6 7 Time (min) 90 sec max Minimize air convection currents in the reflow oven to avoid component movement. Doc ID 13976 Rev 2 9/11 Ordering information 6 EMIF01-1003M3 Ordering information Table 4. Ordering information Part number Marking Package Weight Base qty Delivery mode EMIF01-1003M3 F(1) SOT-883 0.96 mg 12000 Tape and reel (7”) 1. The marking can be rotated by 90° to diferentiate assembly location 7 Revision history Table 5. 10/11 Document revision history Date Revision Changes 07-Oct-2007 1 Initial release. 03-Nov-2010 2 Updated base quantity Table 4. Doc ID 13976 Rev 2 EMIF01-1003M3 Please Read Carefully: Information in this document is provided solely in connection with ST products. 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