STMICROELECTRONICS E

TDA7479
Single chip RDS demodulator + filter
Features
■
Very high RDS demodulation quality with
improved digital signal processing
■
High performance, 57 kHz bandpass filter
(8th order)
■
FIlter adjustment free and without external
components
■
Purely digitaL RDS Demodulation without
external components
■
ARI (SK indication) and RDS signal quality
output
■
4.332 MHz crystal oscillator
(8.664 and 17.328 MHz optional)
■
Low noise CMOS technology
■
Low radiation
SO16
TSSOP16
Description
The TDA7479 recovers the additional inaudible
RDS information which is transmitted by FM radio
broadcasting stations and operates in accordance
with the EBU (European Broadcasting Union)
specifications.
Table 1.
The device is made up of two sections: a
cascaded antialiasing + switched capacitors 8th
bandpass filter for precise RDS band selection
and a demodulating section that performs the
extraction od RDS data stream (RDDA) and clock
(RDCL), to be further processed by a suitable
RDS decoder.
Outputs for RDS signal quality and ARI indication
are also present.
Device summary
Order code
Package
Packing
E-TDA7479D(1)
SO16
Tube
E-TDA7479AD(1)
TSSOP16
Tube
1. Device in ECOPACK® package (see Section 5: Package information on page 9).
November 2008
Rev 7
1/12
www.st.com
12
Contents
TDA7479
Contents
1
2
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3
Output timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4
Oscillator controls (FSEL, OSEL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
5
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
6
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2/12
TDA7479
Block diagram and pin description
1
Block diagram and pin description
1.1
Block diagram
Figure 1.
Block diagram
C1 27pF
T57
4.332MHz
C2 47pF
OSCIN
OSCOUT
13
15
14
4
MPX
2nd ORDER
ANTIALIASING
FILTER
270pF
5
OSCILLATOR &
DIVIDER
9
16
FILOUT
8th ORDER
SC-BANDPASS
FILTER
8
1187.5Hz
PLL
57KHz PLL
7
1
FAST ARI
INDICATOR
12
VS
QUAL DET.
OSEL
FSEL
RDCL
ARI
QUAL
100nF
VREF
-
3
POLARITY
BIPHASE DEC.
+
0
1
10μF
MUX
DIFF. DECODER
10
INTEGRAL
BIPHASE DEC.
TEST LOGIC
6
RDDA
TM
11
GND
1.2
2
EXTRES
D97AU751A
Pin description
Figure 2.
Pin connection (top view)
QUAL
1
16
RDCL
RDDA
2
15
T57
VREF
3
14
OSCOUT
MPX
4
13
OSCIN
OSEL
5
12
VS
GND
6
11
EXTRES
ARI
7
10
TM
FILOUT
8
9
FSEL
D97AU752
3/12
Block diagram and pin description
Table 2.
Pin description
No pin
Name
1
QUAL
Output for signal quality indication (High = good)
2
RDDA
RDS data output
3
VREF
Reference voltage
4
MPX
RDS input signal
5
OSEL
Oscillator selector pin:
– open, closed to VS = quartz oscillator
– closed to GND = external driven
6
GND
Ground
7
ARI
Output for ARI indication:
– high when RDS+ARI are present
– high when only ARI is present
– low when only RDS is present
– undefined when nos signal is present
8
FILOUT
9
10
11
FSEL
TM
Description
Filter output
Frequency selector pin:
– 100 kHz to VS = 17.328 MHz
– open = 4.332MHz
– closed to VS = 8.664 MHz
Test mode pin:
– open = normal operation
– closed to VS = test mode
Reset pin:
EXTRES – open = run mode
– -closed to VS = reset condition
12
VS
Supply voltage
13
OSCIN
Oscillator input
14
4/12
TDA7479
OSCOUT Oscillator output
15
T57
16
RDCL
Testing output pin: 57 kHz clock output
RDS clock output 1187.5 Hz
TDA7479
Electrical specification
2
Electrical specification
2.1
Thermal data
Table 3.
Thermal data
Symbol
Rth j-case
2.2
Parameter
Thermal resistance junction to case
SO16
TSSOP16
Unit
200
160
°C/W
Max.
Absolute maximum ratings
Table 4.
Absolute maximum ratings
Symbol
Parameter
Unit
VS
Supply voltage
-0.3 to 7
V
Top
Operating temperature range
-40 to 85
°C
Tstg
Storage temperature
-55 to 150
°C
2.3
Electrical characteristics
Table 5.
Electrical characteristics
(Tamb = 25°C, VS = 5V, unless otherwise specified)
Symbol
Value
Parameter
VS
Supply voltage
IS
Supply current
Test condition
Min.
Typ.
Max.
Unit
4.5
5
5.5
V
7.5
11.0
mA
Filter
fC
BW
G
A
Center frequency
56.5
57
57.5
kHz
3dB Bandwidth
2.5
3
3.5
kHz
f = 57 kHz
18
20
22
dB
Δf ± 4 kHz
18
22
dB
f = 38 kHz
50
60
dB
f = 67 kHz
35
45
dB
120
Gain
Attenuation
RI
Input impedance of MPX
80
RL
Load impedance on FILOUT
1
S/N
Signal to noise ratio
VIN = 3 mVrms
MPX input signal
f = 19 kHz; T3 ≤ 40
f = 57 kHz (RDS+ ARI)
VIN
30
dB(1)
150
KΩ
MΩ
40
dB
1000
50
mVRMS
mVRMS
SRDS
RDS detection sensitivity
1
mVrms
SARI
ARI Detection Sensitivity
3
mVrms
5/12
Electrical specification
Table 5.
TDA7479
Electrical characteristics (continued)
(Tamb = 25°C, VS = 5V, unless otherwise specified)
Symbol
Parameter
VREF
Test condition
Min.
Reference
Typ.
Max.
VS/2
Unit
V
Demodulator
Input pins (EXTRES, FSEL, TM:)
Input pin (OSEL):
all with internal pull down resistor
with internal pull up resistor
IPD
Input current
VIN = 5 V (pull-down input)
15
30
μA
IPU
Input current
VIN = 0 V (pull-up input)
-25
-10
μA
VIH
Input voltage high
VIL
Input voltage low
0.7 · VS 0.8 · VS
V
0.2 · VS 0.3 · VS
V
Output pins (RDCL, RDDA, ARI, QUAL, T57)
VOH
Output voltage high
IL = 0.5mA
4
4.6
VOL
Output voltage low
IL = 0.5mA
Input level OSCIN pin
OSEL = open circuit
Input level OSCIN pin
OSEL = open circuit
Amplitude OSCOUT
OSEL = open circuit
4.5
V
OSEL = GND, f = 4.332 MHz
OSEL = GND, f = 8.664 MHz
100
120
mVpp
mVpp
OSEL = GND, f = 17.328 MHz
150
mVpp
0.4
V
1
V
1
V
Oscillator
VCLL
VCLH
Amplitude OSCIN
(for external drive)
VPP
1. The
6/12
3rd
4
harmonic (57 kHz) must be less than -40 dB with respect to the input signal plus gain.
V
TDA7479
3
Output timing
Output timing
The RDS (1187.5Hz) output clock on RDCL line is synchronized to the incoming data. According
to the internal PLL lock condition data change can result on the falling or on the rising clock edge
(see Figure 3). Whichever clock edge is used by the decoder (rising or falling edge) the data will
remain valid for 416.7 µs after the clock transition.
Figure 3.
RDS timing diagram
RDCL
CLOCK
LINE
DATA
LINE
RDDA
4.3µs
td
837.7µs
421µs 421µs
4.3µs
7/12
Oscillator controls (FSEL, OSEL)
4
TDA7479
Oscillator controls (FSEL, OSEL)
Three different crystal frequencies can be used. The adoption of the internal clock divider to
the external crystal is achieved via the input pin FSEL. See the following table for reference:
Table 6.
Crystal frequencies
Crystal
4.332MHz
8.664MHz
17.328MHz
FSEL (pin configuration)
connected to GND or open connected to Vs external resistor of 100K to Vs
A special mode is introduced to reduce EMI. With pin OSEL connected to GND the internal
oscillator is switched off and an external sinusoidal frequency could be applied on OSCIN.
The peak to peak voltage of this signal can be reduced down to 60mV.
In this mode the frequency selection via FSEL is still active.
Suggested values of C1 and C2 are shown in the following table:
Table 7.
8/12
C1 and C2 value
Crystal
C1
C2
4.332MHz
8.664MHz
17.328MHz
27pF
27pF
27pF
47pF
-
TDA7479
5
Package information
Package information
In order to meet environmental requirements, ST (also) offers these devices in ECOPACK®
packages. ECOPACK® packages are lead-free. The category of second Level Interconnect
is marked on the package and on the inner box label, in compliance with JEDEC Standard
JESD97. The maximum ratings related to soldering conditions are also marked on the inner
box label.
ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
Figure 4.
SO16 mechanical data and package dimensions
mm
inch
DIM.
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
A
2.35
2.65
0.093
0.104
A1
0.10
0.30
0.004
0.012
B
0.33
0.51
0.013
0.200
C
0.23
0.32
0.009
0.013
D (1)
10.10
10.50
0.398
0.413
E
7.40
7.60
0.291
0.299
e
1.27
0.050
H
10.0
10.65
0.394
0.419
h
0.25
0.75
0.010
0.030
L
0.40
1.27
0.016
0.050
k
ddd
OUTLINE AND
MECHANICAL DATA
0˚ (min.), 8˚ (max.)
0.10
0.004
(1) “D” dimension does not include mold flash, protusions or gate
burrs. Mold flash, protusions or gate burrs shall not exceed
0.15mm per side.
SO16 (Wide)
0016021 C
9/12
Package information
Figure 5.
TDA7479
TSSOP16 mechanical data and package dimensions
mm
inch
DIM.
MIN.
TYP.
A
MAX.
MIN.
TYP.
1.200
A1
0.050
A2
0.800
b
0.190
1.000
MAX.
0.047
0.150
0.002
1.050
0.031
0.300
0.007
0.200
0.005
5.100
0.114
0.006
0.039
0.041
0.012
c
0.090
D (1)
4.900
E
6.200
6.400
6.600
0.244
0.252
0.260
E1 (1) 4.300
4.400
4.500
0.170
0.173
0.177
e
L
L1
k
aaa
5.000
0.650
0.450
0.600
OUTLINE AND
MECHANICAL DATA
0.009
0.118
0.122
0.026
0.750
0.018
1.000
0.024
0.030
0.039
0˚ (min.) 8˚ (max.)
0.100
0.004
Note: 1. D and E1 does not include mold flash or protrusions.
Mold flash or potrusions shall not exceed 0.15mm
(.006inch) per side.
TSSOP16
(Body 4.4mm)
0080338 (Jedec MO-153-AB)
10/12
TDA7479
6
Revision history
Revision history
Table 8.
Document revision history
Date
Revision
10-Sep-2004
4
Initial release.
20-Nov-2004
5
Add in Table 5: Electrical characteristics on page 5 the “RDS and
ARI Detection Sensitivity” parameters.
02-Dec-2004
6
Modified the order codes table.
7
Document reformatted.
Updated Table 1: Device summary on page 1.
Updated Section 5: Package information on page 9.
04-Nov-2008
Changes
11/12
TDA7479
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