DR-11800 16-BIT DIGITAL-TO-RESOLVER CONVERTER FEATURES DESCRIPTION The DR-11800 is a small size, high accuracy, 16-bit digital-to-sine/cosine converter. Available in accuracies up to 1 arc minute, the DR-11800 is contained in a 28-pin, one-square-inch hermetically sealed package and requires +15 Vdc and -15 Vdc power supplies. The reference conditioner allows for either 115 Vrms or 26 Vrms reference input for a 6.8 Vrms sin/cos output. Two registers for the input of the 16-bit (CMOS/TTL) natural binary angle data allow for compatibility with an 8-bit or 16-bit data bus. Internally, the DR-11800 has a multiplying digital-to-sin/cos converter made of two function generators and a quadrant select network. Quadrant information is available from the two most significant bits. The two function generators use the remaining angular data along with the buffered reference voltage. Similar to a multiplying DAC (digital-to-analog converter), the DR- 11800 uses high accuracy resistive ladder networks and solid state switching to control the attenuation of the reference voltage. The output buffer amplifiers allow for up to 2 mA output drive. • 28-Pin Square Package • 1 Arc Minute Accuracy • 0.03% Radius Accuracy • Microprocessor Compatible - APPLICATIONS 8- and 16-Bit High accuracy, high reliability, small size, low power consumption and MIL-PRF-38534 processing availability, make the DR-11800 suitable for industrial and military ground or avionics applications. Possible applications include digital remote positioning, resolver angle simulators, flight trainer, flight instrumentation, radar and navigational systems, and PPI displays including moving target indicators. Other applications are synchro/resolver system development and test, and wraparound test of synchro/resolver-to-digital converters. • Double-Buffered Inputs • Pin-Programmable Reference Input (for 26 and 115 Vrms) • DC-Coupled Reference and Outputs • Requires Only ±15 V Power Supplies • TTL and CMOS Compatible • Pin-for-Pin Replacement for Natel’s HDR2406 +VS –VS 24 25 HBE 9 (MSB) B1 1 CK B2 2 Q1 8-BIT INPUT REGISTER B3 3 B4 4 B5 5 (MSB BIT 1) D B9 11 B10 12 B11 13 B12 14 B13 15 INPUT BUFFERS B6 6 B7 7 B8 8 16-BIT HOLDING REGISTER BUFFER AMPLIFIERS D Q16 (LSB) B16 18 28 SINθ 20 COSθ 8-BIT INPUT REGISTER B14 16 B15 17 16-BIT HIGH ACCURACY MULTIPLYING DIGITAL TO SIN / COS CONVERTER CK CK PE BIT 16 (LSB) LBE 10 LDC 19 + REFERENCE CONDITIONER 23 GND 21 27 22 RL26 RH115 RL115 26 RH26 FIGURE 1. DR-11800 BLOCK DIAGRAM © 1996, 1999 Data Device Corporation TABLE 1. DR-11800 SPECIFICATIONS PARAMETER VALUE REMARKS DIGITAL ANGULAR Resolution 16 Bits Bit 1 = MSB, Bit 16 = LSB Accuracy ±4 arc-minutes Accuracy applies over ±2 arc-minutes operating temperature ±1 arc-minutes range. TABLE 1. DR-11800 SPECIFICATIONS (CONTINUED) PARAMETER VALUE REMARKS REGISTER CONTROLS (Continued) 200 ηsec min Before data transfer. Data Set-up Time Data Hold Time Before input data 200 ηsec min changes. SCALE FACTOR VARIATION Scale Factor Variation POWER SUPPLIES Supply Voltages (±Vs) Supply Current Supply Rejection ±15 V dc ±10% ±35 mA max 70 db TEMPEATURE RANGES Operating Case -3XXX and -8XXX -1XXX and -4XXX Storage 0°C to +70°C -55°C to +125°C -65°C to +135°C REFERENCE INPUT (RH-RL) Voltage Frequency Range Input Resistance ±0.1% max 115 V rms or 26 V rms dc to 1000 Hz Simultaneous amplitude variation in both outputs as a function of digital angle. Differential solid-state input. PHYSICAL CHARACTERISTICS Type Size Differential 230 kΩ 115 V rms reference Differential 52 kΩ 26 V rms reference ANALOG OUTPUTS Max SIN θ, COS θ 6.8 V rms, ±1.5 % Output Current Output Impedance Zero Offset (dc) 2 mA rms < 1 ohm ±10 mV typical ±25 mV max 25 µV/°C typical, 50 µV/°C max 50 µsec max to accuracy of converter. Offset Drift Output Settling Time DIGITAL INPUTS Logic Levels Logic 0 Logic 1 Loading Input Current Data Bits (B1-B16) HBE, LBE, LDC REGISTER CONTROLS HBE LBE -0.3 Vdc to 0.8 V dc 2.4 Vdc to 5.5 V dc 0.1 TTL load For any digital step change. CMOS transient protected. 8 MSBs enter high byte input register. High byte register remains unaffected. Logic 1 8 LSBs enter low byte input register. Low byte register remains unaffected 600 ηsec min Twice Normal Voltage ±18 V dc -0.3 V dc to +6.5 V dc NOTE. Although digital inputs are CMOS protected, storage in conductive foam is recommended. Logic 1 ’ Logic 0 Logic 0 Pulse Width Op amp output. 15 µA typ, “active” For less than 16 bits, unused pins can float. pull-down to gnd -15 µA typ, “active” Unused pins can float. pull-up to internal logic supply Logic 1 28 Pin Square 1.0 x 1.0 x 0.21 in. (25 x 25 x 5.3) mm 0.6 oz (17 g) max ABSOLUTE MAXIMUM RATINGS Reference Input: Power Supply Voltage (±Vs): Digital Inputs: No external logic voltages required. Logic 0 LDC Weight Output voltage varies in direct proportion to reference voltage. Without output clipping. Typ. Data from input registers transferred to holding register. Data in holding register remains unaffected For guaranteed data transfer. 2 ANALOG OUTPUT PHASING DIGITAL INTERFACE The DR-11800 provides an output of 6.8V sinθ and 6.8V cosθ for either a 26 Vrms reference (use pin 26; RH26, and pin 22; RL26) or 115 Vrms reference (use pin 21; RH115, and pin 27; RL115). FIGURE 2 illustrates the input connection for a 26V or 115V reference. FIGURE 3 illustrates the output phasing. The DR-11800 has double-buffered input registers which allow for easy implementation of an interface with 8-bit or 16-bit data buses. The DR-11800 can also be set up for asynchronous data inputs. If the LBE, HBE and LDC input pins are left open, the internal pull-up circuitry will set these pins to a high state and the information at the data inputs (B1-B16) will be continuously converted to sinθ and cosθ at the analog outputs. In applications requiring less than 16-bit resolution, the unused pins can be left open. The data bits (B1-B16) are internally pulled-down to apply a logic 0 to unconnected data inputs. +VS –VS +VS –VS N/C RL 26 22 26 V REFERENCE N/C RH 115 21 N/C RL115 27 RH26 26 SIN θ RL 26 22 21 SIN θ RH 115 COS θ 115 V REFERENCE COS θ RL 115 27 N/C RH 26 26 16-BIT ANGULAR DATA 16-BIT ANGULAR DATA HBE HBE LBE GND LDC LBE LDC NOTE: N/C NO CONNECTION FIGURE 2. CONNECTIONS TO 26 V/115 V REFERENCE Vmax SIN θ IN PHASE WITH VIN 0˚ 180 90 270 COS θ -Vmax SIN OUTPUT = 6.8V rms(1+n)SINθ COS OUTPUT = 6.8V rms(1+n)COSθ n IS THE SCALE FACTOR VARIATION AS A FUNCTION OF DIGITAL ANGLE(± 0.1%) FIGURE 3. OUTPUT PHASING 3 360˚ θ DEGREES GND DATA TRANSFER FROM AN 8-BIT DATA BUS DATA TRANSFER FROM A 16-BIT DATA BUS Applications with an 8-bit data bus require two-byte loading of the digital input (see FIGURE 4). Applications interfacing with a 16-bit data bus require only single byte loading, as shown in FIGURE 6. LBE and HBE are either unconnected or tied together and pulsed high to load data. FIGURE 5 shows the timing for two-byte data transfers. As shown in the timing diagram (see FIGURE 7) 200 nsec after the data is stable the LDC is set high (logic 1) to transfer the data to the holding register. Since LDC is level actuated, it must remain high for the time specified (600 nsec) to transfer the data. 1. LDC is low (logic 0) so that the contents of the holding register are latched and will remain unaffected by the changes on the input registers. 2.When the LBE is set high (logic 1) the 8 LSBs (B9-B16) are transferred to the low byte. The LBE must remain high for a minimum of 800 nsec after the data is stable. The data should remain stable for 200 nsec after the LBE is set low (logic 0). 8 LSBs TRANSFERRED TO INPUT REGISTERS 3.When the HBE is set high (logic 1) the 8 MSBs (B1-B8) are transferred to the low byte. The HBE must remain high for a minimum of 800 nsec after the data is stable. The data should remain stable for 200 nsec after the HBE is set low (logic 0). DATA CHANGING DATA STEADY (MSBs) (LSBs) DATA DATA SET UP 4.When the LDC is set high (logic 1) the data is transferred from the two input registers to the holding register. The LDC should be held high for 600 nsec minimum. Once the LDC is set low, the cycle can begin again. 200 ns MIN 8 MSBs TRANSFERRED TO INPUT REGISTERS PULSE WIDTH 600 ns MIN LBE Note: LBE, HBE, and LDC are level-actuated functions. DATA HOLD 200ns MIN HBE 600 ns MIN 600ns MIN PULSE WIDTH LDC 1 DATA TRANSFERRED TO HOLDING REGISTERS FIGURE 5. TIMING FOR 8-BIT BUS TRANSFER 2 3 4 5 6 DATA BUS (MSB) (LSB) 7 LBE LOAD LSBs HBE LOAD MSBs LDC LOAD CONVERTER 8 DR-11800 11 D7 D6 12 D5 13 B1 1 D4 14 B2 2 D3 15 B3 3 D2 16 B4 4 D1 17 B5 5 D0 18 B6 6 B7 7 B8 8 (MSB) HBE LBE B9 11 B10 12 B11 B12 13 14 B13 15 B14 16 B15 17 DR-11800 10 9 19 LBE HBE LDC NOT CONNECTED OR LOAD DATA PULSE LOAD CONVERTER 18 B16 (LSB) FIGURE 4. DATA TRANSFER FROM 8-BIT BUS FIGURE 6. DATA TRANSFER FROM 16-BIT BUS 4 DIGITAL-TO-RESOLVER/SYNCHRO CONVERTERS The DR-11800 provides single-ended sin/cos outputs. FIGURE 8 shows the DR-11800 connected as a 4-Wire Digitalto-Resolver Converter (S1, S2, S3, and S4) using external Power Amplifiers and transformers. DATA TRANSFERRED TO INPUT REGISTERS FIGURE 9 shows the DR-11800 connected as a 3-Wire Digitalto-Synchro Converter (S1, S2, and S3) using external Power Amplifiers and transformers. DATA STEADY DATA CHANGING DATA ALL 16 BITS POWER SUPPLY DECOUPLING 200 ns MIN 200 ns MIN HBE LBE Decoupling capacitors are recommended on the +Vs and -Vs supplies. A 1 µF tantalum capacitor in parallel with a 0.01 µF ceramic capacitor should be mounted as close to the supply as possible. 600 ns MIN DATA TRANSFERRED TO HOLDING REGISTERS 600 ns MIN LDC FIGURE 7. TIMING FOR 16-BIT BUS TRANSFER RH RL 1:n RH RH RL 28 SIN θ P.A. RL 1:N S1 1:n RH RL 28 SIN θ 1:N P.A. S1 S3 S3 DR-11800 DR-11800 20 16-BIT ANGULAR DATA COS θ P.A. 1:N 20 S4 S2 16-BIT ANGULAR DATA FIGURE 8. 4-WIRE DIGITAL-TO-RESOLVER CONVERTER COS θ P.A. 1: √ 3 N 2 S2 FIGURE 9. 3-WIRE DIGITAL-TO-SYNCHRO CONVERTER 5 TABLE 2. DR-11800 PINOUTS PIN FUNCTION PIN FUNCTION 1 B1 15 B13 2 B2 16 B14 3 B3 17 B15 4 B4 18 B16 5 B5 19 LDC 6 B6 20 COS θ 7 B7 21 RL115 8 B8 22 RL26 9 HBE 23 GND 10 LBE 24 +Vs 11 B9 25 -Vs 12 B10 26 RH26 13 B11 27 RH115 14 B12 28 SIN θ BOTTOM VIEW .995 ± .020 (25.2) 15 16 17 .800 (20.3) 18 19 .10 TYP .100 (2.54) 20 22 13 23 12 24 11 25 10 26 9 27 8 28 6 5 4 3 2 SIDE VIEW 1 TOLERANCES .XX = ± .02 .XXX = ± .005 NOTES: 1. CASE IS ELECTRICALLY FLOATING 2. CONTAINER IS KOVAR ELECTROLESS NICKEL PLATED. 100 TO 200 MICRO INCHES THK. PINS GOLD PLATED PER MIL-G-45204 TYPE 1 CLASS 150 MICRO INCHES THK. 3. DESIGNATIONS ARE FOR REFERENCE ONLY AND DO NOT APPEAR ON UNIT. 4. PIN #1 IS DESIGNATED BY A CONTRASTING COLORED BEAD 5. DIMENSIONS SHOWN IN INCHES AND (MM). 21 14 7 .10 (2.54) .100 TYP (2.54) ± .020 .995 (25.2) .800 (20.3) .100 TYP (2.54) .018 DIA. TYP. (0.46) .20 (5.1) DENOTES PIN 1 .25 TYPICAL (6.3) FIGURE 10. DR-11800 MECHANICAL OUTLINE 6 ORDERING INFORMATION DR-11800DX-XXXX Supplemental Process Requirements: S = Pre-Cap Source Inspection L = Pull Test Q = Pull Test and Pre-Cap Inspection K = One Lot Date Code W = One Lot Date Code and PreCap Source Y = One Lot Date Code and 100% Pull Test Z = One Lot Date Code, PreCap Source and 100% Pull Test Blank = None of the Above Accuracy: 3 = ±4 Minutes 4 = ±2 Minutes 5 = ±1 Minute Process Requirements*: 0 = Standard DDC Processing, no Burn-In (See table below.) 2 = B* 6 = B* with PIND Testing 7 = B* with Solder Dip 8 = B* with PIND Testing and Solder Dip 9 = Standard DDC Processing with Solder Dip, no Burn-In (See table below.) Temperature Grade/Data Requirements: 1 = -55°C to +125°C 2 = -40°C to +85°C 3 = 0°C to +70°C 4 = -55°C to +125°C with Variables Test Data 5 = -40°C to +85°C with Variables Test Data 8 = 0°C to +70°C with Variables Test Data Frequency Range: 4 = DC to 1 kHz * For availability of Fully Compliant MIL-PRF-38534 parts, please contact the DDC office nearest you. **Standard DDC Processing with burn-in and full temperature test — see table below. STANDARD DDC PROCESSING MIL-STD-883 TEST METHOD(S) CONDITION(S) INSPECTION 2009, 2010, 2017, and 2032 — SEAL 1014 A and C TEMPERATURE CYCLE 1010 C CONSTANT ACCELERATION 2001 A BURN-IN 1015, Table 1 — 7 The information in this data sheet is believed to be accurate; however, no responsibility is assumed by Data Device Corporation for its use, and no license or rights are granted by implication or otherwise in connection therewith. Specifications are subject to change without notice. 105 Wilbur Place, Bohemia, New York 11716-2482 For Technical Support - 1-800-DDC-5757 ext. 7389 or 7413 Headquarters - Tel: (631) 567-5600 ext. 7389 or 7413, Fax: (631) 567-7358 Southeast - Tel: (703) 450-7900, Fax: (703) 450-6610 West Coast - Tel: (714) 895-9777, Fax: (714) 895-4988 Europe - Tel: +44-(0)1635-811140, Fax: +44-(0)1635-32264 Asia/Pacific - Tel: +81-(0)3-3814-7688, Fax: +81-(0)3-3814-7689 World Wide Web - http://www.ddc-web.com ILC DATA DEVICE CORPORATION REGISTERED TO ISO 9001 FILE NO. A5976 A-02/98-1M PRINTED IN THE U.S.A. 8