SCES507 − NOVEMBER 2003
D Available in the Texas Instruments
D
D
D
D
D
D
D
D
DCT OR DCU PACKAGE
(TOP VIEW)
NanoStar and NanoFree Packages
Operates at 0.8 V to 2.7 V
Sub 1-V Operable
Max tpd of 0.5 ns at 1.8 V
Low Power Consumption, 10 µA at 2.7 V
High On-Off Output Voltage Ratio
High Degree of Linearity
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Performance Tested Per JESD 22
− 2000-V Human-Body Model
(A114-B, Class II)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
1A
1B
2C
GND
1
8
2
7
3
6
4
5
VCC
1C
2B
2A
YEP OR YZP PACKAGE
(BOTTOM VIEW)
GND
2C
1B
1A
4 5
3 6
2 7
1 8
2A
2B
1C
VCC
description/ordering information
This dual analog switch is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.1-V to 2.7-V VCC
operation.
The SN74AUC2G66 can handle both analog and digital signals. It permits signals with amplitudes of up to 2.7-V
(peak) to be transmitted in either direction.
NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for
analog-to-digital and digital-to-analog conversion systems.
ORDERING INFORMATION
−40°C to 85°C
ORDERABLE
PART NUMBER
PACKAGE†
TA
TOP-SIDE
MARKING‡
NanoStar − WCSP (DSBGA)
0.23-mm Large Bump − YEP
Tape and reel
SN74AUC2G66YEPR
NanoFree − WCSP (DSBGA)
0.23-mm Large Bump − YZP (Pb-free)
Tape and reel
SN74AUC2G66YZPR
SSOP − DCT
Tape and reel
SN74AUC2G66DCTR
U66_ _ _
VSSOP − DCU
Tape and reel
SN74AUC2G66DCUR
U66_
_ _ _U6_
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
‡ DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one
following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition
(1 = SnPb, • = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar and NanoFree are trademarks of Texas Instruments.
Copyright 2003, Texas Instruments Incorporated
!" #!$% &"'
&! #" #" (" " ") !"
&& *+' &! #", &" ""%+ %!&"
", %% #""'
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1
SCES507 − NOVEMBER 2003
FUNCTION TABLE
CONTROL
INPUT
(C)
SWITCH
L
OFF
H
ON
logic diagram (positive logic)
1
2
A
B
4
C
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 3.6 V
Input voltage range, VI (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 3.6 V
Switch I/O voltage range, VI/O (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V
Control input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
I/O port diode current, IIOK (VI/O < 0 or VI/O > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
On-state switch current, IT (VI/O = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA
Package thermal impedance, θJA (see Note 3): DCT package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C/W
DCU package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 227°C/W
YEP/YZP package . . . . . . . . . . . . . . . . . . . . . . . . . . . 102°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltages are with respect to ground unless otherwise specified.
2. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
2
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SCES507 − NOVEMBER 2003
recommended operating conditions (see Note 4)
VCC
VIH
Supply voltage
VCC = 0.8 V
VCC = 1.1 V to 1.95 V
High-level input voltage
VI/O
VI
∆t/∆v
MAX
0.8
2.7
V
0
0.35 × VCC
V
0.7
I/O port voltage
0
Control input voltage
VCC
3.6
0
Input transition rise or fall rate
V
1.7
VCC = 1.1 V to 1.95 V
VCC = 2.3 V to 2.7 V
Low-level input voltage
UNIT
VCC
0.65 × VCC
VCC = 2.3 V to 2.7 V
VCC = 0.8 V
VIL
MIN
VCC = 0.8 V to 1.65 V†
VCC = 1.65 V to 2.3 V‡
20
VCC = 2.3 V to 2.7 V‡
20
V
V
20
ns/V
TA
Operating free-air temperature
−40
85
°C
† The data was taken at CL = 15 pF, RL = 2 kΩ (see Figure 1).
‡ The data was taken at CL = 30 pF, RL = 500 Ω (see Figure 1).
NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
ron
ron(p)
∆ron
On-state switch resistance
Peak on resistance
Difference of on-state resistance
between switches
TEST CONDITIONS
VCC
1.1 V
MIN
TYP§
MAX
17
40
VI = VCC or GND,
VC = VIH
(see Figures 1 and 2)
IS = 4 mA
1.65 V
7
20
IS = 8 mA
2.3 V
4
15
VI = VCC to GND,
VC = VIH
(see Figures 1 and 2)
1.1 V
131
180
IS = 4 mA
1.65 V
32
80
IS = 8 mA
2.3 V
15
20
VI = VCC to GND,
VC = VIH
(see Figures 1 and 2)
1.1 V
3
IS = 4 mA
1.65 V
1
IS = 8 mA
2.3 V
1
±1
IS(off)
Off-state switch leakage current
VI = VCC and VO = GND, or
VI = GND and VO = VCC,
VC = VIL (see Figure 3)
2.7 V
IS(on)
On-state switch leakage current
VI = VCC or GND, VC = VIH, VO = Open
(see Figure 4)
2.7 V
II
Control input current
VI = VCC or GND
VI = VCC or GND,
IO = 0
±0.1†
UNIT
Ω
Ω
Ω
µA
A
±1
±0.1†
µA
A
0 to 2.7 V
±5
µA
0.8 V to
2.7 V
10
µA
ICC
Supply current
Cic
Control input capacitance
2.5 V
2.5
pF
Cio(off)
Switch input/output capacitance
2.5 V
3
pF
Cio(on)
Switch input/output capacitance
2.5 V
7
pF
§ TA = 25°C
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3
SCES507 − NOVEMBER 2003
switching characteristics over recommended operating free-air temperature range, CL = 15 pF
(unless otherwise noted) (see Figure 5)
VCC = 0.8 V
VCC = 1.2 V
± 0.1 V
VCC = 1.5 V
± 0.1 V
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
FROM
(INPUT)
TO
(OUTPUT)
tpd†
A or B
B or A
1
ten
C
A or B
5
0.5
3
0.5
2.1
0.5
0.9
1.6
tdis
C
A or B
5.3
0.5
4
0.5
3
0.5
2.6
3.3
PARAMETER
TYP
MIN
MAX
MIN
0.6
MAX
MIN
TYP
0.5
MAX
MIN
0.5
UNIT
MAX
0.4
ns
0.5
1.4
ns
0.5
2.7
ns
† The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance when
driven by an ideal voltage source (zero output impedance).
switching characteristics over recommended operating free-air temperature range, CL = 30 pF
(unless otherwise noted) (see Figure 5)
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
FROM
(INPUT)
TO
(OUTPUT)
tpd†
A or B
B or A
ten
C
A or B
0.5
1.6
2.7
tdis
C
A or B
0.5
2.7
3.4
PARAMETER
MIN
TYP
MAX
MIN
0.7
UNIT
MAX
0.7
ns
0.5
2.3
ns
0.5
2
ns
† The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance when
driven by an ideal voltage source (zero output impedance).
analog switch characteristics, TA = 25°C
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
TEST CONDITIONS
CL = 50 pF, RL = 600 Ω,
fin = sine wave
(see Figure 6)
Frequency response‡
(switch ON)
A or B
B or A
CL = 5 pF, RL = 50 Ω,
fin = sine wave
(see Figure 6)
CL = 50 pF, RL = 600 Ω,
fin = 1 MHz (sine wave)
(see Figure 7)
Crosstalk§
(between switches)
A or B
B or A
CL = 5 pF, RL = 50 Ω,
fin = 1 MHz (sine wave)
(see Figure 7)
‡ Adjust fin voltage to obtain 0 dBm at output. Increase fin frequency until dB meter reads −3 dB.
§ Adjust fin voltage to obtain 0 dBm at input.
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VCC
TYP
0.8 V
101
1.1 V
150
1.4 V
175
1.65 V
250
2.3 V
400
0.8 V
450
1.1 V
>500
1.4 V
>500
1.65 V
>500
2.3 V
>500
0.8 V
−60
1.1 V
−60
1.4 V
−60
1.65 V
−60
2.3 V
−60
0.8 V
−65
1.1 V
−65
1.4 V
−65
1.65 V
−65
2.3 V
−65
UNIT
MHz
dB
SCES507 − NOVEMBER 2003
analog switch characteristics, TA = 25°C (continued)
PARAMETER
FROM
(INPUT)
Crosstalk
(control input to signal output)
TO
(OUTPUT)
C
TEST CONDITIONS
CL = 50 pF, RL = 600 Ω,
fin = 1 MHz (square wave)
(see Figure 8)
A or B
CL = 50 pF, RL = 600 Ω,
fin = 1 MHz (sine wave)
(see Figure 9)
Feed-through attenuation‡
(switch OFF)
A or B
B or A
CL = 5 pF, RL = 50 Ω,
fin = 1 MHz (sine wave)
(see Figure 9)
A or B
CL = 50 pF, RL = 10 kkΩ,,
fin = 1 kHz (sine wave)
(see Figure 10)
B or A
Sine-wave distortion
A or B
CL = 50 pF, RL = 10 kΩ,
fin = 10 kHz (sine wave)
(see Figure 10)
B or A
VCC
TYP
0.8 V
9
1.1 V
14
1.4 V
15
1.65 V
16
2.3 V
20
0.8 V
−50
1.1 V
−50
1.4 V
−50
1.65 V
−50
2.3 V
−50
0.8 V
−60
1.1 V
−60
1.4 V
−60
1.65 V
−60
2.3 V
−60
0.8 V
7
1.1 V
0.25
6
1.4 V
0.04
1.65 V
0.03
2.3 V
0.01
0.8 V
3.7
1.1 V
0.4
1.4 V
0.04
1.65 V
0.02
2.3 V
0.02
UNIT
mV
dB
%
‡ Adjust fin voltage to obtain 0 dBm at input.
operating characteristics, TA = 25°C
PARAMETER
Cpd
Power dissipation
capacitance
TEST
CONDITIONS
f = 10 MHz
VCC = 0.8 V
TYP
2.5
POST OFFICE BOX 655303
VCC = 1.2 V
TYP
VCC = 1.5 V
TYP
2.5
• DALLAS, TEXAS 75265
2.5
VCC = 1.8 V
TYP
2.5
VCC = 2.5 V
TYP
2.5
UNIT
pF
5
SCES507 − NOVEMBER 2003
PARAMETER MEASUREMENT INFORMATION
VCC
VCC
B or A
A or B
VI = VCC or GND
VIH
VO
C
VC
(ON)
GND
IS
r on +
V
VI * VO
W
IS
VI − VO
Figure 1. On-State Resistance Test Circuit
120
VCC = 1.1 V
100
80
60
40
VCC = 1.65 V
20
VCC = 2.3 V
0
0
1
2
Figure 2. Typical ron as a Function of Voltage (VI) for VI = 0 to VCC
6
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3
SCES507 − NOVEMBER 2003
PARAMETER MEASUREMENT INFORMATION
VCC
VCC
VI
A
VIL
B or A
A or B
VO
C
VC
(OFF)
GND
Condition 1: VI = GND, VO = VCC
Condition 2: VI = VCC, VO = GND
Figure 3. Off-State Switch Leakage-Current Test Circuit
VCC
VCC
VI = VCC or GND
A
VIH
B or A
A or B
VO
VO = Open
C
VC
(ON)
GND
Figure 4. On-State Leakage-Current Test Circuit
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SCES507 − NOVEMBER 2003
PARAMETER MEASUREMENT INFORMATION
RL
From Output
Under Test
CL
(see Note A)
VLOAD
Open
S1
GND
RL
LOAD CIRCUIT
TEST
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
VLOAD
GND
INPUTS
VCC
0.8 V
1.2 V ± 0.1 V
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
VI
tr/tf
VCC
VCC
VCC
VCC
VCC
VCC
VCC
≤2 ns
≤2 ns
≤2 ns
≤2 ns
≤2 ns
≤2 ns
≤2 ns
VM
VLOAD
CL
RL
V∆
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
2 × VCC
2 × VCC
2 × VCC
2 × VCC
2 × VCC
2 × VCC
2 × VCC
15 pF
15 pF
15 pF
15 pF
15 pF
30 pF
30 pF
2 kΩ
2 kΩ
2 kΩ
2 kΩ
2 kΩ
1 kΩ
500 Ω
0.1 V
0.1 V
0.1 V
0.15 V
0.15 V
0.15 V
0.15 V
VI
Timing Input
VM
0V
tw
tsu
VI
Input
VM
VM
th
VI
Data Input
VM
VM
0V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VI
VM
Input
VM
0V
tPLH
tPHL
VOH
VM
Output
VM
VOL
tPHL
Output
Waveform 1
S1 at VLOAD
(see Note B)
tPLH
VM
VM
VM
0V
tPZL
tPLZ
VLOAD/2
VM
tPZH
VOH
Output
VI
Output
Control
VM
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
Output
Waveform 2
S1 at GND
(see Note B)
VOL + V∆
VOL
tPHZ
VM
VOH − V∆
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, slew rate ≥ 1 V/ns.
D. The outputs are measured one at a time with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Figure 5. Load Circuit and Voltage Waveforms
8
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SCES507 − NOVEMBER 2003
PARAMETER MEASUREMENT INFORMATION
VCC
VCC
0.1 µF
50 Ω
fin
B or A
A or B
VO
C
VC
VIH
RL
(ON)
GND
CL
VCC/2
RL/CL: 600 Ω / 50 pF
RL/CL: 50 Ω / 5 pF
Figure 6. Frequency Response (Switch ON)
VCC
VCC
0.1 µF
Rin
600 Ω
fin
1B or 1A
1A or 1B
VIH
50 Ω
VO1
RL
600 Ω
C
VC
CL
50 pF
(On)
VCC/2
2B or 2A
2A or 2B
Rin
600 Ω
VIL
VO2
RL
600 Ω
C
VC
(Off)
GND
CL
50 pF
VCC/2
20log10(VO2/VI1) or
20log10(VO1/VI2)
Figure 7. Crosstalk (Between Switches)
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9
SCES507 − NOVEMBER 2003
PARAMETER MEASUREMENT INFORMATION
VCC
VCC
Rin
600 Ω
B or A
A or B
VCC/2
VO
RL
600 Ω
C
VC
GND
CL
50 pF
VCC/2
50 Ω
Figure 8. Crosstalk (Control Input − Switch Output)
VCC
VCC
0.1 µF
fin
50 Ω
B or A
A or B
RL
VIL
VO
C
VC
RL
(OFF)
VCC/2
GND
RL/CL: 600 Ω / 50 pF
RL/CL: 50 Ω / 5 pF
Figure 9. Feed Through, Switch Off
10
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VCC/2
CL
SCES507 − NOVEMBER 2003
PARAMETER MEASUREMENT INFORMATION
VCC
VCC
10 µF
fin
600 Ω
VIH
10 µF
B or A
A or B
VO
RL
10 kΩ
C
VC
(ON)
GND
CL
50 pF
VCC/2
VCC = 0.8 V, VI = 0.7 VP-P
VCC = 1.1 V, VI = 1 VP-P
VCC = 1.4 V, VI = 1.2 VP-P
VCC = 1.65 V, VI = 1.4 VP-P
VCC = 2.3 V, VI = 2 VP-P
Figure 10. Sine-Wave Distortion
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11
MECHANICAL DATA
MPDS049B – MAY 1999 – REVISED OCTOBER 2002
DCT (R-PDSO-G8)
PLASTIC SMALL-OUTLINE PACKAGE
0,30
0,15
0,65
8
0,13 M
5
0,15 NOM
ÇÇÇÇÇ
ÇÇÇÇÇ
ÇÇÇÇÇ
ÇÇÇÇÇ
2,90
2,70
4,25
3,75
Gage Plane
PIN 1
INDEX AREA
1
0,25
4
0° – 8°
3,15
2,75
0,60
0,20
1,30 MAX
Seating Plane
0,10
0,10
0,00
NOTES: A.
B.
C.
D.
4188781/C 09/02
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion
Falls within JEDEC MO-187 variation DA.
POST OFFICE BOX 655303
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