AEROFLEX ACT4435NFP

Standard Products
ACT4435N Transceiver
for H009 Specification
June 18, 2004
FEATURES
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ACT4435N Transceiver meets H009 data bus specifications
Transmitter can be used to drive clock signal line
Operates with ±15 Volts to ±12 Volts power supplies
Direct replacement for CT1641 and CT1816 devices
Voltage source output for higher bus drive power
Plug-in and flat package available
Monolithic construction using linear ASICs
Processed and screened to MIL-STD-883 specs
MIL-PRF-38534 compliant devices available
Aeroflex is a Class H & K MIL-PRF-38534 Manufacturer
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A T 8
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A T 4 -88
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ACT4435NFP / 4435N
GENERAL DESCRIPTION
The Aeroflex Laboratories transceiver model ACT4435N is a new generation monolithic transceiver which provide full compliance with
Macair and MIL-STD-1553 data bus requirements
The model ACT4435N performs the front-end analog function of inputting and outputting data through a transformer to a H009 data bus.
The Design of these transceivers reflects particular attention to active filter performance. This results in low bit and word error rate with
superior waveform purity and minimal zero crossover distortion. The ACT4435N active filter design has additional high frequency roll-off to
provide the required low harmonic distortion waveform without increasing the pulse delay characteristics significantly.
Efficient transmitter electrical and thermal design provides low internal power dissipation and heat rise at high and well as low duty cycles.
An optional receiver input threshold adjustment can be accomplished by the use of the "External Threshold" terminals.
TRANSMITTER
The Transmitter section accepts bi-phase TTL data at the input and when coupled to the data bus with a 1:1 transformer, isolated on the
transceiver side with two 35 Ohm bus terminating resistors, with the bus terminated by a 170 Ohm resistor the data bus signal produced is 20.0
Volts typical P-P at A-A’ (See Figure 5). When both DATA and DATA inputs are held low or high, the transmitter output becomes a low
impedance and signal is “removed” from the line. In addition, an overriding “INHIBIT" input returns the output to a high impedance state. A
logic “1” applied to the “INHIBIT” takes priority over the condition of the data inputs and disables the transmitter (See Transmitter Logic
Waveforms - Figure 1).
The transmitter utilizes an active filter to suppress harmonics above 1 MHz to meet H009 specifications. The transmitter may be safely operated
for an indefinite period at 100% duty cycle into a data bus short circuit.
RECEIVER
The Receiver section accepts bi-phase differential data at the input and produces two TTL signals at the output. The outputs are DATA and
DATA, and represent positive and negative excursions of the input beyond a pre-determined threshold (See Receiver Logic Waveforms Figure 2).
The internal threshold is nominally set to detect data bus signals exceeding 1.05 Volts P-P and reject signals less than 0.6 Volts P-P when used
with a 1:1 turns ratio transformer (See Figure 5 for transformer data and typical connection). This threshold setting can be held by grounding
the appropriate pins or modified with the use of external resistors.
A low level at the Strobe input inhibits the DATA and DATA outputs. If unused, a 2K Ohm pull-up to +5 Volts is recommended.
SCD4435N Rev B
TX DATA OUT
TX DATA IN
DRIVER
SHAPING
TX DATA IN
OUTPUT
STAGE
TX DATA OUT
COMP.
RX DATA OUT
V+
TX INHIBIT
EXT. THRESHOLD
DATA
DATA
SET INTERNAL
THRESHOLD DATA
EXT. THRESHOLD
DATA
+5 V
-12V or -15V
V-
RX DATA IN
INPUT
AMP
RX DATA IN
ACTIVE
FILTER
COMP.
RX DATA OUT
+15V or +12V
STROBE
BLOCK DIAGRAM (WITHOUT TRANSFORMER)
Region 1
2
3
DATA IN
DATA IN
INHIBIT
LINE TO LINE
OUTPUT
Notes: 1. Data and DATA inputs must be complementry waveforms or 50% duty cycle average, with no delays between them, and in the same state during
the off time (both high and low).
2. Region 1 ; no output signal, High Z state, (Receive Mode), Region 2; No Output signal, Low Z state, (Terminate Mode), Region 3, Transmitter signal
on, low Z.
FIGURE 1 – TRANSMITTER LOGIC WAVEFORMS
LINE TO LINE
INPUT
Rx DATA OUT
Note overlap
Rx DATA OUT
Note : Waveforms shown are for normally low devices. For normally high receiver output
level devices, the receiver outputs are swapped as shown by the dashed lines
FIGURE 2 – RECEIVER LOGIC WAVEFORMS
SCD4435N Rev B
2
ABSOLUTE MAXIMUM RATINGS
Operating Case Temperature
-55°C to +125°C
Storage Case Temperature
-65°C to +150°C
Power Supply Voltages
±15VDC P.S. to ±18V DC MAX
+5V DC P.S. to +7VDC
-0.3 V to +5.5 V
Logic Input Voltage
Receiver Differential Input
±40 V
Receiver Input Voltage (Common Mode)
±10V
150 mA
Driver Peak Output Current
Total Package Power Dissipation over the Full Operating
Case Temperature Range
3.25 Watts
16.25°C
Maximum Junction to Case Temperature (100% duty cycle)
5°C/W
Junction-Case, Thermal Resistance
ELECTRICAL CHARACTERISTICS – DRIVER SECTION
INPUT CHARACTERISTICS, TX DATA IN OR TX DATA IN
Parameter
Condition
Symbol
Min
Typ
Max
Unit
"0" Input Current
VIN = 0.4V
IILD
-
-0.2
-0.4
mA
"1" Input Current
VIN = 2.7V
IIHD
-
1
40
µA
"0" Input Voltage
VILD
-
-
0.7
V
"1" Input Voltage
VIHD
2.0
-
-
V
INHIBIT CHARACTERISTICS
"0" Input Current
VIN = 0.4V
IILI
-
-0.2
-0.4
mA
"1" Input Current
VIN = 2.7V
IIHI
-
1.0
40
µA
"0" Input Voltage
VILI
-
-
0.7
V
"1" Input Voltage
VIHI
2
-
-
V
Delay from TX inhibit, (0➝1) to inhibited output
Note 1
tDXOFF
-
200
500
nS
Delay from TX inhibit, (1➝0) to active output
Note 1
tDXON
-
250
700
nS
VNOI
-
0.8
10
mV p-p
Note2
ZOI
10K
-
-
Ω
RL=170 Ω
VO
17
21
24
V p-p
tr
200
-
300
nS
VOS
-
-
±265
mV peak
tDTX
-
270
400
nS
Differential Output Noise, inhibit mode
Differential Output Impedance (inhibited)
OUTPUT CHARACTERISTICS
Differential output level at point A-A’ on
Figure 5
Rise and fall times
(10% to 90% of p-p output)
Output offset at point A-A’ on Figure 5, 2.5 µS
after midpoint crossing of the last bit
RL=170 Ω
Delay from 50% point of TX DATA or
TX DATA input to zero crossing of differential
signal (Note 1)
SCD4435N Rev B
3
ELECTRICAL CHARACTERISTICS – RECEIVER SECTION
Parameter
Condition
Symbol
Min
Typ
Max
Unit
Differential Input Impedance (Note 1)
f= 1MHz
ZIN
20K
-
-
Ω
VIDR
-
-
40
V p-p
Note 1
VICR
10
-
-
V p-p
Point A-A on
Figure 5
CMRR
40
-
-
dB
Differential Input Voltage Range
Input Common Mode Voltage Range
Common Mode Rejection Ratio
STROBE CHARACTERISTICS (LOGIC "0" INHIBITS OUTPUT)
"0" Input Current
VS = 0.4V
IIL
-
-0.2
-0.4
mA
"1" Input Current
VS = 2.7V
IIH
-
1
+40
µA
"0" Input Voltage
VIL
-
-
0.7
V
"1" Input Voltage
VIH
2.0
-
-
V
tSD(ON)
-
-
150
nS
0.60
1.2
0.80
1.8
1.15
2.3
V P-P
V P-P
-
4000
-
Ω/ V P-P
Strobe Delay (turn-on or turn-off)
THRESHOLD CHARACTERISTICS (SINEWAVE INPUT )
Internal Threshold Voltage
(Referred to the bus) Pins 6 and 11 to GND
For 4435N-701 only – Pins 6 and 11 to GND
100KHz-1MHz
External Threshold
Pins 6 & 11 open, threshold settings resistors from Pin 5 & 12 to
ground; For RTH = 3K mimumn to 10K maximum
VTH
RTH/V TH1
OUTPUT CHARACTERISTICS, RX DATA AND RX DATA
"1" State
IOH = -0.4mA
VOH
2.5
3.6
-
V
"0" State
IOL = 4mA
VOL
-
0.35
0.5
V
Delay, (average) from differential input zero
crossings to RX DATA and RX DATA output
50% points
tDRX
-
275
450
nS
POWER SUPPLY CURRENT
Duty Cycle
Condition
Symbol
Typ
Max
Unit
Transmitter
Standby
ICC
IEE
IL
5
15
18
10
35
30
mA
25%
ICC
IEE
IL
25
35
18
40
60
30
50%
ICC
IEE
IL
45
55
18
60
80
30
100%
ICC
IEE
IL
85
95
18
120
140
30
Notes:
1. Characteristics guaranteed by design, not production tested.
2. Measured at 1mHz at point A-A’, power on or off.
3. Specifications apply over the temperature range of -55°C to +125°C (case temperature) unless otherwise noted.
4. All typical values are measured at +25°C.
SCD4435N Rev B
4
LAST BIT
tf*
90%
Magnified View
OUTPUT OFFSET*
17V P-P MIN
24V P-P MAX
0 Volts
0 Volts
OUTPUT OFFSET*
10%
2.5 µsec
tr*
*Offset measured at point A-A’ in Fig 5
* Rise and fall times measured at point A-A’ in Fig 5
FIGURE 3 – TRANSMITTER (TX) OUTPUT
WAVEFORM
TX DATA OUT
FIGURE 4 – TRANSMITTER (TX) OUTPUT
OFFSET
35Ω N1:N2
4.0
POWER DISSIPATION
WATTS
A
170Ω
A’
TX DATA OUT
35Ω
RX DATA IN
RX DATA IN
3.5
3.0
(TYPICAL)
2.5
2.0
1.5
1.0
0.5
Transformer turns ratio:
N1:N2 = 1:1
Use Aeroflex 25T1553-1
0
0
10
20
30
40
50
60
70
80
90 100
DUTY CYCLE, PERCENT
FIGURE 6 – POWER DISSIPATION VS.
DUTY CYCLE
FIGURE 5 – TYPICAL TRANSFORMER
CONNECTION
SCD4435N Rev B
5
CONFIGURATIONS AND ORDERING INFORMATION
Model No.
ACT4435N
DESC No.
Receiver Data level
Case
Specs.
To Be Assigned
Normally High
Plug In
H009
Normally High
Flat Pack
Normally High
Plug In
ACT4435N-FP
-
ACT4435N-701
H009
Commercial (0°C - 70°C)
PACKAGE CONFIGURATIONS AND PINOUTS
PLUG-IN PACKAGE
PIN CONNECTIONS
1. TX DATA OUT
2. TX DATA OUT
1.27 MAX
3. TX GND (+5V)
1.10
4. +15V (TX)
5. EXT. DATA THRES
6. INT. DATA THRES
24
13
7. RX DATA OUT
8. STROBE
9. RX GND (+5V)
1.27
10. RXDATA OUT
1.10
MAX
11. INT DATA THRES
12. EXT DATA THRES
13. +15V (RX)
14. N.C.
12
15. RX DATA IN
16. RX DATA IN
17. GND
Designator
18. CASE GND
Pin 1 & ESD
0.175 19. -15V (RX)
MAX 20. +5V
21. TX INHIBIT
22. TX DATA IN
0.24
23. TX DATA IN
MIN
24. -15V (TX)
0.018 DIA.
0.100
±0.002
FLAT PACKAGE
1.27 MAX
0.017
±0.002
Designator
Pin 1 & ESD
1.27 MAX
0.10 Typ
0.400
MAX
2 sides
0.009
±0.002
0.167 for Low Profile Flat Pack
0.200 for Std Flat Pack
0.080 ±0.015
Notes 1. Dimensions shown are in inches.
2. Pins are equally spaced at 0.100±0.002 tolerance non-cumulative each row.
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Tel: 719-594-8017
Fax: 719-594-8468
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Aeroflex Microelectronic Solutions reserves the right to
change at any time without notice the specifications, design,
function, or form of its products described herein. All
parameters must be validated for each customer's application
by engineering. No liability is assumed as a result of use of
this product. No patent licenses are implied.
Our passion for performance is defined by three
attributes represented by these three icons:
solution-minded, performance-driven and customer-focused
SCD4435N Rev B
6