bq24080 www.ti.com SLUS698B – MARCH 2006 – REVISED MAY 2006 SINGLE-CHIP, LI-ION AND LI-POL CHARGER IC FEATURES • • • • • • • DESCRIPTION Small 3 mm × 3 mm MLP Package Integrated Power FET and Current Sensor for Up to 1-A Charge Applications From AC Adapter Precharge Conditioning With Safety Timer Charge and Power Good (AC Adapter Present With Fixed Safety) Status Output Automatic Sleep Mode for Low-Power Consumption Fixed 7-Hour Fast Charge Safety Timer Ideal for Low-Dropout Charger Designs for Single-Cell Li-Ion or Li-Pol Packs in Space-Limited Portable Applications APPLICATIONS • • • • The bq24080 is a highly integrated and flexible Li-Ion linear charge device targeted at space-limited charger applications. It offers an integrated power FET and current sensor, high-accuracy current and voltage regulation, charge status, and charge termination, in a single monolithic device. An external resistor sets the magnitude of the charge current. The bq24080 charges the battery in three phases: conditioning, constant current, and constant voltage. Charge is terminated based on minimum current. An internal charge timer provides a backup safety for charge termination. The bq24080 automatically restarts the charge if the battery voltage falls below an internal threshold. The bq24080 automatically enters sleep mode when the input supply is removed. PDAs, MP3 Players Digital Cameras Internet Appliances Smartphones VDC AC ADAPTER PACK+ bq24080 1 IN OUT BATTERY PACK + 10 GND SYSTEM PACK- 2 GND CE 9 3 STAT1 PG 8 4 STAT2 GND 7 5 VSS ISET 6 SYSTEM INTERFACE RSET UDG-02184 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2006, Texas Instruments Incorporated bq24080 www.ti.com SLUS698B – MARCH 2006 – REVISED MAY 2006 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION TJ CHARGE REGULATION VOLTAGE (V) FUNCTIONS FAST-CHARGE TIMER (HOURS) -40°C to 125°C 4.2 CE and PG 7 (1) (2) PART NUMBER (1) (2) MARKINGS bq24080DRCR BRO bq24080DRCT The DRC package is available taped and reeled only in quantities of 3,000 devices per reel. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI Web site at www.ti.com. DISSIPATION RATINGS (1) PACKAGE θJA θJC TA < 40°C POWER RATING DERATING FACTOR ABOVE TA = 25°C DRC (1) 46.87 °C/W 4.95 °C/W 1.5 W 0.021 W/°C This data is based on using the JEDEC High-K board and the exposed die pad is connected to a copper pad on the board. This is connected to the ground plane by a 2 x 3 via matrix. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range unless otherwise noted (1) bq24080 VI Input voltage (2) IN, CE, ISET, OUT, PG, STAT1, STAT2 -0.3 to 7 V Output sink/source current STAT1, STAT2, PG 15 mA Output current OUT 1.5 A TA Operating free-air temperature range TJ Junction temperature range Tstg Storage temperature (2) °C -40 to 125 °C –65 to 150 Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds (1) UNIT °C 300 Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages are with respect to VSS. RECOMMENDED OPERATING CONDITIONS 2 VCC Supply voltage TJ Operating junction temperature range Submit Documentation Feedback MIN MAX 4.5 6.5 UNIT V 0 125 °C bq24080 www.ti.com SLUS698B – MARCH 2006 – REVISED MAY 2006 ELECTRICAL CHARACTERISTICS over 0°C ≤ TJ ≤ 125°C and recommended supply voltage (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX 1.2 2 2 5 UNIT INPUT CURRENT ICC(VCC) VCC current VCC > VCC(min) ICC(SLP) Sleep current Sum of currents into OUT pin, VCC < V(SLP) ICC(STBY) Standby current CE = High, 0°C ≤ TJ ≤ 85°C IIB(OUT) Input current on OUT pin Charge DONE, VCC > VCC(MIN) IIB(CE) Input current on CE pin CE = High 150 1 mA µA 5 1 VOLTAGE REGULATION VO(REG) + V(DO–MAX) ≤ VCC , I(TERM) < IO(OUT) ≤ 1 A VO(REG) Output voltage Voltage regulation accuracy V(DO) Dropout voltage (V(IN)–V(OUT)) 4.2 TA = 25°C V –0.35% 0.35% –1% 1% VO(OUT) = VO(REG), IO(OUT) = 1 A VO(REG) + V(DO)) ≤ VCC 350 500 mV 1000 mA V CURRENT REGULATION IO(OUT) Output current range (1) VI(OUT) > V(LOWV), VI(IN) – VI(OUT) > V(DO), VCC ≥ 4.5 V V(SET) Output current set voltage Voltage on ISET pin, VCC ≥ 4.5 V, VI ≥ 4.5 V, VI(OUT) > V(LOWV), VI – VI(OUT) > V(DO) K(SET) Output current set factor 50 2.463 2.5 2.538 50 mA ≤ IO(OUT) ≤ 1 A 307 322 337 10 mA ≤ IO(OUT) < 50 mA 296 320 346 1 mA ≤ IO(OUT) < 10 mA 246 320 416 PRECHARGE AND SHORT-CIRCUIT CURRENT REGULATION Precharge to fast-charge transition threshold Voltage on OUT pin 2.8 3 3.2 V Deglitch time for fast-charge to precharge transition VCC(MIN) ≥ 4.5 V, tFALL = 100 ns, 10-mV overdrive, VI(OUT) decreasing below threshold 250 375 500 ms IO(PRECHG) Precharge range (2) 0 V < VI(OUT) < V(LOWV), t < t(PRECHG) 5 100 mA V(PRECHG) Precharge set voltage Voltage on ISET pin, VO(REG) = 4.2 V, 0 V < VI(OUT) > V(LOWV), t < t(PRECHG) 240 270 mV 100 mA V(LOWV) 255 TERMINATION DETECTION I(TERM) Charge termination detection range (3) VI(OUT) > V(RCH), t < t(TRMDET) 5 V(TERM) Charge termination detection set voltage Voltage on ISET pin, VO(REG) = 4.2 V, VI(OUT) > V(RCH), t < t(TRMDET) 235 250 265 mV tTRMDET Deglitch time for termination detection VCC(MIN) ≥ 4.5 V, tFALL = 100 ns charging current decreasing below 10-mV overdrive 250 375 500 ms (1) (2) (3) See Equation 2 in the Function Description section. See Equation 1 in the Function Description section. See Equation 3 in the Function Description section. Submit Documentation Feedback 3 bq24080 www.ti.com SLUS698B – MARCH 2006 – REVISED MAY 2006 ELECTRICAL CHARACTERISTICS (continued) over 0°C ≤ TJ ≤ 125°C and recommended supply voltage (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VO(REG)– 0.115 VO(REG)– 0.10 VO(REG)– 0.085 250 375 500 ms 0.25 V BATTERY RECHARGE THRESHOLD V(RCH) Recharge threshold t(DEGL) Deglitch time for recharge detect VCC(MIN) ≥ 4.5 V, tFALL = 100 ns decreasing below or increasing above threshold, 10-mV overdrive V STAT1, STAT2, and PG OUTPUTS VOL Low-level output saturation voltage IO = 5 mA CHARGE ENABLE (CE), INPUTS VIL Low-level input voltage IIL = 10 µA 0 VIH High-level input voltage IIL = 20 µA 1.4 IIL CE, low-level input current IIH CE, high-level input current 0.4 -1 1 V µA TIMERS t(PRECHG) Precharge time t(CHG) Charge time I(FAULT) Timer fault recovery current 1,620 1,800 1,930 22,680 25,200 27,720 200 s s µA SLEEP COMPARATOR V(SLP) Sleep-mode entry threshold voltage V(SLPEXIT) Sleep-mode exit threshold voltage 2.3 V ≤ VI(OUT) ≤ VO(REG) Sleep-mode deglitch time V(IN) decreasing below threshold, tFALL = 100 ns, 10-mV overdrive VCC ≤ VI(OUT) + 80 mV VCC ≥ VI(OUT) + 190 250 375 500 V ms THERMAL SHUTDOWN ENTRY THRESHOLDS T(SHTDWN) Thermal trip threshold Thermal hysteresis 165 TJ increasing °C 15 UNDERVOLTAGE LOCKOUT V(UVLO) Undervoltage lockout Decreasing VCC Hysteresis 4 2.4 2.5 27 Submit Documentation Feedback 2.6 V mV bq24080 www.ti.com SLUS698B – MARCH 2006 – REVISED MAY 2006 PIN ASSIGNMENT DRC PACKAGE (TOP VIEW) VSS STAT2 STAT1 GND 5 4 3 IN 2 1 bq24080 6 7 8 9 10 ISET GND PG CE OUT TERMINAL FUNCTIONS TERMINAL NAME NO. I/O DESCRIPTION IN 1 I Adapter dc voltage CE 9 I Charge enable input (active low voltage, min 0.1 µF input capacitor) 2, 7 - Ground GND ISET 6 I Charge current. Precharge and termination set point. OUT 10 O Charge current output (minimum 0.1 µF capacitor to ground) PG 8 O Power-good status output (open-drain) STAT1 3 O Charge status output 1 (open-drain) STAT2 4 O Charge status output 2 (open-drain) VSS 5 - Ground Thermal Pad - - There is an internal electrical connection between the exposed thermal pad and VSS pin of the device. The exposed thermal pad must be connected to the same potential as the VSS pin on the printed-circuit board. Do not use the thermal pad as the primary ground input for the device. VSS pin must be connected to ground at all times. Submit Documentation Feedback 5 bq24080 www.ti.com SLUS698B – MARCH 2006 – REVISED MAY 2006 FUNCTIONAL BLOCK DIAGRAM IN VI(IN) GND sensefet VI(OUT) OUT VI(SET) ISET REF BIAS AND UVLO VO(REG) UVLO CHG ENABLE CE VI(OUT) VBAT SLEEP * ISET VI(IN) VO(REG) VI(OUT) VI(OUT) RECHARGE * CHARGE CONTROL, TIMER, AND DISPLAY LOGIC PRECHARGE * PRECHARGE (C/10) GND PG VI(SET) STAT1 VI(SET) TERM * STAT2 VSS * SIGNAL DEGLITCHED 6 Submit Documentation Feedback UDG-02185 bq24080 www.ti.com SLUS698B – MARCH 2006 – REVISED MAY 2006 DROPOUT VOLTAGE vs JUNCTION TEMPERATURE 450 IO(OUT) = 1000 mA 400 Dropout Voltage - mV 350 IO(OUT) = 750 mA 300 250 IO(OUT) = 500 mA 200 150 IO(OUT) = 250 mA 100 50 0 0 50 100 o TJ - Junction Temperature - C 150 Figure 1. The bq24080 supports a precision Li-Ion, Li-Pol charging system suitable for single cells. Figure 2 shows a typical charge profile, and Figure 3 shows an operational flow chart. PreœConditioning Phase Current Regulation Phase Voltage Regulation and Charge Termination Phase Regulation Voltage Regulation Current Minimum Charge Voltage PreConditioning and Term Detect Charge Voltage Charge Complete Charge Current UDG-04087 Figure 2. Typical Charging Profile Submit Documentation Feedback 7 bq24080 www.ti.com SLUS698B – MARCH 2006 – REVISED MAY 2006 FUNCTIONAL DESCRIPTION POR SLEEP MODE VCC > VI(OUT) No checked at all times Indicate SLEEP MODE Yes VI(OUT)<V(LOWV) Yes Regulate IO(PRECHG) Reset and Start t(PRECHG)timer Indicate ChargeIn-Progress No Reset all timers, Start t(CHG) timer Regulate Current or Voltage Indicate ChargeIn-Progress No VI(OUT)<V(LOWV) Yes Yes t(PRECHG) Expired? No t(CHG) Expired? Yes No Yes Yes Fault Condition VI(OUT)<V(LOWV) Indicate Fault No VI(OUT) >V(RCH) ? No I(TAPER) detection? No Enable I(FAULT) current Yes No Turn off charge Yes Yes VI(OUT) >V(RCH) ? Indicate DONE Yes No Disable I(FAULT) current VI(OUT) <V(RCH) ? Figure 3. Operational Flow Chart 8 Submit Documentation Feedback bq24080 www.ti.com SLUS698B – MARCH 2006 – REVISED MAY 2006 FUNCTIONAL DESCRIPTION (continued) Battery Preconditioning During a charge cycle if the battery voltage is below the V(LOWV) threshold, the bq24080 applies a precharge current, IO(PRECHG), to the battery. This feature revives deeply discharged cells. The resistor connected between the ISET and VSS, RSET determines the precharge rate. The V(PRECHG) and K(SET) parameters are specified in the specifications table. K(SET) x V(PRECHG) IO(PRECHG) = RSET (1) The bq24080 activates a safety timer, t(PRECHG), during the conditioning phase. If the V(LOWV) threshold is not reached within the timer period, the bq24080 turns off the charger and enunciates FAULT on the STATx pins. See the Timer Fault Recovery section for additional details. Battery Fast Charge Constant Current The bq24080 offers on-chip current regulation with programmable set point. The resistor connected between the ISET and VSS, RSET determines the charge rate. The V(SET) and K(SET) parameters are specified in the specifications table. K(SET) x V(SET) IO(OUT) = RSET (2) Battery Fast Charge Voltage Regulation The voltage regulation feedback is through the OUT pin. This input is tied directly to the positive side of the battery pack. The bq24080 monitors the battery-pack voltage between the OUT and VSS pins. When the battery voltage rises to VO(REG) threshold, the voltage regulation phase begins and the charging current begins to taper down. As a safety backup, the bq24080 also monitors the charge time in the charge mode. If charge is not terminated within this time period, t(CHG), the charger is turned off and FAULT is set on the STATx pins. See the Timer Fault Recovery section for additional details. Charge Termination Detection and Rescue The bq24080 monitors the charging current during the voltage regulation phase. Once the termination threshold, I(TERM), is detected, charge is terminated. The V(TERM) and K(SET) parameters are specified in the specifications table. K x V(TERM) IO(TERM) = (SET) RSET (3) After charge termination, the bq24080 restarts the charge once the voltage on the OUT pin falls below the V(RCH) threshold. This feature keeps the battery at full capacity at all times. The bq24080 monitors the charging current during the voltage regulation phase. Once the termination threshold, I(TERM), is detected, the charge is terminated immediately. The resistor connected between the ISET and VSS, RSET determines the current level at the termination threshold. Submit Documentation Feedback 9 bq24080 www.ti.com SLUS698B – MARCH 2006 – REVISED MAY 2006 FUNCTIONAL DESCRIPTION (continued) Sleep Mode The bq24080 enters the low-power sleep mode if the input power (IN) is removed from the circuit. This feature prevents draining the battery during the absence of input supply. Change Status Outputs The open-drain STAT1 and STAT2 outputs indicate various charger operations as shown in the following table. These status pins can be used to drive LEDs or communicate to the host processor. Note that OFF indicates the open-drain transistor is turned off. Table 1. Status Pin Summary CHANGE STATE STAT1 Precharge in progress ON STAT2 ON Fast charge in progress ON OFF Charge done OFF ON OFF OFF Charge suspend (temperature) Timer fault Sleep mode PG Output The open-drain PG (Power Good) output pulls low when a valid input voltage is present. This output is turned off, (high impedance) sleep mode. The PG pin can be used to drive an LED or communicate to the host processor. CE Input (Charge Enabled) The CE digital input is used to disable or enable the charge process. A low-level signal on this pin enables the charge and a high-level signal disables the charge and places the device in a low-power mode. A high-to-low transition on this pin also resets all timers and timer fault conditions. 10 Submit Documentation Feedback bq24080 www.ti.com SLUS698B – MARCH 2006 – REVISED MAY 2006 Timer Fault Recovery As shown in Figure 3, bq24080 provides a recovery method to deal with timer fault conditions. The following summarizes this method: Condition Number 1 OUT pin voltage is above the recharge threshold (V(RCH)), and a timeout fault occurs. Recovery method: bq24080 waits for the OUT pin voltage to fall below the recharge threshold. This could happen as a result of a load on the battery, self-discharge, or battery removal. Once the OUT pin voltage falls below the recharge threshold, the bq24080 clears the fault and starts a new charge cycle. A POR or CE toggle also clears the fault. Condition number 2 OUT pin voltage is below the recharge threshold (V(RCH)), and a timeout fault occurs Recovery method: Under this scenario, the bq24080 applies the I(FAULT) current. This small current is used to detect a battery removal condition and remains on as long as the battery voltage stays below the recharge threshold. If the OUT pin voltage goes above the recharge threshold, then the bq24080 disables the I(FAULT) current and executes the recovery method described for condition number 1. Once the OUT pin voltage falls below the recharge threshold, the bq24080 clears the fault and starts a new charge cycle. A POR or CE toggle also clears the fault. Selecting Input and Output Capacitors In most applications, all that is needed is a high-frequency decoupling capacitor on the input power pin. A 0.1-µF ceramic capacitor, placed in close proximity to the IN pin and GND pad works well. In some applications, it may be necessary to protect against a hot plug input voltage overshoot. This is done in three ways: 1. The best way is to add an input zener, 6.2 V, between the IN pin and VSS. 2. A low power zener is adequate for the single event transient. Increasing the input capacitance lowers the characteristic impedance which makes the input resistance move effective at damping the overshoot, but risks damaging the input contacts by the high inrush current. 3. Placing a resistor in series with the input dampens the overshoot, but causes excess power dissipation. The bq24080 only requires a small capacitor for loop stability. A 0.1-µF ceramic capacitor placed between the OUT and GND pad is typically sufficient. AC ADAPTER VDC 1 0.1 mF GND 1.5 kW IN OUT 1.5 kW 100 kW bq24080 PACK+ 10 + 1.5 kW 0.1 mF 2 GND CE 9 3 STAT1 PG 8 4 STAT2 GND 7 5 VSS ISET 6 PACK- 1.13 kW RSET Charge Current Translator Output Figure 4. Typical Application Circuit Submit Documentation Feedback 11 bq24080 www.ti.com SLUS698B – MARCH 2006 – REVISED MAY 2006 APPLICATION INFORMATION Thermal Considerations The bq24080 is packaged in a thermally enhanced MLP package. The package includes a thermal pad to provide an effective thermal contact between the device and the printed-circuit board (PCB). Full PCB design guidelines for this package are provided in the application note entitled, QFN/SON PCB Attachment (TI Literature Number SLUA271). The most common measure of package thermal performance is thermal impedance (θJA) measured (or modeled) from the device junction to the air surrounding the package surface (ambient). The mathematical expression for θJA is: TJ - TA qJA = P (4) Where: • TJ = device junction temperature • TA = ambient temperature • P = device power dissipation Factors that can greatly influence the measurement and calculation of θJA include: • Orientation of the device (horizontal or vertical) • Volume of the ambient air surrounding the device under test and airflow • Whether other surfaces are in close proximity to the device being tested • Use multiple 10 - 13 mil vias in the PowerPAD™ to copper ground plane. • Avoid cutting the ground plane with a signal trace near the power IC. • The PCB must be sized to have adequate surface area for heat dissipation. • FR4 (figerglass) thickness should be minimized. The device power dissipation, P, is a function of the charge rate and the voltage drop across the internal Power FET. It can be calculated from the following equation: P = (V(IN) - V(OUT)) x IO(OUT) (5) Due to the charge profile of Li-xx batteries, the maximum power dissipation is typically seen at the beginning of the charge cycle when the battery voltage is at its lowest. See Figure 2. PCB Layout Considerations It is important to pay special attention to the PCB layout. The following provides some guidelines: • To obtain optimal performance, the decoupling capacitor from VCC to V(IN) and the output filter capacitors from OUT to VSS should be placed as close as possible to the bq24080, with short trace runs to both signal and VSS pins. The VSS pin should have short trace runs to the GND pin. • All low-current VSS connections should be kept separate from the high-current charge or discharge paths from the battery. Use a single-point ground technique incorporating both the small-signal ground path and the power ground path. • The high-current charge paths into IN and from the OUT pins must be sized appropriately for the maximum charge current in order to avoid voltage drops in these traces. • The bq24080 is packaged in a thermally enhanced MLP package. The package includes a thermal pad to provide an effective thermal contact between the device and the printed circuit board (PCB). Full PCB design guidelines for this package are provided in the application note entitled, QFN/SON PCB Attachment (TI Literature Number SLUA271). 12 Submit Documentation Feedback IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Applications Amplifiers amplifier.ti.com Audio www.ti.com/audio Data Converters dataconverter.ti.com Automotive www.ti.com/automotive DSP dsp.ti.com Broadband www.ti.com/broadband Interface interface.ti.com Digital Control www.ti.com/digitalcontrol Logic logic.ti.com Military www.ti.com/military Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork Microcontrollers microcontroller.ti.com Security www.ti.com/security Mailing Address: Telephony www.ti.com/telephony Video & Imaging www.ti.com/video Wireless www.ti.com/wireless Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright 2006, Texas Instruments Incorporated