TI MAX4596DBVR

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SLLS641 – JANUARY 2005
Description
The MAX4596 is a single-pole single-throw (SPST)
analog switch that is designed to operate from 2 V to
5 V. This device can handle both digital and analog
signals, and signals up to V+ (peak) can be transmitted
in either direction.
Applications
D Sample-and-Hold Circuits
Features
D Low ON-State Resistance (10 W)
D ON-State Resistance Flatness (1.5 W)
D Control Inputs Are 5.5-V Tolerant
D Low Charge Injection (5 pC Max)
D 300-MHz −3-dB Bandwidth at 255C
D Low Total Harmonic Distortion (THD) (0.05%)
D 2-V to 5.5-V Single-Supply Operation
D Specified at 5-V and 3.3-V Nodes
D −83-dB OFF Isolation at 1 MHz
D Latch-Up Performance Exceeds 100 mA Per
D
D
D Battery-Powered Equipment
D Audio and Video Signal Routing
D Communication Circuits
D
JESD 78, Class II
0.5-nA Max OFF Leakage
ESD Performance Tested Per JESD 22
− 2000-V Human-Body Model
(A114-B, Class II)
− 1000-V Charged-Device Model (C101)
TTL/CMOS-Logic Compatible
Summary of Characteristics
V+ = 5 V, TA = 25°C
SOT-23 OR SC-70 PACKAGE
(TOP VIEW)
IN 1
5
Single Pole
Single Throw
(SPST)
Configuration
V+
Number of channels
COM 2
4
GND 3
NO
1
ON-state resistance (ron)
10 Ω
ON-state resistance flatness (ron(flat))
1.5 Ω
Turn-on/turn-off time (tON/tOFF)
35 ns/40 ns
Charge injection (QC)
5 pC
Bandwidth (BW)
OFF isolation (OISO)
FUNCTION TABLE
NO TO COM,
COM TO NO
IN
300 MHz
−83 dB at 1 MHz
Total harmonic distortion (THD)
0.05%
±0.05 nA
Leakage current(ICOM(OFF)/INO(OFF))
L
OFF
Power-supply current (I+)
H
ON
Package option
1 µA
5-pin SOT-23 or SC-70
ORDERING INFORMATION
TA
−40°C to 85°C
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING(2)
SOT (SOT-23) − DBV
Tape and reel
MAX4596DBVR
6SB_
SOT (SC−70) − DCK
Tape and reel
MAX4596DCKR
SB_
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
(2) DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright  2005, Texas Instruments Incorporated
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SLLS641 – JANUARY 2005
Pin Configurations
Available in Other Pin Configurations
IN 1
5
V+
4
NO
COM
1
NO
2
GND
3
COM 2
5
V+
4
IN
MAX4594
GND 3
COM
MAX4596
1
NC
2
GND
3
5
V+
IN 1
5
V+
4
NC
COM 2
4
IN
MAX4595
GND 3
MAX4597
Absolute Minimum and Maximum Ratings(1)(2)
over operating free-air temperature range (unless otherwise noted)
V+
VNO
VCOM
IK
INO
ICOM
INO
ICOM
MIN
MAX
Supply voltage range(3)
−0.3
6
UNIT
V
Analog voltage range(3)(4)
−0.3
V+ + 0.3
V
Analog port diode current
VNO, VCOM < 0
−50
On-state switch current
VNO, VCOM = 0 to V+
−20
20
mA
On-state switch current
(pulsed at 1 ms, 10% duty cycle)
VNO, VCOM = 0 to V+
−40
40
mA
−0.3
6
V
VI
IIK
Digital input voltage range(3)(4)
I+
IGND
Continuous current through V+
θJA
Package thermal impedance(5)
Digital input clamp current
VI < 0
mA
−50
mA
100
Continuous current through GND
−100
mA
mA
DBV package
206
DCK package
252
°C/W
Tstg
Storage temperature range
−65
150
°C
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade
device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified
is not implied.
(2) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
(3) All voltages are with respect to ground, unless otherwise specified.
(4) The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(5) The package thermal impedance is calculated in accordance with JESD 51-7.
2
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SLLS641 – JANUARY 2005
Electrical Characteristics for 5-V Supply(1)
V+ = 4.5 V to 5.5 V, TA = −40°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
SYMBOL
TA
V+
MIN
TYP
MAX
UNIT
Analog Switch
Analog signal
range
VCOM,
VNO
ON-state
resistance
ron
ON-state
resistance
flatness
ron(flat)
0
VNO = 3.5 V
ICOM = 10 mA,
Switch ON,
See Figure 13
25°C
VNO = 1.5 V, 2.5 V, 3.5 V
ICOM = 10 mA,
Switch ON,
See Figure 13
25°C
Full
VNO = 1 V, VCOM = 4.5 V,
or
VNO = 4.5 V, VCOM = 1 V,
Switch OFF,
See Figure 14
25°C
COM
OFF leakage
current
VCOM = 1 V, VNO = 4.5 V,
or
VCOM = 4.5 V, VNO = 1 V,
Switch OFF,
See Figure 14
25°C
ICOM(OFF)
INO(ON)
VNO = 1 V, VCOM = 1 V,
or
VNO = 4.5 V, VCOM = 4.5 V,
or
VNO = 1 V, 4.5 V, VCOM = Open,
Switch ON,
See Figure 15
VCOM = 1 V, VNO = 1 V,
or
VCOM = 4.5 V, VNO = 4.5 V,
or
VCOM = 1 V, 4.5 V, VNO = Open,
Switch ON,
See Figure 15
ICOM(ON)
10
12
0.5
−0.5
0.01
−0.5
5
0.01
0.5
5.5 V
nA
−5
25°C
Ω
nA
−5
Full
Ω
0.5
5.5 V
Full
V
1.5
2
Full
INO(OFF)
COM
ON leakage
current
6.5
4.5 V
4.5 V
NO
OFF leakage
current
NO
ON leakage
current
V+
−1
5
0.01
1
5.5 V
nA
Full
−10
25°C
−1
10
0.01
1
5.5 V
nA
Full
−10
10
Full
2.4
5.5
V
Full
0
0.8
V
25°C
−1
Digital Control Input (IN)
Input logic high
Input logic low
Input leakage
current
VIH
VIL
IIH, IIL
VI = V+ or 0
Full
5.5 V
−1
0.03
1
1
µA
A
(1) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
3
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SLLS641 – JANUARY 2005
Electrical Characteristics for 5-V Supply(1) (continued)
V+ = 4.5 V to 5.5 V, TA = −40°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
SYMBOL
TA
V+
MIN
TYP
MAX
20
35
UNIT
Dynamic
Turn-on time
VNO = 3 V,
RL = 300 Ω,
CL = 35 pF,
See Figure 17
25°C
5V
tON
Full
4.5 V to 5.5 V
Turn-off time
VCOM = 3 V,
RL = 300 Ω,
CL = 35 pF,
See Figure 17
25°C
5V
tOFF
Full
4.5 V to 5.5 V
VGEN = 0, RGEN = 0,
CL = 1 nF,
See Figure 20
25°C
5V
2
45
25
ns
40
50
ns
Charge injection
QC
NO
OFF capacitance
CNO(OFF)
VNO = V+ or GND,
f = 1 MHz,
Switch OFF,
See Figure 16
25°C
5V
8
pF
COM
OFF capacitance
CCOM(OFF)
VCOM = V+ or GND,
f = 1 MHz,
Switch OFF,
See Figure 16
25°C
5V
8
pF
NO
ON capacitance
CNO(ON))
VNO = V+ or GND,
f = 1 MHz,
Switch ON,
See Figure 16
25°C
5V
20
pF
COM
ON capacitance
CCOM(ON)
VCOM = V+ or GND,
f = 1 MHz,
Switch ON,
See Figure 16
25°C
5V
20
pF
CI
VI = V+ or GND,
See Figure 16
25°C
5V
3
pF
BW
RL = 50 Ω,
Signal = 0 dBm,
Switch ON,
See Figure 18
25°C
5V
300
MHz
Digital input
capacitance
Bandwidth
5
pC
OFF isolation
OISO
RL = 50 Ω, CL = 5 pF,
VNO = 1 VRMS, f = 1 MHz,
Switch OFF,
See Figure 19
25°C
5V
−83
dB
Total harmonic
distortion
THD
RL = 600 Ω, CL = 50 pF,
VSOURCE = 5 Vp-p,
f = 20 Hz to 20 kHz,
See Figure 21
25°C
5V
0.05
%
Supply
Positive supply
I+
VI = V+ or GND,
Switch ON or OFF
Full
5.5 V
current
(1) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
4
1
µA
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SLLS641 – JANUARY 2005
Electrical Characteristics for 3-V Supply(1)
V+ = 2.7 V to 3.6 V, TA = −40°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
SYMBOL
TA
V+
MIN
TYP
MAX
UNIT
Analog Switch
Analog signal
range
ON-state
resistance
VCOM,
VNO
ron
0
VNO = 1.5 V,
ICOM = 10 mA,
Switch ON,
See Figure 13
25°C
Full
V+
10
2.7 V
20
25
V
Ω
Digital Control Input (IN)
Input logic high
Input logic low
VIH
VIL
Full
2
5.5
V
Full
0
0.8
V
Input leakage
current
IIH, IIL
VI = V+ or 0
Turn-on time
VNO = 2 V,
RL = 300 Ω,
CL = 35 pF,
See Figure 17
25°C
3V
tON
Full
2.7 V to 3.6 V
Turn-off time
VNO = 2 V,
RL = 300 Ω,
CL = 35 pF,
See Figure 17
25°C
3V
tOFF
Full
2.7 V to 3.6 V
VGEN = 0, RGEN = 0,
CL = 1 nF,
See Figure 20
25°C
3V
25°C
Full
−1
3.6 V
0.03
−1
1
1
µA
A
Dynamic
Charge injection
QC
25
45
55
30
50
60
2
ns
ns
4
pC
1
µA
Supply
Positive supply
I+
VI = V+ or GND,
Switch ON or OFF
Full
3.6 V
current
(1) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
5
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TYPICAL PERFORMANCE
10
8
TA = 25_C
8
6
855C
255C
6
ron (W)
ron (Ω)
V+ = 3 V
4
4
–405C
V+ = 5 V
2
2
0
0
0
1
2
3
4
5
0
1
2
VCOM (V)
1.0
ICOM(ON)/INO(ON)
–405C
0.8
Leakage Current (nA)
8
ron (W)
5
Figure 2. ron vs VCOM (V+ = 5 V)
10
6
4
255C
855C
2
0.6
INO(OFF)/ICOM(OFF)
0.4
0.2
0.0
0
0
1
2
3
VCOM (V)
−40°C
2.0
20
1.5
18
tOFF
16
tON/tOFF (ns)
0.5
V+ = 3 V
85°C
tON
1.0
0.0
25°C
TA (°C)
Figure 4. Leakage Current vs Temperature
(V+ = 5 V)
Figure 3. ron vs VCOM (V+ = 3 V)
Charge Injection (pC)
4
VCOM (V)
Figure 1. ron vs VCOM
V+ = 5 V
−0.5
−1.0
−1.5
−2.0
14
12
10
8
−2.5
6
−3.0
0
1
2
3
4
Bias Voltage (V)
Figure 5. Charge-Injection (QC) vs VCOM
6
3
5
0
1
2
3
V+ (V)
4
5
6
Figure 6. tON and tOFF vs Supply Voltage
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SLLS641 – JANUARY 2005
TYPICAL PERFORMANCE
12
Logic Level Threshold (nA)
3
tON/tOFF (ns)
11
10
9
tON
8
7
tOFF
6
−40°C
25°C
VIH
2
1
VIL
0
0
85°C
1
2
TA (5C)
Figure 7. tON and tOFF vs Temperature (V+ = 5 V)
3
V+ (V)
4
5
6
Figure 8. Logic-Level Threshold vs V+
0.0
0
−0.5
−20
Attenuation (dB)
Gain (dB)
−1.0
−1.5
−2.0
−2.5
−3.0
−40
−60
−80
−100
−3.5
−4.0
0.1
1
10
Frequency (MHz)
100
−120
0.1
1000
Figure 9. Bandwidth (Gain vs Frequency)
(V+ = 5 V)
1
10
Frequency (MHz)
100
1000
Figure 10. Off Isolation vs Frequency
10
0.20
V+ = 5 V
9
8
0.15
7
5
V+ = 3 V
4
3
2
THD (%)
I+ (µA)
6
0.10
V+ = 3 V
0.05
V+ = 5 V
1
0
−40°C
25°C
85°C
TA (5C)
Figure 11. Power-Supply Current vs
Temperature
0.00
0.1
1
10
100
1000
Frequency (MHz)
Figure 12. Total Harmonic Distortion vs
Frequency
7
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PIN DESCRIPTION
PIN NUMBER
NAME
DESCRIPTION
1
IN
2
COM
Digital control pin to connect COM to NO
Common
3
GND
Digital ground
4
NO
Normally open
5
V+
Power supply
PARAMETER DESCRIPTION
SYMBOL
8
DESCRIPTION
VCOM
Voltage at COM
VNO
Voltage at NO
ron
Resistance between COM and NO ports when the channel is ON
ron(flat)
Difference between the maximum and minimum value of ron in a channel over the specified range of conditions
INO(OFF)
Leakage current measured at the NO port, with the corresponding channel (NO to COM) in the OFF state
INO(ON)
Leakage current measured at the NO port, with the corresponding channel (NO to COM) in the ON state and the output (COM)
open
ICOM(OFF)
Leakage current measured at the COM port, with the corresponding channel (COM to NO) in the OFF state
ICOM(ON)
Leakage current measured at the COM port, with the corresponding channel (COM to NO) in the ON state and the output (NO)
open
VIH
Minimum input voltage for logic high for the control input (IN)
VIL
Maximum input voltage for logic low for the control input (IN)
VI
Voltage at the control input (IN)
IIH, IIL
Leakage current measured at the control input (IN)
tON
Turn-on time for the switch. This parameter is measured under the specified range of conditions and by the propagation delay
between the digital control (IN) signal and analog output (COM or NO) signal when the switch is turning ON.
tOFF
Turn-off time for the switch. This parameter is measured under the specified range of conditions and by the propagation delay
between the digital control (IN) signal and analog output (COM or NO) signal when the switch is turning OFF.
QC
Charge injection is a measurement of unwanted signal coupling from the control (IN) input to the analog (NO or COM) output.
This is measured in coulomb (C) and measured by the total charge induced due to switching of the control input.
Charge injection, QC = CL × ∆VCOM, CL is the load capacitance, and ∆VCOM is the change in analog output voltage.
CNO(OFF)
CNO(ON)
Capacitance at the NO port when the corresponding channel (NO to COM) is OFF
CCOM(OFF)
CCOM(ON)
Capacitance at the COM port when the corresponding channel (COM to NO) is OFF
CI
Capacitance of control input (IN)
OISO
OFF isolation of the switch is a measurement of OFF-state switch impedance. This is measured in dB in a specific frequency,
with the corresponding channel (NO to COM) in the OFF state.
BW
Bandwidth of the switch. This is the frequency in which the gain of an ON channel is −3 dB below the DC gain.
THD
Total harmonic distortion describes the signal distortion caused by the analog switch. This is defined as the ratio of root mean
square (RMS) value of the second, third, and higher harmonic to the absolute magnitude of the fundamental harmonic.
I+
Static power-supply current with the control (IN) pin at V+ or GND
Capacitance at the NO port when the corresponding channel (NO to COM) is ON
Capacitance at the COM port when the corresponding channel (COM to NO) is ON
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PARAMETER MEASUREMENT INFORMATION
V+
VNO NO
COM
VCOM
+
Channel ON
r on +
VI
ICOM
IN
VCOM * VNO
W
I COM
VI = VIH or VIL
+
GND
Figure 13. ON-State Resistance (ron)
V+
VNO NO
COM
+
VCOM
+
VI
OFF-State Leakage Current
Channel OFF
VI = VIH or VIL
IN
+
GND
Figure 14. OFF-State Leakage Current (ICOM(OFF), INO(OFF))
V+
VNO NO
COM
+
VI
VCOM
ON-State Leakage Current
Channel ON
VI = VIH or VIL
IN
+
GND
Figure 15. ON-State Leakage Current (ICOM(ON), INO(ON))
9
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SLLS641 – JANUARY 2005
V+
VNO
NO
Capacitance
Meter
VBIAS = V+ or GND
VI = VIH or VIL
VCOM COM
VBIAS
Capacitance is measured at NO,
COM, and IN inputs during ON
and OFF conditions.
IN
VI
GND
Figure 16. Capacitance (CI, CCOM(OFF), CCOM(ON), CNO(OFF), CNO(ON))
V+
NO
(3)
VCOM
VI
VNO
TEST
RL
CL
tON
300 Ω
35 pF
tOFF
300 Ω
35 pF
COM
CL(2)
RL
IN
Logic
Input(1)
V+
Logic
Input
(VI)
GND
50%
50%
0
tON
tOFF
Switch
Output
(VNO)
90%
90%
(1) All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns, tf < 5 ns.
(2) CL includes probe and jig capacitance.
(3) See Electrical Characteristics for VCOM.
Figure 17. Turn-On (tON) and Turn-Off Time (tOFF)
V+
Network Analyzer
50 W
VNO
NO
Channel ON: NO to COM
COM
VCOM
Source
Signal
VI = V+ or GND
Network Analyzer Setup
50 W
VI
+
IN
Source Power = 0 dBm
(632-mV P-P at 50-W load)
GND
Figure 18. Bandwidth (BW)
10
DC Bias = 350 mV
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SLLS641 – JANUARY 2005
V+
Network Analyzer
Channel OFF: NO to COM
50 W
VNO NO
VI = V+ or GND
VCOM
COM
Source
Signal
50 W
Network Analyzer Setup
VI
50 W
Source Voltage = 1 VRMS
IN
+
DC Bias = 350 mV
GND
Figure 19. OFF Isolation (OISO)
V+
RGEN
VGEN
Logic
Input
(VI)
VIH
OFF
ON
OFF V
IL
NO
COM
+
VCOM
∆VCOM
VCOM
CL(1)
VI
VGEN = 0 to V+
RGEN = 0
CL = 1 nF
QC = CL × ∆VCOM
VI = VIH or VIL
IN
Logic
Input(2)
GND
(1) CL includes probe and jig capacitance.
(2) All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns, tf < 5 ns.
Figure 20. Charge Injection (QC)
VI = V+/2 or −V+/2
RL = 600 Ω
fSOURCE = 20 Hz to 20 kHz CL = 50 pF
Channel ON: COM to NO
VSOURCE = V+ P-P
V+/2
Audio Analyzer
NO
Source
Signal
COM
CL(1)
600 W
VI
600 W
IN
GND
−V+/2
(1) CL includes probe and jig capacitance.
Figure 21. Total Harmonic Distortion (THD)
11
PACKAGE OPTION ADDENDUM
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12-Sep-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
MAX4596DBVR
ACTIVE
SOT-23
DBV
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
MAX4596DBVRE4
ACTIVE
SOT-23
DBV
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
MAX4596DCKR
ACTIVE
SC70
DCK
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
MAX4596DCKRE4
ACTIVE
SC70
DCK
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
orders and should verify that such information is current and complete. All products are sold subject to TI’s terms
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amplifier.ti.com
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