AGILENT HMMC-5038

38 GHz LNA
Technical Data
HMMC-5038
Features
• Low Noise Figure: 4.8 dB
• Frequency Range:
37␣ –␣ 40␣ GHz
• High Gain (Adjustable):
3 V, 120 mA @ 23 dB Gain
3 V, 80 mA @ 20 dB Gain
• 50 Ω Input/Output Matching
Description
The HMMC-5038 MMIC is a highgain low-noise amplifier (LNA)
designed for communication
receivers that operate from
37␣ GHz to 40 GHz. The gain of
this four stage LNA can be
adjusted by altering the gate bias
of the output two, or three, stages
while maintaining optimum noise
figure bias for the input stage(s).
Large FETs provide high power
handing capability to avoid power
compression. The backside of the
chip is both RF and DC ground.
This helps simplify the assembly
process and reduce assembly
related performance variations
and costs.
The HMMC-5038 is fabricated
using a PHEMT integrated
circuit structure that provides
good noise and gain performance.
Chip Size:
Chip Size Tolerance:
Chip Thickness:
Pad Dimensions:
1630 x 760 µm (64.2 x 29.9 mils)
± 10 µm (± 0.4 mils)
127 ± 15 µm (5.0 ± 0.6 mils)
80 x 80 µm (3.1 x 3.1 mils)
Absolute Maximum Ratings[1]
Symbol
Parameters/Conditions
Units
VD1, 2-3-4
Drain Supply Voltages
V
IG1, 2-3-4
Gate Supply Voltages
V
Min.
Max.
5
-3.0
0
IDD
Total Drain Current
mA
300
Pin
RF Input Power
dBm
15
Tch
Channel Temperature[2]
°C
+160
TA
Backside Ambient Temp.
°C
-55
+125
TSTG
Storage Temperature
°C
-65
+165
Tmax
Maximum Assembly Temp.
°C
+310
Note:
1. Absolute maximum ratings for continuous operation unless otherwise noted.
2. Refer to DC Specifications/Physical Properties table for derating information.
6-53
5965-5445E
DC Specifications/Physical Properties [1]
Symbol
VD1, 2-3-4
ID1
ID2-3-4
VG1, 2, 3-4
Vp
θch-bs
Tch
Parameters and Test Conditions
Low Noise Drain Supply Operating Voltages
Units
V
Min.
2
Typ.
3
First Stage Drain Supply Current
(VDD = 3 V, VG1 = -0.8 V)
mA
22
Drain Supply Current for Stages 2, 3, and 4 Combined
(VDD = 3 V, VGG = -0.8 V)
mA
98
Gate Supply Operating Voltages (IDD = 120 mA)
V
-0.8
Pinch-off Voltage (VDD = 3 V, IDD ≤ 10 mA)
V
Thermal Resistance [2]
(Channel-to-Backside @ Tch = 160°C)
Channel Temperature [3] (TA = 125°C, MTTF > 106 hrs,
VDD = 3 V, IDD = 120 mA)
-2
-1.2
°C/W
62
°C
150
Max.
5
-0.8
Notes:
1. Backside ambient operating temperature TA = 25°C unless otherwise noted.
2. Thermal resistance (°C/Watt) at a channel temperature T (°C) can be estimated using the equation:
θ(T) ≅ 62 x [T(°C)+ 273] / [160°C + 273].
3. Derate MTTF by a factor of two for every 8°C above Tch.
RF Specifications, TA = 25°C, VDD = 3 V, IDD = 120 mA, Z o = 50 Ω
Symbol
BW
S21
∆ S21
(RLin)MIN
(RLout)MIN
S12
P-1dB
NF
Parameters and Test Conditions
Operating Bandwidth
Small Signal Gain[1]
Small Signal Gain Flatness
Minimum Input Return Loss w/o external
capacitive matching [2]
Minimum Output Return Loss
Reverse Isolation
Output Power @ 1dB Gain Compression
Noise Figure [3]
Units
GHz
dB
dB
dB
Min.
37
20
dB
dB
dBm
dB
12
8
Typ.
Max.
40
23
± 0.5
12
18
50
12
4.8
Notes:
1. Gain may be reduced by biasing for lower IDD. Increasing IDD will increase Gain.
2. Minimum input return may be improved by approximately 3 dB by including a small capacitive (~30 fF) stub on the
input transmission line.
3. Noise Figure may be further reduced by optimizing DC bias conditions.
6-54
Applications
The HMMC-5038 low noise
amplifier (LNA) is designed for
use in digital radio communication systems and point-tomultipoint links that operate
within the 37 GHz to 40 GHz
frequency band. High gain and
low noise temperature make it
ideally suited as a front-end gain
stage in the receiver. The MMIC
solution is a cost effective
alternative to hybrid assemblies.
Biasing and Operation
The recommended DC bias
condition is with all drains
connected to single 3 volt supply
and all gates connected to an
adjustable negative voltage
supply as shown in Figure 1(a).
The gate voltage is adjusted for a
total drain supply current of
typically 120 mA. Reducing the
current in stages 3 and 4 will
reduce the overall gain. The gain
can be adjusted further by
altering the current through stage
2 with little affect on noise figure.
Optimum noise figure is realized
with VD1= 3 to 4 volts and ID1 = 20
to 25 mA.
The second, third, and fourth
stage DC drain bias lines are
connected internally and therefore require only a single bond
wire. An additional bond wire is
needed for the first stage DC
drain bias, VD1.
The third and fourth stage DC
gate bias lines are connected
internally. A total of three DC
gate bond wires are required: One
for VG1, one for VG2, and one for
the VG3-to-VG4 connection as
shown in Figure 1.
A DC blocking capacitor is
needed in the RF input transmission line only if there is DC
voltage present. The RF output is
AC-coupled.
Optimum input match is achieved
when an optional capacitive
(~30␣ fF) stub is included on the
input transmission line. This
capacitance compliments the
bond wire inductance to complete the input matching network.
No ground wires are needed
because ground connections are
made with plated through-holes
to the backside of the device.
Assembly Techniques
A conductive epoxy such as
ABLEBOND® 71-1LM1 or
ABLEBOND® 84-1LM1 is the
recommended assembly method
provided the Absolute Maximum
Thermal Ratings are not
exceeded. Solder die attach using
a fluxless gold-tin (AuSn) solder
preform may also be used. The
device should be attached to an
electrically conductive surface to
complete the DC and RF ground
paths. The backside metallization
on the device is gold.
6-55
It is recommended that the RF
input and RF output connections
be made using either 500 line/inch
(or equivalent) gold wire mesh, or
dual 0.7 mil diameter gold wire.
The RF wires should be kept as
short as possible to minimize
inductance. The bias supply can
be 0.7 mil diameter gold wires.
Thermosonic wedge is the
preferred method for wire
bonding to the gold bond pads.
Mesh wires can be attached using
a 2 mil round tacking tool and a
tool force of approximately
22␣ grams with an ultrasonic
power of roughly 55 dB for a
duration of 76 ± 8 msec. A guidedwedge at an ultrasonic power
level of 64 dB can be used for the
0.7 mil wire. The recommended
wire bond stage temperature is
150 ± 2°C.
For more detailed information
see HP application note #999
“GaAs MMIC Assembly and
Handling Guidelines.”
GaAs MMICs are ESD sensitive.
Proper precautions should be used
when handling these devices.
(≅100 pF)
(≅100 pF)
(a) Single drain-supply and single gate-supply assembly.
/
(≅100 pF)
(≅100 pF)
(b) Separate first-stage gate bias supply.
This diagram shows an optional variation to the VG2 jumper-wire bonding scheme presented in (a).
Figure 1. HMMC-5038 Common Assembly Diagrams.
(Note: To assure stable operation, bias supply feeds should be bypassed to ground with a capacitor, Cb > 100 nF typical.)
0 80
350
620
820
1070
1360
760
660
500
330
80
0
0
0 120
600
1090
1550 1630
Figure 2. HMMC-5038 Bonding Pad Locations. (Dimensions in micrometers)
6-56
Isolation
Spec Range
(37 – 40 GHz)
10
0
36
37
38
39
40
41
42
100
43
Spec Range
(37 – 40 GHz)
8
12
12
16
16
20
Output
24
36
37
FREQUENCY (GHz)
38
39
40
41
42
20
24
43
30
20
VDD = 4.0 V, I D1 = 25 mA
6
4
2
37
38
39
40
41
42
43
FREQUENCY (GHz)
Figure 4. Input and Output Return Loss
vs. Frequency.
VDD = 3.0 V
Spec Range
(37 – 40 GHz)
8
0
36
FREQUENCY (GHz)
Figure 3. Gain and Isolation vs.
Frequency.
7
8
Input
VDD = 4.0 V, ID1 = 25 mA, ID2,3,4 = 60 to 125 mA
10
4
NOISE FIGURE (dB)
50
INPUT RETURN LOSS (dB)
20
REVERSE ISOLATION (dB)
SMALL SIGNAL GAIN (dB)
Gain
30
VDD = 3.0 V, ID1 = 25 mA, ID2,3,4 = 95 mA
4
0
OUTPUT RETURN LOSS (dB)
VDD = 3.0 V, ID1 = 25 mA, ID2,3,4 = 95 mA
40
Figure 5. Noise Figure vs. Frequency.
30
5
20
4
15
15
25
10
20
5
15
GAIN (dB)
25
Gain
P-1 (dBm)
6
GAIN (dB)
NOISE FIGURE (dB)
Gain
P-1
Noise Figure
3
40
60
80
100
120
140
10
160
IDD (mA)
Figure 6. 38 GHz Noise Figure and
Gain vs. IDD.
0
40
60
80
100
120
10
140
ID2,3,4 (mA)
Figure 7. 38 GHz Gain and
Power Performance vs. ID2,3,4.
This data sheet contains a variety of typical and guaranteed performance data. The
information supplied should not be interpreted as a complete list of circuit specifications. In this data sheet the term typical refers to the 50th percentile performance. For
additional information contact your local HP sales representative.
6-57