SCES394B − JUNE 2002 − REVISED MARCH 2005
D Member of the Texas Instruments
D
D
D
D
D
D Ioff Supports Partial-Power-Down Mode
Widebus Family
DOC Circuitry Dynamically Changes
Output Impedance, Resulting in Noise
Reduction Without Speed Degradation
Dynamic Drive Capability Is Equivalent to
Standard Outputs With IOH and IOL of
±24 mA at 2.5-V VCC
Control Inputs VIH/VIL Levels are
Referenced to VCCB Voltage
If Either VCC Input Is at GND, Both Ports
Are in the High-Impedance State
Overvoltage-Tolerant Inputs/Outputs Allow
Mixed-Voltage-Mode Data Communications
D
D
D
Operation
Fully Configurable Dual-Rail Design Allows
Each Port to Operate Over the Full 1.4-V to
3.6-V Power-Supply Range
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
description/ordering information
This 16-bit (dual-octal) noninverting bus transceiver uses two separate configurable power-supply rails. The
A port is designed to track VCCA. VCCA accepts any supply voltage from 1.4 V to 3.6 V. The B port is designed
to track VCCB. VCCB accepts any supply voltage from 1.4 V to 3.6 V. This allows for universal low-voltage
bidirectional translation between any of the 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.
The SN74AVCB164245 is designed for asynchronous communication between data buses. The device
transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the
direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are
effectively isolated.
The SN74AVCB164245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCB.
To ensure the high-impedance state during power up or power down, OE should be tied to VCCB through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down. If either VCC input is at GND,
both ports are in the high-impedance state.
ORDERING INFORMATION
−40°C to 85°C
ORDERABLE
PART NUMBER
PACKAGE†
TA
TOP-SIDE
MARKING
TSSOP − DGG
Tape and reel
SN74AVCB164245GR
AVCB164245
TVSOP − DGV
Tape and reel
SN74AVCB164245VR
WB4245
VFBGA − GQL
Tape and reel
SN74AVCB164245KR
VFBGA − ZQL (Pb-Free)
Tape and reel
74AVCB164245ZQLR
WB4245
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
DOC and Widebus are trademarks of Texas Instruments.
Copyright 2005, Texas Instruments Incorporated
!"#$%! & '("")% $& ! *(+,'$%! -$%).
"!-('%& '!!"# %! &*)''$%!& *)" %/) %)"#& ! )0$& &%"(#)%&
&%$-$"- 1$""$%2. "!-('%! *"!')&&3 -!)& !% )')&&$",2 ',(-)
%)&%3 ! $,, *$"$#)%)"&.
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1
SCES394B − JUNE 2002 − REVISED MARCH 2005
terminal assignments
DGG OR DGV PACKAGE
(TOP VIEW)
1DIR
1B1
1B2
GND
1B3
1B4
VCCB
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
VCCB
2B5
2B6
GND
2B7
2B8
2DIR
GQL PACKAGE
(TOP VIEW)
1
2
3
4
5
1
48
2
47
3
46
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
25
terminal assignments
6
1
A
B
C
D
E
F
G
1OE
1A1
1A2
GND
1A3
1A4
VCCA
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
VCCA
2A5
2A6
GND
2A7
2A8
2OE
2
3
6
A
1DIR
NC
NC
NC
NC
1OE
1B2
1B1
GND
GND
1A1
1A2
C
1B4
1B3
1B5
VCCA
GND
1A4
1B6
VCCB
GND
1A3
D
1A5
1A6
E
1B8
1B7
1A7
1A8
F
2B1
2B2
2A2
2A1
G
2B3
2B4
GND
GND
2A4
2A3
H
2B5
2B6
VCCA
GND
2A6
2A5
2A8
2A7
NC
NC
2OE
H
J
2B7
2B8
J
K
2DIR
NC
NC
2
5
B
VCCB
GND
K
4
NC − No internal connection
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SCES394B − JUNE 2002 − REVISED MARCH 2005
FUNCTION TABLE
(each 8-bit section)
INPUTS
OE
DIR
OPERATION
L
L
B data to A bus
L
H
A data to B bus
H
X
Isolation
logic diagram (positive logic)
1DIR
1
2DIR
48
1A1
25
1OE
47
2A1
2
24
2OE
36
13
1B1
2B1
To Seven Other Channels
To Seven Other Channels
Pin numbers shown are for the DGG and DGV packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCCA and VCCB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V
Input voltage range, VI (see Note 1): I/O ports (A port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V
I/O ports (B port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V
Control inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V
Voltage range applied to any output in the high-impedance or power-off state, VO
(see Note 1): (A port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V
(B port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V
Voltage range applied to any output in the high or low state, VO
(see Notes 1 and 2): (A port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCCA + 0.5 V
(B port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCCB + 0.5 V
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through VCCA, VCCB, or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA
Package thermal impedance, θJA (see Note 3): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
GQL/ZQL package . . . . . . . . . . . . . . . . . . . . . . . . . . . 28°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
2. The output positive-voltage rating may be exceeded up to 4.6 V maximum if the output current rating is observed.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
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3
SCES394B − JUNE 2002 − REVISED MARCH 2005
recommended operating conditions (see Notes 4 through 6)
VCCI
VCCA
VCCB
VCCO
1.4
3.6
V
1.4
3.6
V
VCCI × 0.65
1.7
High-level input
voltage
Data inputs
1.95 V to 2.7 V
Low-level input
voltage
Data inputs
VCCI × 0.35
0.7
1.95 V to 2.7 V
2.7 V to 3.6 V
Control inputs
(Referenced to VCCB)
VCCB × 0.65
1.7
1.95 V to 2.7 V
2.7 V to 3.6 V
VI
VO
IOH
IOL
∆t/∆v
Low-level input
voltage
Control inputs
(Referenced to VCCB)
VCCB × 0.35
0.7
1.95 V to 2.7 V
2.7 V to 3.6 V
V
0.8
Input voltage
Output voltage
V
2
1.4 V to 1.95 V
VIL
V
0.8
1.4 V to 1.95 V
High-level input
voltage
V
2
1.4 V to 1.95 V
VIH
UNIT
Supply voltage
2.7 V to 3.6 V
VIL
MAX
Supply voltage
1.4 V to 1.95 V
VIH
MIN
0
3.6
V
Active state
0
3-state
0
VCCO
3.6
V
High-level output current
Low-level output current
1.4 V to 1.6 V
−2
1.65 V to 1.95 V
−4
2.3 V to 2.7 V
−8
3 V to 3.6 V
−12
1.4 V to 1.6 V
2
1.65 V to 1.95 V
4
2.3 V to 2.7 V
8
3 V to 3.6 V
12
Input transition rise or fall rate
5
mA
mA
ns/V
TA
Operating free-air temperature
−40
85
°C
NOTES: 4. VCCI is the VCC associated with the data input port.
5. VCCO is the VCC associated with the output port.
6. All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4
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SCES394B − JUNE 2002 − REVISED MARCH 2005
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Note 7 and 8)
PARAMETER
VOH
VOL
II
Control inputs
TEST CONDITIONS
IOH = −100 µA
IOH = −2 mA
VI = VIH
VI = VIH
IOH = −4 mA
IOH = −8 mA
VCCA
VCCB
1.4 V to 3.6 V
1.4 V to 3.6 V
1.4 V
VI = VIH
VI = VIH
1.65 V
1.65 V
1.2
2.3 V
2.3 V
1.75
IOH = −12 mA
IOH = 100 µA
VI = VIH
VI = VIL
3V
3V
2.3
IOH = 2 mA
IOH = 4 mA
VI = VIL
VI = VIL
IOH = 8 mA
IOH = 12 mA
VI = VIL
VI = VIL
VI = VCCB or GND
1.4 V to 3.6 V
B port
B port
VO = VCCO or GND,
VI = VCCI or GND
A port
MAX
1.4 V to 3.6 V
0.2
1.4 V
0.35
1.65 V
1.65 V
0.45
2.3 V
2.3 V
0.55
3V
UNIT
V
1.4 V
1.4 V to 3.6 V
3V
0.7
3.6 V
±2.5
0V
0 to 3.6 V
±10
0 to 3.6 V
0V
±10
OE = VIH
3.6 V
3.6 V
±12.5
OE = don’t
care
0V
3.6 V
±12.5
3.6 V
0V
±12.5
VI or VO = 0 to 3.6 V
A or B ports
IOZ‡
TYP†
VCCO − 0.2 V
1.05
1.4 V
A port
Ioff
MIN
V
µA
µA
A
µA
1.6 V
1.6 V
20
1.95 V
1.95 V
20
2.7 V
2.7 V
30
0V
3.6 V
−40
3.6 V
0V
40
3.6 V
3.6 V
40
1.6 V
1.6 V
20
1.95 V
1.95 V
20
2.7 V
2.7 V
30
0V
3.6 V
40
3.6 V
0V
−40
3.6 V
3.6 V
3.3 V
3.3 V
4
pF
Cio
A or B ports
3.3 V
† All typical values are at TA = 25°C.
‡ For I/O ports, the parameter IOZ includes the input leakage current.
NOTES: 7. VCCO is the VCC associated with the output port.
8. VCCI is the VCC associated with the input port.
3.3 V
5
pF
ICCA
VI = VCCI or GND,
ICCB
Ci
VI = VCCI or GND,
Control inputs
VI = 3.3 V or GND
VO = 3.3 V or GND
IO = 0
IO = 0
POST OFFICE BOX 655303
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µA
A
µA
A
40
5
SCES394B − JUNE 2002 − REVISED MARCH 2005
switching characteristics over recommended operating free-air temperature range,
VCCA = 1.5 V ± 0.1 V (see Figure 2)
PARAMETER
tpd
ten
tdis
FROM
(INPUT)
TO
(OUTPUT)
A
B
VCCB = 1.5 V
± 0.1 V
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
VCCB = 3.3 V
± 0.3 V
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
B
1.7
6.7
1.9
6.3
1.8
5.5
1.7
5.8
A
1.8
6.8
2.2
7.4
2.1
7.6
2.1
7.3
OE
A
2.5
8.4
2.4
7.4
2.1
5.2
1.9
4.2
OE
B
2.1
9
2.9
9.8
3.2
10
3
9.8
OE
A
2.2
6.9
2.3
6.1
1.3
3.6
1.3
3
OE
B
2.1
7.1
2.3
6.4
1.7
5.1
1.6
4.8
UNIT
ns
ns
ns
switching characteristics over recommended operating free-air temperature range,
VCCA = 1.8 V ± 0.15 V (see Figure 2)
PARAMETER
tpd
ten
tdis
FROM
(INPUT)
TO
(OUTPUT)
A
VCCB = 1.5 V
± 0.1 V
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
VCCB = 3.3 V
± 0.3 V
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
B
1.7
6.4
1.8
6
1.7
4.7
1.6
4.3
B
A
1.4
5.5
1.8
6
1.8
5.8
1.8
5.5
OE
A
2.6
8.5
2.5
7.5
2.2
5.3
1.9
4.2
OE
B
1.8
7.6
2.6
7.7
2.6
7.6
2.6
7.4
OE
A
2.3
7
2.3
6.1
1.3
3.6
1.3
3
OE
B
1.8
7
2.5
6.3
1.8
4.7
1.7
4.4
UNIT
ns
ns
ns
switching characteristics over recommended operating free-air temperature range,
VCCA = 2.5 V ± 0.2 V (see Figure 2)
PARAMETER
tpd
ten
tdis
6
FROM
(INPUT)
TO
(OUTPUT)
A
B
B
A
OE
VCCB = 1.5 V
± 0.1 V
MIN
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
VCCB = 3.3 V
± 0.3 V
MAX
MIN
MAX
MIN
MAX
MIN
MAX
1.6
6
1.8
5.6
1.5
4
1.4
3.4
1.3
4.6
1.7
4.4
1.5
4
1.4
3.7
A
3.1
8.5
2.5
7.5
2.2
5.3
1.9
4.2
OE
B
1.7
5.7
2.2
5.5
2.2
5.3
2.2
5.1
OE
A
2.4
7
3
6.1
1.4
3.6
1.2
3
OE
B
1.2
5.8
1.9
5
1.4
3.6
1.3
3.3
UNIT
ns
ns
ns
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• DALLAS, TEXAS 75265
SCES394B − JUNE 2002 − REVISED MARCH 2005
switching characteristics over recommended operating free-air temperature range,
VCCA = 3.3 V ± 0.3 V (see Figure 2)
PARAMETER
tpd
ten
tdis
FROM
(INPUT)
TO
(OUTPUT)
A
B
VCCB = 1.5 V
± 0.1 V
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
VCCB = 3.3 V
± 0.3 V
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
B
1.5
5.9
1.7
5.4
1.5
3.7
1.4
3.1
A
1.3
4.5
1.6
3.8
1.5
3.3
1.4
3.1
OE
A
2.6
8.3
2.5
7.4
2.2
5.2
1.9
4.1
OE
B
1.6
4.9
2
4.5
2
4.3
1.9
4.1
OE
A
2.3
7
3
6
1.3
3.5
1.2
3.5
OE
B
1.3
6.9
2.1
5.5
1.6
3.8
1.5
3.5
UNIT
ns
ns
ns
operating characteristics, VCCA and VCCB = 3.3 V, TA = 25°C
PARAMETER
CpdA
(VCCA)
CpdB
(VCCB)
Power dissipation capacitance per transceiver,
A port input, B port output
TEST CONDITIONS
Outputs enabled
TYP
Outputs disabled
7
CL = 0,
f = 10 MHz
Power dissipation capacitance per transceiver,
B port input, A port output
Outputs enabled
Outputs disabled
7
Power dissipation capacitance per transceiver,
A port input, B port output
Outputs enabled
20
Power dissipation capacitance per transceiver,
B port input, A port output
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Outputs enabled
Outputs disabled
• DALLAS, TEXAS 75265
UNIT
14
20
pF
7
CL = 0,
f = 10 MHz
14
pF
7
7
SCES394B − JUNE 2002 − REVISED MARCH 2005
output description
The DOC circuitry is implemented, which, during the transition, initially lowers the output impedance to
effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1 shows typical VOL
vs IOL and VOH vs IOH curves to illustrate the output impedance and drive capability of the circuit. At the
beginning of the signal transition, the DOC circuit provides a maximum dynamic drive that is equivalent to a
high-drive standard-output device. For more information, refer to the TI application reports, AVC Logic Family
Technology and Applications, literature number SCEA006, and Dynamic Output Control (DOC ) Circuitry
Technology and Applications, literature number SCEA009.
3.2
TA = 25°C
Process = Nominal
− Output Voltage − V
2.8
2.4
VCC = 3.3 V
2.0
1.6
VCC = 2.5 V
1.2
OH
VCC = 1.8 V
0.8
V
VOL − Output Voltage − V
2.8
2.4
2.0
1.6
1.2
0.8
0.4
0.4
0
17
34
51
68
85 102 119
IOL − Output Current − mA
136
153
170
TA = 25°C
Process = Nominal
VCC = 3.3 V
VCC = 2.5 V
−160 −144 −128 −112 −96 −80 −64 −48
IOH − Output Current − mA
Figure 1. Typical Output Voltage vs Output Current
8
POST OFFICE BOX 655303
VCC = 1.8 V
• DALLAS, TEXAS 75265
−32 −16
0
SCES394B − JUNE 2002 − REVISED MARCH 2005
PARAMETER MEASUREMENT INFORMATION
2 × VCCO
S1
RL
From Output
Under Test
Open
GND
CL
(see Note A)
TEST
S1
tpd
tPLZ/tPZL
tPHZ/tPZH
Open
2 × VCCO
GND
RL
tw
LOAD CIRCUIT
VCCI
VCCI/2
Input
VCCO
1.5 V ± 0.1 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
CL
RL
15 pF
30 pF
30 pF
30 pF
2 kΩ
1 kΩ
500 Ω
500 Ω
VTP
0.1 V
0.15 V
0.15 V
0.3 V
VCCI/2
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VCCB
Output
Control
(low-level
enabling)
VCCB/2
0V
tPLZ
tPZL
VCCI
Input
VCCI/2
VCCI/2
0V
tPLH
Output
VOH
VCCO/2
VOL
VCCO/2
VCCO
Output
Waveform 1
S1 at 2 × VCCO
(see Note B)
tPHL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VCCB/2
VCCO/2
VOL
tPHZ
tPZH
Output
Waveform 2
S1 at GND
(see Note B)
VOL + VTP
VCCO/2
VOH − VTP
VOH
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRRv10 MHz, ZO = 50 Ω, dv/dt ≥ 1 V/ns,
dv/dt ≥1 V/ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. VCCI is the VCC associated with the input port.
I. VCCO is the VCC associated with the output port.
Figure 2. Load Circuit and Voltage Waveforms
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9
PACKAGE OPTION ADDENDUM
www.ti.com
30-Mar-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
74AVCB164245ZQLR
ACTIVE
VFBGA
ZQL
56
1000
Pb-Free
(RoHS)
SNAGCU
Level-1-260C-UNLIM
SN74AVCB164245DGG
PREVIEW
TSSOP
DGG
48
40
Pb-Free
(RoHS)
CU NIPDAU
Level-1-250C-UNLIM
SN74AVCB164245GR
ACTIVE
TSSOP
DGG
48
2000
Pb-Free
(RoHS)
CU NIPDAU
Level-1-250C-UNLIM
SN74AVCB164245KR
ACTIVE
VFBGA
GQL
56
1000
TBD
SNPB
Level-1-240C-UNLIM
SN74AVCB164245VR
ACTIVE
TVSOP
DGV
48
2000
Pb-Free
(RoHS)
CU NIPDAU
Level-1-250C-UNLIM
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,40
0,23
0,13
24
13
0,07 M
0,16 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
0°–8°
1
0,75
0,50
12
A
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,08
14
16
20
24
38
48
56
A MAX
3,70
3,70
5,10
5,10
7,90
9,80
11,40
A MIN
3,50
3,50
4,90
4,90
7,70
9,60
11,20
DIM
4073251/E 08/00
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
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MECHANICAL DATA
MTSS003D – JANUARY 1995 – REVISED JANUARY 1998
DGG (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0,27
0,17
0,50
48
0,08 M
25
6,20
6,00
8,30
7,90
0,15 NOM
Gage Plane
1
0,25
24
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
48
56
64
A MAX
12,60
14,10
17,10
A MIN
12,40
13,90
16,90
DIM
4040078 / F 12/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold protrusion not to exceed 0,15.
Falls within JEDEC MO-153
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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