TI SN74ABT541BN

SN54ABT541, SN74ABT541B
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
www.ti.com
SCBS093L – DECEMBER 1993 – REVISED DECEMBER 2006
FEATURES
•
•
1
20
VCC
2
19
3
18
4
17
OE2
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
5
16
6
15
7
14
8
13
9
12
10
11
SN54ABT541...FK PACKAGE
(TOP VIEW)
A3
A4
A5
A6
A7
VCC
•
OE1
A1
A2
A3
A4
A5
A6
A7
A8
GND
3
2
20 19
18
1
OE2
•
SN54ABT541...J OR W PACKAGE
SN74ABT541B...DB, DW, N, OR PW PACKAGE
(TOP VIEW)
A1
OE1
•
State-of-the-Art EPIC-IIB™ BiCMOS Design
Significantly Reduces Power Dissipation
Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17
Typical VOLP (Output Ground Bounce) < 1 V at
VCC = 5 V, TA = 25°C
High-Impedance State During Power Up and
Power Down
High-Drive Outputs (–32-mA IOH, 64-mA IOL)
Package Options Include Plastic Small-Outline
(DW), Shrink Small-Outline (DB), and Thin
Shrink Small-Outline (PW) Packages, Ceramic
Chip Carriers (FK), Ceramic Flat (W) Package,
and Plastic (N) and Ceramic (J) DIPs
A2
•
4
5
17
6
16
7
15
14
8
Y1
Y2
Y3
Y4
Y5
Y6
Y7
A8
GND
Y8
9 10 11 12 13
DESCRIPTION/ORDERING INFORMATION
The SN54ABT541 and SN74ABT541B octal buffers and line drivers are ideal for driving bus lines or buffering
memory address registers. The devices feature inputs and outputs on opposite sides of the package to facilitate
printed circuit board layout.
ORDERING INFORMATION
PACKAGE (1)
TA
PDIP – N
SOIC – DW
–40°C to 85°C
SSOP – DB
(1)
Reel of 1000
SN74ABT541BN
Tube of 25
SN74ABT541BDW
Reel of 2000
SN74ABT541BDWR
Reel of 2000
SN74ABT541BDBR
SN74ABT541BDBRG4
TOP-SIDE MARKING
SN74ABT541BN
ABT541B
AB541B
Reel of 1050
SN74ABT541BPW
Reel of 2000
SN74ABT541BPWR
CDIP – J
Reel of 1000
SNJ54ABT541J
SNJ54ABT541J
CFP – W
Reel of 510
SNJ54ABT541W
SNJ54ABT541W
LCCC – FK
Reel of 2200
SNJ54ABT541FK
SNJ54ABT541FK
TSSOP – PW
–55°C to 125°C
ORDERABLE PART NUMBER
AB541B
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC-IIB is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1993–2006, Texas Instruments Incorporated
SN54ABT541, SN74ABT541B
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
www.ti.com
SCBS093L – DECEMBER 1993 – REVISED DECEMBER 2006
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
The 3-state control gate is a two-input AND gate with active-low inputs so that if either output-enable (OE1 or
OE2) input is high, all eight outputs are in the high-impedance state.
When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 2.1 V, OE should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN54ABT541 is characterized for operation over the full military temperature range of –55°C to 125°C. The
SN74ABT541B is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
INPUTS
OE2
L
L
L
L
L
L
H
H
H
X
X
Z
X
H
X
Z
LOGIC SYMBOL(1)
1
&
LOGIC DIAGRAM (POSITIVE LOGIC)
OE1
EN
OE1
A
OUTPUTS
Y
OE1
19
OE2
1
19
OE2
2
18
1
A1
3
17
4
16
A2
18
Y1
To Seven Other Channels
Y3
5
15
6
14
7
13
8
12
9
11
Y4
A4
Y5
A5
Y6
A6
Y7
A7
Y8
A8
2
2
Y2
A3
(1)
A1
Y1
This symbol is in accordance
ANSI/IEEE Std 91-1984 and
Publication 617-12.
with
IEC
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SN54ABT541, SN74ABT541B
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
www.ti.com
SCBS093L – DECEMBER 1993 – REVISED DECEMBER 2006
Absolute Maximum Ratings
(1)
over recommended operating free-air temperature range (unless otherwise noted)
MIN
MAX
VCC
Supply voltage range
–0.5
7
V
VI
Input voltage range (2)
–0.5
7
V
VO
Voltage range applied to any output in the high or power-off state
–0.5
5.5
V
IO
Current into any output in the low state
SN54ABT541
96
SN74ABT541B
128
UNIT
mA
IIK
Input clamp current
VI < 0
–18
mA
IOK
Output clamp current
VO < 0
–50
mA
θJA
Package thermal impedance (3)
DB package
115
DW package
97
N package
67
PW package
Tstg
(1)
(2)
(3)
°C/W
128
Storage temperature range
–65
150
°C
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating
conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace length
of zero.
Recommended Operating Conditions (1)
over recommended operating free-air temperature range (unless otherwise noted)
SN54ABT541
SN74ABT541B
UNIT
MIN
MAX
MIN
MAX
4.5
5.5
4.5
5.5
VCC
Supply voltage
VIH
High-level input voltage
VIL
Low-level input voltage
0.8
0.8
V
IOH
High-level output current
–24
–32
mA
IOL
Low-level output current
48
64
mA
∆t/∆v
Input transition rise or fall rate
5
5
ns/V
2
2
∆t/∆VCC Power-up ramp rate
TA
(1)
Operating free-air temperature
V
µs/V
200
–55
125
–40
V
85
°C
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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3
SN54ABT541, SN74ABT541B
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
www.ti.com
SCBS093L – DECEMBER 1993 – REVISED DECEMBER 2006
Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TA = 25°C
TEST CONDITIONS
MIN TYP (1)
MIN
MIN
VCC = 4.5 V,
II = –18 mA
VOH
VCC = 4.5 V,
IOH = –3 mA
2.5
2.5
2.5
VCC = 5 V,
IOH = –3 mA
3
3
3
VCC = 4.5 V,
IOH = –24 mA
2
2
IOH = –32 mA
2 (2)
VCC = 4.5 V,
–1.2
SN74ABT541B
MAX
VIK
VOL
–1.2
MAX
–1.2
UNIT
V
V
2
IOL = 48 mA
0.55
IOL = 64 mA
0.55 (2)
Vhys
0.55
0.55
100
VV
mV
±1
±1
±1
µA
VCC = 0 to 2.1 V, VO = 0.5 V to 2.7 V, OE = X
±50 (3)
±50 (3)
±50
µA
IOZPD
VCC = 2.1 V to 0, VO = 0.5 V to 2.7 V, OE = X
±50 (3)
±50 (3)
±50
µA
IOZH
VCC = 5.5 V,
VO = 2.7 V
10
10
10
µA
IOZL
VCC = 5.5 V,
VO = 0.5 V
–10
–10
–10
µA
Ioff
VCC = 0 V,
VI or VO≤ 4.5 V
±100
µA
ICEX
VCC = 5.5 V, VO = 5.5 V,
Outputs high
IO
VCC = 5.5 V (4),
VO = 2.5 V
ICC
VCC = 5.5 V,
IO = 0 V,
VI = VCC or GND
VCC = 5.5 V,
One input at 3.4 V,
Other inputs at VCC or
GND (5)
II
VCC = 5.5 V,
IOZPU
∆ICC
VI = VCC or GND
±100
50
µA
–180
mA
250
µA
30
30
mA
250
250
µA
1.5
1.5
mA
50
50
50
µA
1.5
1.2
1.5
mA
50
–140
–180
Outputs high
5
250
Outputs low
22
30
1
250
Outputs enabled
1.5
Outputs disabled
Outputs disabled
–50
Control Inputs
–50
–180
–50
250
Ci
VI = 2.5 V or 0.5 V
3
pF
Co
VO = 2.5 V or 0.5 V
6
pF
(1)
(2)
(3)
(4)
(5)
4
SN54ABT51
MAX
All typical values are at VCC = 5 V.
On products compliant to MIL-PRF-38535, this parameter does not apply.
On products compliant to MIL-PRF-38535, this parameter is not production tested.
Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
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SN54ABT541, SN74ABT541B
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
www.ti.com
SCBS093L – DECEMBER 1993 – REVISED DECEMBER 2006
Switching Characteristics, SN54ABT541
over recommended ranges of supply voltage and operating free-air temperature, CL = 50 pF (unless otherwise noted)
(see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
A
Y
OE
Y
OE
Y
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
VCC = 5 V,
TA = 25°C
UNIT
MIN
TYP
MAX
MIN
MAX
1
2.6
4.1
1
4.6
1
2.9
4.2
1
4.7
1.1
3.1
4.8
1.1
5.4
2.1
4.4
5.9
2.1
7
2.1
5.1
6.6
2.1
7.5
1.7
4.7
6.2
1.7
6.7
ns
ns
ns
Switching Characteristics, SN74ABT541B
over recommended ranges of supply voltage and operating free-air temperature, CL = 50 pF (unless otherwise noted)
(see Figure 1)
PARAMETER
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
FROM
(INPUT)
TO
(OUTPUT)
A
Y
OE
Y
OE
Y
VCC = 5 V,
TA = 25°C
MIN
MAX
MIN
MAX
1
2
3.2
1
3.9
1
2.6
3.5
1
3.9
2
3.5
4.5
2
4
1.9
4
5.1
1.9
5.9
2.2
4.4
5.4
2.2
5.8
1.5
3
4
1.5
4.4
tsk(o) (1)
(1)
UNIT
TYP
0.5
0.5
ns
ns
ns
ns
Skew between any two outputs of the same package switching in the same direction.
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5
SN54ABT541, SN74ABT541B
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
www.ti.com
SCBS093L – DECEMBER 1993 – REVISED DECEMBER 2006
PARAMETER MEASURMENT INFORMATION
7V
500 Ω
From Output
Under Test
CL = 50 pF
(see Note A)
S1
TEST
Open
S1
Open
7V
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
GND
500 Ω
Open
3V
LOAD CIRCUIT
Timing Input
1.5 V
0V
tW
tsu
3V
Input
th
3V
1.5 V
1.5 V
Data Input
1.5 V
1.5 V
0V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3V
1.5 V
Input
1.5 V
0V
tPLH
VOH
Output
1.5 V
VOL
tPHL
1.5 V
tPLZ
3.5 V
1.5 V
tPZH
1.5 V
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
Output
Waveform 2
S1 at Open
(see Note B)
1.5 V
0V
Output
Waveform 1
S1 at 7 V
(see Note B)
tPLH
VOH
Output
1.5 V
tPZL
tPHL
VM
3V
Output
Control
VOL + 0.3 V
VOL
tPHZ
VM
VOH – 0.3 V
VOH
»0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR £ 10 MHz, ZO = 50 Ω, tr £ 2.5 ns,
tf £ 2.5 ns.
D. The outputs are measured one at a time, with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
6
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PACKAGE OPTION ADDENDUM
www.ti.com
30-Oct-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
5962-9471801Q2A
ACTIVE
LCCC
FK
20
1
TBD
5962-9471801QRA
ACTIVE
CDIP
J
20
1
TBD
1
Lead/Ball Finish
MSL Peak Temp (3)
POST-PLATE N / A for Pkg Type
A42 SNPB
N / A for Pkg Type
TBD
A42
N / A for Pkg Type
TBD
Call TI
5962-9471801QSA
ACTIVE
CFP
W
20
SN74ABT541BDBLE
OBSOLETE
SSOP
DB
20
SN74ABT541BDBR
ACTIVE
SSOP
DB
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT541BDBRE4
ACTIVE
SSOP
DB
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT541BDBRG4
ACTIVE
SSOP
DB
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT541BDW
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT541BDWE4
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT541BDWR
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT541BDWRE4
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT541BN
ACTIVE
PDIP
N
20
20
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN74ABT541BNE4
ACTIVE
PDIP
N
20
20
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN74ABT541BNSR
ACTIVE
SO
NS
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT541BNSRE4
ACTIVE
SO
NS
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT541BPW
ACTIVE
TSSOP
PW
20
70
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT541BPWE4
ACTIVE
TSSOP
PW
20
70
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT541BPWLE
OBSOLETE
TSSOP
PW
20
SN74ABT541BPWR
ACTIVE
TSSOP
PW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74ABT541BPWRE4
ACTIVE
TSSOP
PW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SNJ54ABT541FK
ACTIVE
LCCC
FK
20
1
TBD
SNJ54ABT541J
ACTIVE
CDIP
J
20
1
TBD
A42 SNPB
N / A for Pkg Type
SNJ54ABT541W
ACTIVE
CFP
W
20
1
TBD
A42
N / A for Pkg Type
TBD
Call TI
Call TI
Call TI
POST-PLATE N / A for Pkg Type
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
30-Oct-2006
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Apr-2007
TAPE AND REEL INFORMATION
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
Device
26-Apr-2007
Package Pins
Site
Reel
Diameter
(mm)
Reel
Width
(mm)
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
W
Pin1
(mm) Quadrant
SN74ABT541BDBR
DB
20
MLA
330
16
8.2
7.5
2.5
12
16
Q1
SN74ABT541BDWR
DW
20
MLA
330
24
10.8
13.0
2.7
12
24
Q1
SN74ABT541BNSR
NS
20
MLA
330
24
8.2
13.0
2.5
12
24
Q1
SN74ABT541BPWR
PW
20
MLA
330
16
6.95
7.1
1.6
8
16
Q1
TAPE AND REEL BOX INFORMATION
Device
Package
Pins
Site
Length (mm)
Width (mm)
Height (mm)
SN74ABT541BDBR
DB
20
MLA
333.2
333.2
28.58
SN74ABT541BDWR
DW
20
MLA
333.2
333.2
31.75
SN74ABT541BNSR
NS
20
MLA
333.2
333.2
31.75
SN74ABT541BPWR
PW
20
MLA
333.2
333.2
28.58
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Apr-2007
Pack Materials-Page 3
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
18
17
16
15
14
13
NO. OF
TERMINALS
**
12
19
11
20
10
A
B
MIN
MAX
MIN
MAX
20
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
28
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
9
22
8
44
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
23
7
52
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
24
6
68
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
84
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
B SQ
A SQ
25
5
26
27
28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140 / D 10/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a metal lid.
The terminals are gold plated.
Falls within JEDEC MS-004
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
0,15 M
15
0,25
0,09
8,20
7,40
5,60
5,00
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
2,00 MAX
0,10
0,05 MIN
PINS **
14
16
20
24
28
30
38
A MAX
6,50
6,50
7,50
8,50
10,50
10,50
12,90
A MIN
5,90
5,90
6,90
7,90
9,90
9,90
12,30
DIM
4040065 /E 12/01
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-150
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
0,65
14
0,10 M
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
8
14
16
20
24
28
A MAX
3,10
5,10
5,10
6,60
7,90
9,80
A MIN
2,90
4,90
4,90
6,40
7,70
9,60
DIM
4040064/F 01/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-153
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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