ASM3P2474A October 2005 rev 1.0 Low Power Peak EMI Reducing Solution Features The ASM3P2474A uses the most efficient and optimized modulation profile approved by the FCC and is Generates an EMI optimized clock signal at the implemented by using a proprietary all digital method. output. Integrated loop filter components. Operates with a 3.3V Supply. Operating current less than 6mA. Low power CMOS design. Input frequency range : 13MHz to 30MHz Generates a 1X and 2X low EMI spread spectrum The ASM3P2474A modulates the output of a single PLL in order to “spread” the bandwidth of a synthesized clock, and more importantly, decreases the peak amplitudes of its harmonics. This results in significantly lower system EMI compared to the typical narrow band signal produced by oscillators and most frequency generators. Lowering clock of the input frequency. Output Frequency Selection through FSEL pin Frequency deviation : -1.5% (Typ) @25MHz Available in 6-pin TSOT-23, 8-pin SOIC and 8-pin EMI by increasing a signal’s bandwidth is called ‘spread spectrum clock generation’. : -1.5% (Typ) @50MHz Applications TSSOP packages. The ASM3P2474A is targeted towards all portable devices with very low power requirements like MP3 Product Description players and digital still cameras. The ASM3P2474A is a versatile spread spectrum frequency modulator designed specifically for a wide range of clock frequencies. The ASM3P2474A reduces electromagnetic interference (EMI) at the clock source, Key Specifications Description Specification Supply voltages VDD = 3.3V ± 0.3V dependent signals. The ASM3P2474A allows significant Cycle-to-Cycle Jitter 200pS (Typ) system cost savings by reducing the number of circuit Output Duty Cycle 45/55% (worst case) board layers, ferrite beads and shielding that are Modulation Rate Equation FIN/640 traditionally required to pass EMI regulations. Frequency Deviation allowing system wide reduction of EMI of Block Diagram all clock FSEL=0 -1.5% (Typ) @ 50MHz FSEL=1 -1.5% (Typ) @ 25MHz FSEL VDD PLL Modulation XIN/CLKIN XOUT Crystal Oscillator Frequency Divider Feedback Divider Phase Detector Loop Filter VCO Output Divider VSS Alliance Semiconductor 2575 Augustine Drive • Santa Clara, CA • Tel: 408.855.4900 • Fax: 408.855.4999 • www.alsc.com Notice: The information in this document is subject to change without notice. ModOUT ASM3P2474A October 2005 rev 1.0 Pin Configuration (6-pin TSOT- 23 Package) FSEL 1 XOUT 2 6 VSS ASM3P2474A XIN / CLKIN 3 5 ModOUT 4 VDD Pin Description Pin# Pin Name Type Description 1 FSEL I Selection Pin for 1X and 2X Output Frequency Options. Please refer the table “Frequency Selection Options” for further details 2 XOUT O Crystal connection. If using an external reference, this pin must be left unconnected. 3 XIN / CLKIN I Crystal connection or external reference frequency input. This pin has dual functions. It can be connected either to an external crystal or an external reference clock. 4 VDD P Power supply for the entire chip. 5 ModOUT O Spread spectrum clock output. 6 VSS P Ground connection. Pin Configuration (8-pin SOIC and TSSOP Packages) XIN / CLKIN 1 8 VDD XOUT 2 7 NC FSEL 3 6 ModOUT 4 5 VSS NC ASM3P2474A Pin Description Pin# Pin Name Type Description 1 XIN/CLKIN I Crystal connection or external reference frequency input. This pin has dual functions. It can be connected either to an external crystal or an external reference clock. 2 XOUT O Crystal connection. If using an external reference, this pin must be left unconnected. 3 FSEL I Selection Pin for 1X and 2X Output Frequency Options. Please refer the table “Frequency Selection Options” for further details 4 NC - No connect. 5 VSS P Ground connection. 6 ModOUT O Spread spectrum clock output. 7 NC - No connect. 8 VDD P Power supply for the entire chip. Low Power Peak EMI Reducing Solution Notice: The information in this document is subject to change without notice. 2 of 10 ASM3P2474A October 2005 rev 1.0 Modulation Profile Specifications Description Specification Frequency Range 13MHz < CLKIN < 30MHz Modulation Equation FIN/640 Frequency Deviation FSEL=0 -1.5% (Typ) @ 50MHz FSEL=1 -1.5% (Typ) @ 25MHz Frequency Selection Options FSEL Pin Input Frequency (MHz) Output Frequency (MHz) 0 13-30 26-60 1 13-30 13-30 Absolute Maximum Ratings Symbol Parameter VDD, VIN TSTG Rating Unit Voltage on any pin with respect to Ground -0.5 to +7.0 V Storage temperature -65 to +125 °C TA Operating temperature 0 to 70 °C Ts Max. Soldering Temperature (10 sec) 260 °C TJ Junction Temperature 150 °C 2 KV TDV Static Discharge Voltage (As per JEDEC STD22- A114-B) Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. Low Power Peak EMI Reducing Solution Notice: The information in this document is subject to change without notice. 3 of 10 ASM3P2474A October 2005 rev 1.0 DC Electrical Characteristics (Test condition: All parameters are measured at room temperature (+25°C) unless otherwise stated) Symbol Min Typ Max Unit VIL Input low voltage VSS - 0.3 - 0.8 V VIH Input high voltage 2.0 - VDD + 0.3 V IIL Input low current - - -35 µA IIH Parameter Input high current - - 35 µA IXOL XOUT output low current (@0.4V, VDD=3.3V) - 3 - mA IXOH XOUT output high current (@2.5V, VDD=3.3V) - 3 - mA VOL Output low voltage (VDD = 3.3V, IOL = 8mA) - - 0.4 V VOH Output high voltage (VDD = 3.3V, IOH = 8mA) 2.5 - - V IDD Static supply current* Dynamic supply current (3.3V, 25MHz and no load and FSEL=1) Operating voltage - 1.6 - mA - 4.0 - mA 3.0 3.3 3.6 V ICC VDD tON ZOUT Power-up time (first locked cycle after power-up) - - 5 mS Output impedance - 45 - Ω * XIN /CLKIN pin is pulled low AC Electrical Characteristics Symbol CLKIN Parameter Input frequency FSEL=0 FSEL=1 Output Frequency = Output Frequency = Output Frequency = Output Frequency = Min Typ Max Unit 13 26 13 - -1.8 -0.9 -1.8 -0.9 30 60 30 - MHz 0.85 1.1 nS ModOUT Output frequency fd Frequency Deviation fd Frequency Deviation tLH* Output rise time (measured from 0.8 to 2.0V) 0.4 tHL * Output fall time (measured at 2.0V to 0.8V) 0.3 0.7 0.9 nS tJC Jitter (cycle to cycle) - 200 - pS tD Output duty cycle 45 50 55 % 13MHz 30MHz 26MHz 60MHz MHz % % *tLH and tHL are measured into a capacitive load of 15pF Low Power Peak EMI Reducing Solution Notice: The information in this document is subject to change without notice. 4 of 10 ASM3P2474A October 2005 rev 1.0 Typical Crystal Oscillator Circuit Crystal R1 = 510Ω C1 = 27 pF C2 = 27 pF Typical Crystal Specifications Fundamental AT cut parallel resonant crystal Nominal frequency 25MHz Frequency tolerance ± 50 ppm or better at 25°C Operating temperature range -25°C to +85°C Storage temperature -40°C to +85°C Load capacitance 18pF Shunt capacitance 7pF maximum ESR 25 Ω Low Power Peak EMI Reducing Solution Notice: The information in this document is subject to change without notice. 5 of 10 ASM3P2474A October 2005 rev 1.0 Package Information 6-pin TSOT-23 Package Dimensions Symbol Inches Min A Max Millimeters Min Max 0.04 1.00 A1 0.00 0.004 0.00 0.10 A2 0.033 0.036 0.84 0.90 b 0.012 0.02 0.30 0.50 H 0.005 BSC 0.127 BSC D 0.114 BSC 2.90 BSC B 0.06 BSC 1.60 BSC e 0.0374 BSC 0.950 BSC C 0.11 BSC 2.80 BSC L 0.0118 0.02 0.30 0.50 θ 0° 4° 0° 4° Low Power Peak EMI Reducing Solution Notice: The information in this document is subject to change without notice. 6 of 10 ASM3P2474A October 2005 rev 1.0 8-Pin SOIC Package H E D A2 A C A1 D θ e L B Dimensions Symbol Inches Min Max Millimeters Min Max A1 0.004 0.010 0.10 0.25 A 0.053 0.069 1.35 1.75 A2 0.049 0.059 1.25 1.50 B 0.012 0.020 0.31 0.51 C 0.007 0.010 0.18 0.25 D 0.193 BSC 4.90 BSC E 0.154 BSC 3.91 BSC e 0.050 BSC 1.27 BSC H 0.236 BSC 6.00 BSC L 0.016 0.050 0.41 1.27 θ 0° 8° 0° 8° Low Power Peak EMI Reducing Solution Notice: The information in this document is subject to change without notice. 7 of 10 ASM3P2474A October 2005 rev 1.0 8-Pin TSSOP Package H E D A2 A C θ e A1 L B Dimensions Symbol Inches Min Millimeters Max A Min Max 0.043 1.10 A1 0.002 0.006 0.05 0.15 A2 0.033 0.037 0.85 0.95 B 0.008 0.012 0.19 0.30 c 0.004 0.008 0.09 0.20 D 0.114 0.122 2.90 3.10 E 0.169 0.177 4.30 4.50 e 0.026 BSC 0.65 BSC H 0.252 BSC 6.40 BSC L 0.020 0.028 0.50 0.70 θ 0° 8° 0° 8° Low Power Peak EMI Reducing Solution Notice: The information in this document is subject to change without notice. 8 of 10 ASM3P2474A October 2005 rev 1.0 Ordering Information Part Number Marking Package Type Temperature ASM3P2474AF-06OR W4LL 6-Pin TSOT-23, TAPE & REEL, Pb Free Commercial ASM3P2474AF-08TT 3P2474AF 8-Pin TSSOP, TUBE, Pb Free Commercial ASM3P2474AF-08TR 3P2474AF 8-Pin TSSOP, TAPE & REEL, Pb Free Commercial ASM3P2474AF-08ST 3P2474AF 8-Pin SOIC, TUBE, Pb Free Commercial ASM3P2474AF-08SR 3P2474AF 8-Pin SOIC, TAPE & REEL, Pb Free Commercial ASM3P2474AG-06OR W3LL 6-Pin TSOT-23, TAPE & REEL, Green Commercial ASM3P2474AG-08TT 3P2474AG 8-Pin TSSOP, TUBE, Green Commercial ASM3P2474AG-08TR 3P2474AG 8-Pin TSSOP, TAPE & REEL, Green Commercial ASM3P2474AG-08ST 3P2474AG 8-Pin SOIC, TUBE, Green Commercial ASM3P2474AG-08SR 3P2474AG 8-Pin SOIC, TAPE & REEL, Green Commercial Device Ordering Information A S M 3 P 2 4 7 4 A F - 0 8 T R R = Tape & reel, T = Tube or Tray O = SOT S = SOIC T = TSSOP A = SSOP V = TVSOP B = BGA Q = QFN U = MSOP E = TQFP L = LQFP U = MSOP P = PDIP D = QSOP X = SC-70 DEVICE PIN COUNT F = LEAD FREE AND RoHS COMPLIANT PART G = GREEN PACKAGE PART NUMBER X= Automotive I= Industrial P or n/c = Commercial (-40C to +125C) (-40C to +85C) (0C to +70C) 1 = Reserved 2 = Non PLL based 3 = EMI Reduction 4 = DDR support products 5 = STD Zero Delay Buffer 6 = Power Management 7 = Power Management 8 = Power Management 9 = Hi Performance 0 = Reserved ALLIANCE SEMICONDUCTOR MIXED SIGNAL PRODUCT Licensed under U.S Patent Nos 5,488,627 and 5,631,921 Low Power Peak EMI Reducing Solution Notice: The information in this document is subject to change without notice. 9 of 10 ASM3P2474A October 2005 rev 1.0 Alliance Semiconductor Corporation 2575 Augustine Drive, Santa Clara, CA 95054 Tel# 408-855-4900 Fax: 408-855-4999 www.alsc.com Copyright © Alliance Semiconductor All Rights Reserved Preliminary Information Part Number: ASM3P2474A Document Version: v1.0 Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to Alliance Semiconductor, dated 11-11-2003 © Copyright 2003 Alliance Semiconductor Corporation. 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Alliance does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of Alliance products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use. Low Power Peak EMI Reducing Solution Notice: The information in this document is subject to change without notice. 10 of 10