APLUS APE1004

A
PLUS MAKE YOUR PRODUCTION A-PLUS
APExx04 Series
DATA SHEET
APLUS
INTEGRATED CIRCUITS INC.
Address:
3 F-10, No. 32, Sec. 1, Chenggung Rd., Taipei,
Taiwan 115, R.O.C.
(115)台北市南港區成功路㆒段 32 號 3 樓之 10.
Sales E-mail:
sales@aplusinc.com.tw
TEL: 886-2-2782-9266
Technology E-mail:
service@aplusinc.com.tw
FAX: 886-2-2782-9255
WEBSITE : http: //www.aplusinc.com.tw
APExx04 Series
1.0 General Description
The APExx04 series are very low cost voice and melody synthesizer with 4-bits CPU. They have various
features including 4-bits ALU, ROM, RAM, I/O ports, timers, clock generator, voice and melody
synthesizer, and PWM (Direct drive) output, etc. The audio synthesizer contains one voice-channel and
two melody-channels. Furthermore, they consist of 27 instructions in these devices. With CMOS
technology and halt function can minimize power dissipation. Their architectures are similar to RISC, with
two stages of instruction pipeline. They allow all instructions to be executed in a single cycle, except for
program branches and data table read instructions (which need two instruction cycles).
2.0 Features
(1) Single power supply can operate from 2.4V to 5.5V at 4MHz or 8MHz.
(2) Program ROM: 8k x 10 bits
(3) 1 set of 15-bits DPR can access up to 32k x 10 bits melody data memory space, and 1 set of 15-bits
VPR can access up to 32k x 10 bits voice data memory space.
Product
Voice Duration (sec) Voice Pointer (VPR) ROM Size (10-bit)
APE0504
5
14-bits
16k
APE1004
10
15-bits
32k
(4) Data Registers:
a). 96 x 4-bits data RAM (00-5Fh)
b). Unbanked special function registers (SFR) range: 00h-2Fh
(5) I/O Ports:
a). PRA: 4-bits I/O Port A (10h) can be programmed to input/output individually. (Register control)
(6) On-chip clock generator: Resistive Clock Drive (RM)
(7) Timer: 1-set Voice Interrupt (Timer0: a 9-bits auto-reload timer/counter).
(8) Stack: 2-level subroutine nesting.
(9) Built-in 4 Level Volume Control can be programmed.
(10) Built-in IR Carry Output: Port A[1] can be configured as IR pin by 38k / 56kHz. (Mask option)
(11) External Reset: Port A[3] can be configured as reset pin. (Mask opton)
(12) HALT and Release from HALT function to reduce power consumption
(13) Watch Dog Timer (WDT)
(14) Instruction: 1-cycle instruction except for table read and program branches which are 2-cycles
(15) Number of instruction: 27
(16) DAC: 1 channel voice and dual tone melody synthesizer (One 8-bits PWM output).
1
Rev 1.3
2003/8/18
APExx04 Series
FIGURE 1 :
ROM Map of APExx04 Series
PC[12:0]
13-bit x 2 STACK
15-bit Data Pointer
15-bit Voice Pointer
Reset Vector
00000h
000FEh
000FFh-00400h
00401h
Reserved for Testing
00000h-01FFFh
Program ROM
00000h-07FFFh
Data ROM for Voice & Melody
2
Rev 1.3
2003/8/18
APExx04 Series
3.0 Pin Description
Pad Name
PWM2
Pin Attr.
PWM1
Vdd1~2
O
Power
PRA0, PRA2
I/O
I/O port can be programmed to input/output individually.
Input type with weak pull-low or fix-input-floating capability.
Buffer Output type.
I/O
I/O port can be programmed to input/output individually.
Input type with weak pull-low or fix-input-floating capability.
Buffer Output type.
Mask option selected as an IR Carrier Output with 38k / 56kHz
PRA3 / Reset
I/O
I/O port can be programmed to input/output individually.
Input type with weak pull-low or fix-input-floating capability.
Buffer Output type.
Mask option selected as an external RESET pin with weak pull-low
capability.
OSC
GND1~2
I
Power
O
PRA1 / IR
Description
PWM2 output.
PWM1 output.
Power supply during operation.
RM mode Oscillator input
Ground Potential
4.0 DC Characteristics
Symbol
Vdd
Isb
Iop
Parameter
Operating voltage
Supply
current
Standby
Operating
Iih
Input current
(Internal pull low)
Ioh
Output-high current
Vdd
Min.
2.4
3
4.5
3
4.5
3
4.5
3
4.5
3
4.5
3
4.5
Typ.
3
Max.
5.5
1
1
2
7
4
10
-4
-10
8.5
17.5
0.8 ~ 4.8
0.9 ~ 6.5
Unit
V
uA
Condition
depending on Freq.
4MHz, RM,
in HALT Mode
mA
4MHz, RM,
IO Floating
uA
Input ports with weak
pull-low
mA
4MHz, RM
(IO ports)
mA
4MHz, RM
(Full scale)
Iol
Output-low current
Cout
DAC output current
(8-level option)
dF/F
Frequency stability
-5
5
%
Fosc(3v- 2.4v)
Fosc (3v)
dF/F
Fosc lot variation
-10
10
%
Vdd=3V, Rosc=430k,
4MHz
3
Rev 1.3
2003/8/18
APExx04 Series
FIGURE 2 : Frequency vs. Rosc (at 3V)
Resistor (Rosc ohms)
110k
200k
300k
430k
Frequency (MHz)
14.84
8.25
5.54
3.92
R o sc vs F re q.
Freq. (MHz)
20
1 4 .8 4
15
10
8 .25
5 .54
5
3 .92
0
0
100
200
300
400
500
R os c (k o h m )
5.0 Application Circuit
xxxx
4
Rev 1.3
2003/8/18
APExx04 Series
6.0 Bonding Diagram
ROM
Pad Size: 80 um x 80 um
Y
* The IC substrate must be connected to GND.
1
PRA3
11
GND2
10
PWM2/Cout
Vdd1
PWM1
GND1
2
3
4
Vdd2
OSC
5
6
PRA0
PRA1
PRA2
8
9
7
(0, 0)
X
Pad #
Pad Name
X
Y
Pad #
Pad Name
1
PWM2
57
2
Vdd1
3
253
7
PRA0
785
87
58
58
8
PRA1
895
87
PWM1
253
57
9
PRA2
1005
87
GND2
995
231
PRA3
995
341
4
GND1
404
58
10
5
Vdd2
565
87
11
6
OSC
675
87
X
Y
Chip Size :
APE0504 : 1166 um x 1094 um
APE1004 : 1166 um x 1206 um
5
Rev 1.3
2003/8/18