AUK SD42C440436SSOP

SD42C/P4404
Semiconductor
4Bit Single Chip Microcontroller
Description
The SD42C4404(4302) is a 4-bit single chip micro-computer having 4K(2K) bytes ROM and
is designed with CMOS silicon gate technology. The SD42C4404 includes such peripherals
as various timers, A/D converter, serial communication interface, on-chip oscillator and
clock circuitry. The high performance CPU and internal peripherals allow flexible & cost
effective system design in industrial and home appliances. And the OTP device (42P4404)
can shorten system development periods and help the process for software debugging.
Ordering Information
Type NO.
Marking
SD42C4404
SD42C4404
Package Code.
28SOP/30SDIP/36SSOP
Pin Configuration
P12 / SO
1
28
P13 /SCK
P11 / SI
2
27
VDD
P00 / INT0 / TI0
3
26
P13 / BUZ
P01 / INT1
4
25
P42 / KS2
PA0 / AD0
5
24
P41 / KS1
PA1 / AD1
6
23
P40 / KS0
P60
7
22
P53 / KS7
P61
8
21
P52 / KS6
P62/CLO
RESETB
9
10
28SOP
P10 / SCK
19
11
19
29
P13 / BUZ
P11 / SI
3
28
P42 / KS2
P00 / INT0 / TI0
4
27
P41 / KS1
P01 / INT1
5
26
P40 / KS0
PA0 / AD0
12
18
13
XO 14
16
15
7
8
PA3 / AD3
9
25
24
30SDIP
P53 / KS7
P52 / KS6
23
P51 / KS5
22
P50 / KS4
P51 / KS5
P50 / KS4
10
11
VDD
P12 / SO
2
35
P13 / BUZ
P11 / SI
3
34
P42 / KS2
P00 / INT0 /TI0
4
33
P41 / KS1
P01 / INT1
5
32
NC
NC
6
31
P40 / KS0
PA0 / AD0
7
30
NC
PA1 / AD1
8
29
P53 / KS7
28
P52 / KS6
PA2 / AD2
PA3 / AD3
10
27
P51 / KS5
P60
11
26
P50 / KS4
P61
12
25
P83
P62 / CLO
13
24
P82
23
P81
19
P81
NC
14
NC
15
22
P80
RESETB
16
21
NC
17
20
XO
18
19
XI
13
18
P80
TEST
14
17
XO
TEST
15
16
KSI-W031-000
36SSOP
20
RESETB
VSS
9
P82
P81
P80
36
P83
P82
12
1
P10 / SCK
21
P83
P62 / CLO
XI
6
PA2 / AD2
P61
Vss
VDD
2
P60
TEST
30
P12 / SO
PA1 / AD1
20
1
XI
VS S
1
SD42C/P4404
Features
Memory mapped I/O
8-bit serial communication interface
- External / Internal clock selection
- Mode : Transmit, Receive
Receive only
Clock continuous
Program memory : 4096 x 10bits (DMC42C4404)
2048 x 10bits (DMC42C4302)
Data memory
: 512 x 4bits (DMC42C4404)
256 x 4bits (DMC42C4302)
8-bit A/D converter
- 8-bit successive approximate type
- 4 channels
- Sample and hold
- Conversion time : 17.1us at 4.19MHz
Instructions
- Various bit manipulation
- 8-bit data operation
- 7-bit relative branch
- 1 byte absolute call
24 I/O Pins
- CMOS Pins : 16
- High current LED direct drive pins
- Internal pull-up resistor ( Mask option )
- Internal pull-down resistor ( Mask option )
Instruction cycle times ( XI = 4.19MHz )
- 15.3 us ( XI/64 = 65.5KHz )
- 1.91 us ( XI/8 = 524.0KHz )
- 0.95 us ( XI/4 = 1.05MHz )
Power saving mode
- STOP : Main clock, CPU clock stop
- STBY : Only CPU clock stop
Main clock operation
4 Register Bank
General register : 8 x 4-bit respectively
Accumulator
- Bit Accumulator (CY), 4 bit Accumulator (A),
8 bit Accumulator (XA)
Operating voltage range
- V DD = 2.5 ~ 5V ± 10%
Operating temperature range
- TA = -40℃ to +85℃
Multiple vectored interrupt source
- External interrupt : 3
- Internal interrupt : 4
Watch timer (at 4.19MHz)
- fast mode : 3.91 msec
- normal mode : 0.5 sec
- buzzer output : 1, 2, 4 KHz
APPLICATION
Basic interval timer
- 8 kinds of period
- Used stabilization wait timer to wake up Stop mode
Telephone, General
One 8-bit timer / event counter
Key scan
- 7 channels
KSI-W031-000
2
SD42C/P4404
BLOCK DIAGRAM
BASIC
INTERVAL
TIMER
IRQBT
BUZ / P13
WATCH
TIMER
SD42CORE
IRQWT
TI0 / P00
PORT0
P00 ~ P01
PORT1
P10 ~ P13
PORT4
P40 ~ P42
PORT5
P50 ~ P53
PORT6
P60 ~ P62
PORT8
P80 ~ P83
PORTA
PA0 ~ PA3
TIMER/EVENT
COUNTER 1
IRQTC 0
SCK / P10
SI / P11
SO / P12
SERIAL
INTERFACE
PROGRAM MEMORY
DATA MEMORY
(4096 X 10BITS)
(512 X 4BITS)
IRQS0
INTERRUPT
CONTROL
n
CPU
CLOCK
Fx / 2
8-BIT ADC
CLOCK
OUTPUT
CONTROL
CLOCK
DIVIDER
CLOCK
GENERATOR
STOP/ IDLE
CONTROL
KSI-W031-000
RESETB
XO
XI
P62 / CLO
V SS
IRQAD
V DD
PA0~PA3/
AD0-AD3
TEST
INT0 / P00
INT1 / P01
3
SD42C/P4404
Program Memory (ROM)
Vector Address
CONTENTS
VECTOR
ADDRESS AREA
0000H
0000H
0002H
001FH
Prioty
0
1
2
3
IRQ0
IRQ1
External interrupt 0
5
IRQTC1
Timer Event Counter 1
0012H
9
IRQS0
Serial I/O 0
0014H
10
IRQAD
8 bit ADC
12
13
IRQWT
IRQKS
Watch Timer
15
-
reserved
0004H
0020H
INTERRUPT SUORCE
Reset Signal
RESET
Basic Interval Timer
IRQBT
ZERO-PAGE
0006H
CALL AREA
0008H
005FH
000AH
0060H
000CH
External interrupt 1
000EH
0010H
4K Byte
0016H
0018H
001AH
Key Scan
001CH
0FFFH
001EH
Data Memory (RAM)
DIRECT
m
INDIRECT
@HL
@DE @DL
$00
PAGE0
(256 Byte)
$FF
$00
PAGE1
(256 Byte)
MB=0
MB=0
STACK
MP=0
SPS=0
MP=1
SPS=1
MP=2
SPS=2
GENERAL
REGISTER
RB=0
RB=1
RB=2
RB=4
BANK 0 $FF
$00
(1K)
PAGE2
(256 Byte)
$FF
$00
PAGE3
(256 Byte)
I/O
MEMORY
MP=3
; Usable
$FF
KSI-W031-000
4
SD42C/P4404
I/O Address Map
ADDRESS
Hardware Module Name
b3
b2
R/W
b1
b0
Addressing Unit
1 bit
4 bit
REMARKS
8bit
INITIAL
VALUE
318H
Stack pointer low (SPL)
R/W
O
Stack pointer low
E
319H
Stack pointer high (SPH)
R/W
O
stack pointer high
F
31AH
SP3
SP2
SP1
SP0
R/W
O
Stack Page Select Low (SPSL)
0
31BH
-
-
SP5
SP4
R/W
O
Stack Page Select High (SPSh)
0
31CH
AC
IS1
IS0
R/W
O
Psw low (PSWL)
0
31DH
CY
OV
T
Z
326H
T/E counter mode register 1
W
327H
(TMOD1)
328H
T/E counter register 1
329H
(TMCNT1)
32AH
T/E reference register 1
32BH
(TMREF1)
332H
Basic Timer mode register(BMOD)
334H
Basic interval timer count
335H
register(BITCNT)
336H
Watch timer mode register
337H
(WMOD)
386H
Adc8 mode register (ADCM8)
O
O
326H.3
0
clock source select. counter start
00
(ch1)
R
readable count value (ch1)
00
W
count reference register (ch1)
FF
R/W
332H.3
R
R/W
336H.3
clock select, Bit start
0
readable count register
00
clock/buzzer select. bit3
00
readable
R/W
386H.3
O
387H
388H
Psw high (PSWH)
analog input pin select. start &
00
low 4bit readable
Adc8 output latch (ADCOL8)
R
O
8bit conversion data
00
system clock select, idle, stop
00
389H
3A0H
Power control register
O
(PCON)
R/W
3A2H
Operating mode register (SCMOD)
R/W
3A4H
Clock output mode register
mode
O
W
O
(CLOMD)
Serial interface mode register0
3A9H
(SIOM0)
3AAH
Serial interface buffer0
3ABH
(SBUFF0)
3B2H
Power on flag (PONF)
3C3H
IPSR3
3C4H
External interrupt mode register0
W
O
3A8H.3
IPSR2
IPSR1
R/W
receive/transmit mode. clock
00
P/W
O
3B2H.0
serial shift register 0
XX
power on reset flag
0
external interrupt 0 edge
00
IPSR0
W
O
detection
External interrupt mode register1
W
O
(IMOD1)
external interrupt 1 edge
00
detection
3D8H
IEAD8
00
select
(IMOD0)
3D9H
0
cpu clock output select, clock
out EN/DIS
3A8H
3C5H
main/sub system clock select
IRQAD8
3DAH
3DBH
IETC1
IRQTC1
3DCH
IE1
IRQ1
IEBT
IRQBT
R/W
O
O
Interrupt EN/IRQ flag
0
IEWT
IRQWT
R/W
O
O
Interrupt EN/IRQ flag
0
IES0
IRQS0
R/W
O
O
Interrupt EN/IRQ flag
0
R/W
O
O
Interrupt EN/IRQ flag
0
R/W
O
O
Interrupt EN/IRQ flag
0
IE0
IRQ0
KSI-W031-000
5
SD42C/P4404
ADDRESS
Hardware Module Name
b3
3DDH
IETC2
b2
b1
R/W
b0
IRQTC2
3DEH
Addressing Unit
REMARKS
4 bit
R/W
O
O
Interrupt EN/IRQ flag
0
R/W
O
O
Interrupt EN/IRQ flag
0
3E0H
PW03
PW02
PW01
PW00
3E1H
PW13
PW12
PW11
PW10
3E4H
PW43
PW42
PW41
PW40
3E5H
PW53
PW52
PW51
PW50
3E6H
PW63
PW62
PW61
PW60
3E7H
PW73
PW72
PW71
PW70
3E8H
PW83
PW82
PW81
PW80
3E9H
PW93
PW92
PW91
PW90
3EAH
PWA3
PWA2
PWA1
PWA0
3EBH
PWB3
PWB2
PWB1
PWB0
3F0H
PORT0 (R0)
R/W
O
3F1H
PORT1 (R1)
R/W
O
3F4H
PORT4 (R4)
R/W
O
O
3F5H
PORT5 (R5)
R/W
O
3F6H
PORT6 (R6)
R/W
3F8H
PORT8 (R8)
R/W
3FAH
PORTA (RA)
R/W
8bit
INITIAL
1 bit
VALUE
W
O
port 0, 1 mode register (PMGA)
00
W
O
port 4, 5 mode register (PMGC)
00
W
O
port 6, 7 mode register (PMGD)
00
W
O
port 8, 9 mode register (PMGE)
00
W
O
port a, b mode register (PMGF)
00
O
R0 Port Data Register
0
O
R1 Port Data Register
0
R4 Port Data Register
0
O
R5 Port Data Register
0
O
O
R6 Port Data Register
0
O
O
R8 Port Data Register
0
O
O
RA Port Data Register
0
O
KSI-W031-000
6
SD42C/P4404
Pin Description
PIN
SHARED
SYMBOL
P00
PIN
I/O
FUNCTION
RESET
INT0/TI0
P01
P10
INT1
SCK
I/O
PORT 0
P11
SI
I/O
4-BIT I/O PORT
P12
P13
SO
BUZ
PORT 1
P4
P5
-
4-BIT I/O PORT. PORT4
4-BIT I/O PORT. PORT5
BPS
BD
P6
P8
-
4-BIT I/O PORT. PORT6
4-BIT I/O PORT. PORT8
BP
BD
PA
INT0/TI0
AD0~AD3
4-BIT I/O PORT. PORTA
External interrupt input port
INT1
P01
TYPE
BPS
4-BIT I/O PORT
P00
I
rising/falling edge detection
PORT
BPS
BPS
INPUT
BPS
Event pulse input port for the
timer/event counters
SCK
SI
P10
P11
I/O
I
Serial clock in/out port
Serial data input port
SO
BUZ
P12
P13
O
O
Serial data output port
Buzzer output port
Key Scan
P4-P5
I
AD0~AD3
PA
I
XI
RESETB
TEST
-
VDD , VSS
-
Key scan input
BP
I
Analog input for the 8-bit A/D converter
XI, XO are the input and output,
OSC1
O
respectively, of an inverting amplifier.
The pins can be configured for use as an
XO
BPS
I
I
on-chip oscillator.
Reset input pin
Normally connect to VSS
IP1
IP2
Power & ground
KSI-W031-000
7
SD42C/P4404
I/O Circuits
BP
BPS
V DD
VDD
OUTPUT
ENABLE
VDD V DD
PUR
(M.O)
DATA
PAD
OUTPUT
ENABLE
PUR
(M.O)
DATA
PAD
V SS
V SS
INTERNAL
INTERNAL
BD
OSC1
V DD
PUR
(M.O)
PAD
DATA
XI
OUTPUT
ENABLE
XO
V SS
INTERNAL
V SS
IP1
IP2
VDD
PAD
PAD
V SS
NOTE)
PUR : Pull-Up Resistor
M.O : Mask Option
KSI-W031-000
8
SD42C/P4404
Absolute Maximum Ratings
(TA = 0℃ to 70℃, VDD = 5V ±10%, fX = 4.19MHz)
PARAMETER
SYMBOL
CONDITION
RATING
UNIT
V DD
-
-0.3 to +7.0
V
Input Voltage
VI
All I/O ports
-0.3 to VDD+0.3
V
Output Voltage
VO
-
-0.3 to VDD+0.3
V
Output Current High
IOH
One I/O port active
-15
mA
All I/O ports active
-30
Supply Voltage
Output Current Low
One I/O port active
Peak Value
+30
-
RMS Value
+15
Total value for ports
Peak Value
+100
P0, P1, P4, P5, P6, P8, PA
RMS Value
+60
mA
IOL
Operating Temperature
TA
-
-40 to +85
℃
Storage Temperature
Tstg
-
-55 to +125
℃
* RMS values are calculated as peak value x
Duty
* Exceeding beyond those listed values under "Absolute Maximum Ratings" may cause permanent
damage to the device.
KSI-W031-000
9
SD42C/P4404
DC Electrical Characteristics
(VSS = 0, V DD = 5V ±10%, TA = 25℃, f X = 4.19MHz)
PARAMETER
SYMBOL
TEST
LIMIT
UNIT
CONDITION
MIN.
TYP.
MAX.
High Level
V IH1
Port 0,1 (Schmitt Input)
0.8 V DD
-
V DD
Input Voltage
V IH2
XI
V DD - 0.5
-
V DD
V IH3
Port 4,5,6,8,A
RESETB, TEST
0.7 V DD
-
V DD
Low Level
V IL1
Port 0,1 (Schmitt Input)
0
-
0.2 V DD
Input Voltage
V IL2
XI
0
-
0.4
V IL3
Port 4,5,6,8,A
RESETB, TEST
0
-
0.3 V DD
Port 0,1,6,A
(IOH = - 5mA)
4.2
4.5
-
Output Voltage
Port 0,1,6,A
(IOH = - 100uA)
4.6
4.9
-
Low Level
Port 4, 5 (Open-Drain)
(IOL = 10mA)
-
-
2
Port 0,1,6,A
(IOL = 10mA)
-
0.4
0.6
Port 0,1,6,A
(IOL = 1mA)
-
0.1
0.3
-
1.2
3
High Level
Output Voltage
V OL
Port 0,1,4,5,6,8,A
IIH
V PPOEX, RESETB
Low Level
-
5
15
Port 0,1,4,5,6,8,A
-
-1.2
-3
IIL
VPPOEX, TEST
XI
Current
Supply Current
V
Dynamic
IDD1
Main Clock (XI)
= 4.19MHz
V DD = 5V ±10%
uA
-
-5
-15
-
-
10
Mode
Idle
V
uA
XI
Current
Input Leakage
V
V OH
High Level
Input Leakage
V
mA
-
-
5
Mode
KSI-W031-000
10
SD42C/P4404
DC Electrical Characteristics
(V SS = 0, V DD = 5V ±10%, TA = 25℃, fX = 4.19MHz)
PARAMETER
SYMBOL
TEST
LIMIT
CONDITION
Supply Current
IDD5
Pull-up
Resistor
Pull-down
Resistor
Main Clock (XI)
= 2MHz
Dynamic
Mode
Idle
Mode
Main Clock (XI)
= 4.19MHz
Stop
Mode
IDD2
RL1
RL2
UNIT
MIN.
TYP.
MAX.
-
-
2
-
-
1
V DD = 5V ±10%
-
1
5
V DD = 3V ±10%
-
0.5
3
20
-
60
10
-
30
VDD = 3V ±10%
mA
uA
VI = 0V, VDD = 5V ±10%
RESETB
VI = 0V, VDD = 5V ±10%
TEST
KSI-W031-000
Kohm
11
SD42C/P4404
AC Electrical Characteristics
(TA = -40 to +85 ℃, VDD = 2.7 to 6.0V)
PARAMETER
Cycle Time
SYMBOL
TEST CONDITION
MIN.
TYP.
MAX.
UNIT
V DD =
4.5 to 6.0V
0.95
-
64
uS
V DD =
2.7 to 3.3V
3.8
-
64
uS
V DD = 4.5 to 6.0V
0
-
1
MHz
V DD = 2.7 to 3.3V
0
-
275
KHz
V DD = 4.5 to 6.0V
0.48
-
-
uS
V DD = 2.7 to 3.3V
1.8
-
-
uS
INT0
(1)
-
-
uS
INT1
10
-
-
uS
KS0 to 7
10
-
-
uS
Input
800
-
-
nS
Output
1600
-
-
nS
Input
3200
-
-
nS
Output
3800
-
-
nS
tCY
Main system
clock
TI0 Input Frequency
TI0 Input High, Low
Level Width
fTI
tTIH
tTIL
Interrupt Input High,
Low Level Width
SCK Cycle Time
tINTH
tINTL
tKCY
V DD = 4.5 to 6.0V
V DD = 2.7 to 3.3V
SCK High, Low
Level Width
SI Set up Time to
tKH
V DD = 4.5 to 6.0V
tKL
V DD = 2.7 to 3.3V
tSIK
SCK High
SI Hold Time to
tKSI
SCK High
SCK to S0 Output
tKSO
V DD = 4.5 to 6.0V
Delay Time
V DD = 2.7 to 3.3V
RESETB Low Level
Input
400
-
-
nS
Output
tKCY/2~50
-
-
nS
Input
1600
-
-
nS
Output
tKCY/2~150
-
-
nS
Input
100
-
-
nS
Output
150
-
-
nS
Input
400
-
-
nS
Output
400
-
-
nS
Input
-
-
300
nS
Output
-
-
250
nS
Input
-
-
1000
nS
Output
-
-
1000
nS
10
-
-
uS
tRSL
(1) 2tcy or 128/fX, depending on the setting of the interrupt mode register.
KSI-W031-000
12
SD42C/P4404
AC Timing Measurement Points (Except XI)
0.8V DD
Measurement
Points
0.2V DD
0.8V DD
0.2V DD
1/XI
Clock Timing
tXH
tXL
XI
VDD-0.5V
0.4V
Timer Event Counter Timing
1/fTI
t TIL
t TIH
TI0
0.8V DD
0.2V DD
Serial Transfer Timing
t KCY
t KL
tKH
SCK
0.8V DD
0.2V DD
tSIK
SI
t KSO
tKSI
0.8V DD
Input Data
0.2V DD
Output Data
SO
Interrupt Input Timing
tINTL
INT0~1
KS0~7
tINTH
0.8V DD
0.2V DD
RESETB Input Timing
RESETB
t RSL
0.2V DD
KSI-W031-000
13
SD42C/P4404
RAM Data Retention Characteristics ( in STOP Mode )
(TA = -40 to +85℃)
PARAMETER
SYMBOL
Data Retention
Supply Voltage
V DDDR
Data Retention
Supply Current
IDDDR
Release Signal Set
Time
tSREL
Oscillation
Stabilization
Wait Time
tWAIT
TEST CONDITION
MIN.
TYP.
MAX.
UNIT
2.0
-
6.0
V
-
0.1
10
uA
0
-
-
uS
When released by RESETB
-
217/fx
-
mS
When released by interrupt
Signal
-
NOTE 1)
-
mS
VDDDR = 2.0V
NOTE 1) Depends on the setting of the basic interval timer mode register.
(refer to the table below)
( fX = 4.19MHz )
BMOD2
BMOD1
BMOD0
Oscillation Stabilization
0
0
0
220/fX (Approximately 250ms)
0
1
1
217/fX (Approximately 31.3ms)
1
0
0
215/fX (Approximately 7.82ms)
1
0
1
213/fX (Approximately 1.95ms)
KSI-W031-000
14
SD42C/P4404
RAM Data Retention Timing
When STOP mode is released by RESETB input
Internal Reset Operation
Stabilization Wait Time
Operation
Mode
STOP Mode
RAM Data retention
V DD
V DDDR
STOP instruction execution
t SREL
RESETB
tWAIT
When STOP mode is released by interrupt signal
Stabilization Wait Time
Operation
Mode
STOP Mode
RAM Data retention
V DD
V DDDR
STOP instruction execution
t SREL
tWAIT
Interrupt Signal
(Rising Edge)
KSI-W031-000
15
SD42C/P4404
SD42P4404
Description
The SD42P4404 is a system evaluation LSI having a built in One-time PROM for
SD42C4404. A programming and verification for the internal PROM is achieved by using a
general EPROM programmer with an adapter socket. The function of this device is exactly
same as the SD42C4404 by programming to the internal PROM.
The SD42P4404 is OTP version of the SD42C4404 which internal ROM has been changed
from MASK ROM to EPROM.
Ordering Information
Type NO.
Marking
Package Code.
SD42P4404
SD42P4404
28SOP/30SDIP/36SSOP
Pin Configuration
30SDIP
28SOP
P12 / SO
P11 / SI
P00 / INT0 / TI0
P01 / INT1
PA0 / AD0
PA1 / AD1
1
2
3
4
EPA10
EPA11
EPA12
EPA3
EPA2
EPA1
CEX
28
27
EPA9
5
6
EPA8
26
25
24
EPA0
23
P60
7
EPA7
22
P61
8
EPA6
21
P62/CLO
9
RESETB
10
TEST
11
Vss
12
EPD4
Vpp / OEX
EPA5
20
P13 /SCK
VDD
P13 / BUZ
P42 / KS2
P41 / KS1
P10 / SCK
1
EPA8
P12 / SO
2
EPA10
P11 / SI
P00 / INT0 / TI0
P01 / INT1
XO
13
P53 / KS7
PA1 / AD1
7
PA2 / AD2
8
P52 / KS6
P51 / KS5
19
P50 / KS4
EPD3
19
P83
EPD2
18
P82
14
EPD0
16
15
5
PA0 / AD0
EPA4
EPD1
4
P40 / KS0
PA3 / AD3
P60
P61 / TEST
P62
XI
3
EPA9
EPA11
EPA12
6
CEX
VPP / OEX
14
P81
EPA1
EPA0
VDD
29
28
27
26
25
P10 / SCK
1
EPA8
P13 / BUZ
P12 / SO
2
EPA10
P42 / KS2
P11 / SI
3
P00 / INT0 / TI0
4
P01 / INT1
5
NC
6
PA0 / AD0
7
PA1 / AD1
8
PA2 / AD2
23
P51 / KS5
EPD1
EPD0
20
19
P50 / KS4
P83
P82
P81
18
P80
17
XO
P80
VSS
15
16
KSI-W031-000
35
P13 / BUZ
EPA9
EPA2
34
P42 / KS2
EPA11
EPA1
33
P41 / KS1
32
NC
31
P40 / KS0
30
NC
EPA7
29
P53 / KS7
9
EPA6
28
P52 / KS6
PA3 / AD3
10
EPA5
27
P51 / KS5
P60
11
EPA4
26
P50 / KS4
P61
12
EPD3
25
P83
P62 / CLO
13
EPD2
24
P82
NC
14
EPD1
23
P81
NC
15
EPD0
22
P80
RESETB
16
21
NC
TEST
17
20
XO
VSS
18
19
XI
P53 / KS7
EPA5
21
VDD
EPA3
EPA12
P40 / KS0
P52 / KS6
22
36
P41 / KS1
24
EPD2
EPD4
30
EPA6
EPD3
11
13
EPA2
EPA4
10
RESETB
EPA3
EPA7
9
12
36SSOP
XI
EPA0
CEX
EPD4
Vpp / OEX
16
SD42C/P4404
Device Operation
The operational modes of the SD42P4404 are listed in Table 1.
A single 5V power supply is required in the read mode.
All inputs are TTL levels except for VPP / OEX.
V PP = 12.5±0.5V
PINS
V DD
OUTPUT
CEX
V PP / OEX
READ
V IL
V IL
5.0V
DOUT
PROGRAM
V IL
V PP
6.0V
DIN
VERIFY
V IL
V IL
6.0V
DOUT
PROGRAM INHIBIT
V IH
V PP
6.0V
High Z
MODE
TABLE 1. Operating Modes
MODE
PIN NAME
EPROM MODE
TEST
V IL
RESETB
V IL
USER MODE
V IH
V IH
V IL
TABLE 2. The modes of SD42P4404
DC Programming Characteristics
PARAMETER
LIMIT
SYMBOL
UNIT
TEST CONDITION
MIN.
MAX.
Input Low Voltage
V IL
-0.1
0.8
V
Input High Voltage
V IH
2.0
V DD
V
Output Low Voltage during Verify
V OL
IOL = 2.1mA
-
0.45
V
Output High Voltage during Verify
V OH
IOH = -400uA
2.4
-
V
Quick-pulse Programming
V PP
12.5
13.0
V
Quick-pulse Programming
V DD
6.0
6.5
V
KSI-W031-000
17
SD42C/P4404
Package Dimension
[ UNIT : Millimeter ]
28
15
1
14
7.49±0.1
10.33±0.1
28 SOP
17.90±0.1
0.2±0.1
1.27
0.42±0.1
KSI-W031-000
18
SD42C/P4404
Package Dimension
[ UNIT : Millimeter ]
30 SDIP
30
16
10.16
8.94±0.2
0.25
0° ~ 15°
1
15
27.48±0.2
3.81± 0.2
5.08 MAX
3.30± 0.3
1.778
1.12±0.1
KSI-W031-000
19