BB OPA646

®
OPA646
OPA
646
Low Power, Wide Bandwidth
OPERATIONAL AMPLIFIER
FEATURES
DESCRIPTION
● LOW POWER: 55mW
● UNITY-GAIN BANDWIDTH: 650MHz
● UNITY-GAIN STABLE
The OPA646 is a low power, wideband voltage feedback operational amplifier. It features a high
bandwidth of 650MHz as well as a 12-bit settling time
of only 15ns. Its low input bias current and wide
bandwidth allows it to be used for high speed integrator and active filter designs. Its low distortion gives
exceptional performance for telecommunications,
medical imaging and video applications.
● FAST 12-BIT SETTLING: 15ns (0.01%)
● LOW INPUT BIAS CURRENT: 2µA
● LOW HARMONICS: –82dBc at 5MHz
● LOW DIFFERENTIAL GAIN/PHASE
ERRORS: 0.025%/0.08°
APPLICATIONS
● TELECOMMUNICATIONS
● MEDICAL IMAGING
● CCD IMAGING
● PORTABLE EQUIPMENT
● ACTIVE FILTERS
The OPA646 is internally compensated for unity-gain
stability. This amplifier has a fully symmetrical
differential input due to its “classical” operational
amplifier circuit architecture. Its unusual combination
of speed, accuracy and low power make it an ideal
choice for many portable, multichannel and other high
speed applications where power is at a premium.
● VIDEO AMPLIFICATION
● ADC/DAC GAIN AMPLIFIER
● HIGH SPEED INTEGRATORS
+V S
7, 8
Non-Inverting
Input
3
Inverting
Input
2
Output
Stage
Current
Mirror
6
VOUT
CC
4, 5
–V S
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Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
®
©
1993 Burr-Brown Corporation
1
PDS-1192C
OPA646
Printed in U.S.A. March, 1998
SPECIFICATIONS
ELECTRICAL
At TA = +25°C, VS = ±5V, RL = 100Ω, CL = 2pF, RFB = 402Ω and all four power supply pins are used, unless otherwise noted. RFB = 25Ω for a gain of +1.
OPA646U
PARAMETER
CONDITIONS
OFFSET VOLTAGE
Input Offset Voltage
Average Drift
Power Supply Rejection (+VS)
(–VS)
INPUT BIAS CURRENT
Input Bias Current
Over Specified Temperature
Input Offset Current
Over Specified Temperature
TYP
MAX
±8
50
45
±3
±20
70
55
2
3
0.4
0.9
5
7
1.5
3.0
VS = ±4.5 to ±5.5V
VCM = 0V
VCM = 0V
NOISE
Input Voltage Noise
Noise Density: f = 100Hz
f = 10kHz
f = 1MHz
f = 1MHz to 100MHz
Voltage Noise, BW = 100Hz to 100MHz
Input Bias Current Noise
Current Noise Density, f = 0.1Hz to 20kHz
Noise Figure (NF)
RS = 10kΩ
RS = 50Ω
INPUT VOLTAGE RANGE
Common-Mode Input Range
Over Specified Temperature
Common-Mode Rejection
VCM = ±0.5V
±2.5
±2.5
60
INPUT IMPEDANCE
Differential
Common-Mode
OPEN-LOOP GAIN
Open-Loop Voltage Gain
Over Specified Temperature
FREQUENCY RESPONSE
Closed-Loop Bandwidth
Slew Rate(1)
At Minimum Specified Temperature
Rise Time
Fall Time
Settling Time: 0.01%
0.1%
1%
Over-Voltage Recovery(2)
Spurious Free Dynamic Range
Differential Gain Error at 3.58MHz
Differential Phase Error at 3.58MHz
Gain Flatness to 0.1dB
OUTPUT
Voltage Output
Over Specified Temperature
Voltage Output
Over Specified Temperature
Voltage Output
Over Specified Temperature
Current Output, +25°C to max Temp
Over Specified Temperature
Short Circuit Current
Output Resistance
POWER SUPPLY
Specified Operating Voltage
Operating Voltage Range
Quiescent Current
Over Specified Temperature
TEMPERATURE RANGE
Specification: U, UB
Thermal Resistance
U, UB
8-Pin SO-8
OPA646UB
MIN
MIN
TYP
MAX
UNITS
±2.5
60
48
±1
±12
✻
✻
mV
µV/°C
dB
dB
✻
✻
✻
✻
3.5
✻
✻
✻
µA
µA
µA
µA
23.2
7.5
7.1
7.2
141
✻
✻
✻
✻
✻
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
µVrms
1.1
✻
pA/√Hz
3.0
19.1
✻
✻
dB
dB
✻
✻
90
V
V
dB
✻
✻
kΩ || pF
MΩ || pF
55
53
dB
dB
650
160
45
22
180
155
5.3
5.9
15
11.5
6
65
82
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
MHz
MHz
MHz
MHz
V/µs
V/µs
ns
ns
ns
ns
ns
ns
dBc
0.025
0.08
100
✻
✻
✻
%
degrees
MHz
±3.0
±3.0
80
✻
✻
75
15 || 1
1.6 || 1
VO = ±2V, RL = 100Ω
45
43
G = +1V/V
G = +2V/V
G = +5V/V
G = +10V/V
G = +1, 2V Step
1V Step
1V Step
G = +1, 2V Step
G = +1, 2V Step
G = +1, 2V Step
G = +1, f = 5.0MHz
VO = 2Vp-p, RL = 402Ω
G = +2V/V, VO = 0 to 1.4V, RL = 150Ω
G = +2V/V, VO = 0 to 1.4V, RL = 150Ω
No Load
RL = 250Ω
RL = 100Ω
Ambient
θJA, Junction to Ambient
47
45
±2.5
±2.75
✻
✻
±2.5
±2.7
✻
✻
V
V
V
±2.0
±40
±30
±2.5
±52
±48
60
0.2
✻
✻
✻
✻
✻
✻
✻
✻
V
mA
mA
mA
Ω
1MHz, G = +1V/V
TMIN to TMAX
TMIN to TMAX
51
49
±4.5
±5
±5.25
±6.5
–40
125
✻
±5.5
±6.5
±7.5
✻
+85
✻
✻
✻
✻
✻
✻
✻
V
V
mA
mA
✻
°C
°C/W
✻ Specification same as OPA646U.
NOTE: (1) Slew rate is rate of change from 10% to 90% of output voltage step. (2) Recovery time to linear operation from the input overdrive midpoint.
®
OPA646
2
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
Top View
Power Supply .............................................................................. ±5.5VDC
Internal Power Dissipation .......................... See Thermal Considerations
Differential Input Voltage .................................................................. ±1.2V
Input Voltage Range ............................................................................ ±VS
Storage Temperature Range: U, UB ............................ –40°C to +125°C
Lead Temperature (soldering, 10s) .............................................. +300°C
(soldering, SO-8 3s) ....................................... +260°C
Junction Temperature (TJ ) ............................................................ +175°C
SO-8
NC
1
8
+VS2(1)
Inverting Input
2
7
+VS1
Non-Inverting Input
3
6
Output
–VS1
4
5
–VS2(1)
ELECTROSTATIC
DISCHARGE SENSITIVITY
NOTE: (1) Making use of all four power supply pins is highly recommended,
although not required. Using these four pins, instead of just pins 4 and 7, will
lower the effective pin impedance and substantially lower distortion.
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
PACKAGE /ORDERING INFORMATION
PRODUCT
OPA646U, UB
PACKAGE
PACKAGE DRAWING
NUMBER(1)
SO-8 Surface Mount
182
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book. (2) The “B” grade of the
SO-8 will be marked with a “B” by pin 8.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
®
3
OPA646
TYPICAL PERFORMANCE CURVES
At TA = +25°C, VS = ±5V, RL = 100Ω, CL = 2pF, RFB = 402Ω and all four power supply pins are used, unless otherwise noted. RFB = 25Ω for a gain of +1.
COMMON-MODE REJECTION
vs INPUT COMMON-MODE VOLTAGE
AOL , PSR, AND CMR vs TEMPERATURE
110
Common-Mode Rejection (dB)
90
CMR
AOL , PSR, CMR (dB)
80
PSR+
70
60
AOL
50
–75
PSR–
–50
–25
0
+25
+50
+75
+100
100
90
80
70
–5
+125
–4
–3
INPUT BIAS CURRENT vs TEMPERATURE
Supply Current (±mA)
Input Bias Current (µA)
+1
+2
+3
+4
+5
–50
–25
0
+25
+50
+75
+100
7
6
5
4
–75
+125
–50
Ambient Temperature (°C)
–25
0
+25
+50
+75
+100
+125
Ambient Temperature (°C)
VOLTAGE NOISE vs FREQUENCY
OUTPUT CURRENT vs TEMPERATURE
100
Voltage Noise (nV/√Hz)
70
Output Current (±mA)
0
8
2
I O+
60
I O–
50
40
–60
–1
SUPPLY CURRENT vs TEMPERATURE
4
0
–75
–2
Common-Mode Voltage (V)
Temperature (°C)
80
60
40
20
0
–40
–20
0
20
40
60
80
10
100 120 140
®
OPA646
100
1k
10k
100k
Frequency (Hz)
Ambient Temperature (°C)
4
1M
10M
TYPICAL PERFORMANCE CURVES
(CONT)
At TA = +25°C, VS = ±5V, RL = 100Ω, CL = 2pF, RFB = 402Ω and all four power supply pins are used, unless otherwise noted. RFB = 25Ω for a gain of +1.
SMALL SIGNAL TRANSIENT RESPONSE
(G = +1, RL = 100Ω)
RECOMMENDED ISOLATION RESISTANCE
vs CAPACITIVE LOAD
200
25
120
Voltage Output (mV)
Isolation Resistance (Ω)
160
20
15
10
80
40
0
–40
–80
–120
5
–160
–200
0
50
0
100
Time (5ns/div)
150
Capacitive Load (pF)
LARGE SIGNAL TRANSIENT RESPONSE
(G = +1, RL = 100Ω)
G = +1 CLOSED-LOOP
SMALL SIGNAL BANDWIDTH
2.0
9
1.6
6
Gain
3
0
0.4
0
–0.4
–3
–0.8
–9
–1.2
–12
–1.6
–15
–2.0
0
–6
–45
Closed-Loop
Phase
–90
Bandwidth
= 625MHz
–18
Time (5ns/div)
10M
1M
100M
Phase Shift (°)
0.8
Gain (dB)
Voltage Output (V)
1.2
–135
–180
–225
1GHz
Frequency (Hz)
G = –1V/V CLOSED-LOOP
SMALL SIGNAL BANDWIDTH
G = +2 CLOSED-LOOP
SMALL SIGNAL BANDWIDTH
15
12
–180
–6
–225
Closed-Loop
Phase
–9
–270
Gain (dB)
Gain (dB)
–3
9
Phase Shift (°)
Bandwidth
= 165MHz
0
Gain
Bandwidth
= 185MHz
6
0
3
0
–12
–315
–15
–360
–45
Closed-Loop
Phase
–90
–3
–135
–6
1M
10M
100M
1GHz
1M
Frequency (Hz)
Phase Shift (°)
Gain
10M
100M
1GHz
Frequency (Hz)
®
5
OPA646
TYPICAL PERFORMANCE CURVES
(CONT)
At TA = +25°C, VS = ±5V, RL = 100Ω, CL = 2pF, RFB = 402Ω and all four power supply pins are used, unless otherwise noted. RFB = 25Ω for a gain of +1.
G = +5 CLOSED-LOOP
SMALL SIGNAL BANDWIDTH
23
Gain (dB)
17
Gain
Bandwidth
= 625MHz
14
0
11
8
–45
Closed-Loop
Phase
–90
100M
5
10M
1M
3fO
–80
2fO
HARMONIC DISTORTION vs FREQUENCY
(G = +2, VO = 2Vp-p, RL = 100Ω)
Harmonic Distortion (dBc)
–80
2fO
1M
10M
–60
3fO
–80
2fO
–100
100k
100M
10M
100M
Frequency (Hz)
HARMONIC DISTORTION vs FREQUENCY
(G = +5, VO = 2Vp-p, RL = 100Ω)
HARMONIC DISTORTION vs TEMPERATURE
(G = +1, VO = 2Vp-p, RL = 100Ω, fO = 5MHz)
3fO
2fO
–100
100k
1M
Frequency (Hz)
–60
–80
100M
HARMONIC DISTORTION vs FREQUENCY
(G = –1, VO = 2Vp-p, RL = 100Ω)
3fO
–60
10M
Frequency (Hz)
–60
–40
1M
Frequency (Hz)
–40
–100
100k
Harmonic Distortion (dBc)
–60
–100
100k
Harmonic Distortion (dBc)
Harmonic Distortion (dBc)
–40
Phase Shift (°)
20
Harmonic Distortion (dBc)
–40
HARMONIC DISTORTION vs FREQUENCY
(G = +1, VO = 2Vp-p, RL = 100Ω)
1M
10M
2fO
–80
–90
–75
100M
Frequency (Hz)
–50
–25
0
25
50
Temperature (°C)
®
OPA646
3fO
–70
6
75
100
125
TYPICAL PERFORMANCE CURVES
(CONT)
At TA = +25°C, VS = ±5V, RL = 100Ω, CL = 2pF, RFB = 402Ω and all four power supply pins are used, unless otherwise noted. RFB = 25Ω for a gain of +1.
5MHz HARMONIC DISTORTION vs OUTPUT SWING
(G = +1, RL = 100Ω)
–60
10MHz HARMONIC DISTORTION vs OUTPUT SWING
(G = +1, RL = 100Ω)
–50
Harmonic Distortion (dBc)
Harmonic Distortion (dBc)
3fO
2fO
–70
–80
3fO
–60
2fO
–70
–80
–90
0
1.0
2.0
3.0
0
4.0
1.0
2.0
3.0
4.0
Output Swing (Vp-p)
Output Swing (Vp-p)
APPLICATIONS INFORMATION
DISCUSSION OF PERFORMANCE
The OPA646 provides a level of speed and precision not
previously attainable in monolithic form. Unlike current
feedback amplifiers, the OPA646’s design uses a “classical”
operational amplifier architecture and can therefore be used
in all traditional operational amplifier applications. While it
is true that current feedback amplifiers can provide wider
bandwidth at higher gains, they offer some disadvantages.
The asymmetrical input characteristics of current feedback
amplifiers (i.e., one input is a low impedance) prevents them
from being used in a variety of applications. In addition,
unbalanced inputs make input bias current errors difficult to
correct. Cancelling offset errors (due to input bias currents)
through matching of inverting and non-inverting input resistors is impossible because the input bias currents are
uncorrelated. Current noise is also asymmetrical and is
usually significantly higher on the inverting input. Perhaps
most important, settling time to 0.01% is often extremely
poor due to internal design tradeoffs. Many current feedback
designs exhibit settling times to 0.01% in excess of 10
microseconds even though 0.1% settling times are reasonable. Such amplifiers are completely inadequate for fast
settling 12-bit applications.
The OPA646’s “classical” operational amplifier architecture
employs true differential and fully symmetrical inputs to
eliminate these troublesome problems. All traditional circuit
configurations and op amp theory apply to the OPA646.
amplifiers when they are improperly used. In general, all
printed circuit board conductors should be wide to provide
low resistance, low impedance signal paths. They should
also be as short as possible. The entire physical circuit
should be as small as practical. Stray capacitances should be
minimized, especially at high impedance nodes, such as the
amplifier’s input terminals. Stray signal coupling from the
output or power supplies to the inputs should be minimized.
All circuit element leads should be no longer than 1/4 inch
(6mm) to minimize lead inductance, and low values of
resistance should be used. This will minimize time constants
formed with the circuit capacitances and will eliminate
stray, parasitic circuits.
Grounding is the most important application consideration
for the OPA646, as it is with all high-frequency circuits.
Oscillations at high frequencies can easily occur if good
grounding techniques are not used. A heavy ground plane
(2 oz. copper recommended) should connect all unused
areas on the component side. Good ground planes can
reduce stray signal pickup, provide a low resistance, low
inductance common return path for signal and power, and
can conduct heat from active circuit package pins into
ambient air by convection.
Supply bypassing is extremely critical and must always be
used, especially when driving high current loads. Both
power supply leads should be bypassed to ground as close as
possible to the amplifier pins. Tantalum capacitors (2.2µF)
with very short leads are recommended. A parallel 0.01µF
ceramic must also be added. Surface-mount bypass capacitors will produce excellent results due to their low lead
inductance. Additionally, suppression filters can be used to
WIRING PRECAUTIONS
Maximizing the OPA646’s capability requires some wiring
precautions and high-frequency layout techniques. Oscillation, ringing, poor bandwidth and settling, gain peaking, and
instability are typical problems plaguing all high-speed
®
7
OPA646
7) Don’t forget that these amplifiers use ±5V supplies.
Although they will operate perfectly well with +5V and
–5.2V, use of ±15V supplies will destroy the part.
8) Standard commercial test equipment has not been
designed to test devices in the OPA646’s speed range.
Benchtop op amp testers and ATE systems will require a
special test head to successfully test these amplifiers.
9) Terminate transmission line loads. Unterminated lines,
such as coaxial cable, can appear to the amplifier to be a
capacitive or inductive load. By terminating a transmission
line with its characteristic impedance, the amplifier’s load
then appears purely resistive.
10) Plug-in prototype boards and wire-wrap boards will not
be satisfactory. A clean layout using RF techniques is
essential; there are no shortcuts.
isolate noisy supply lines. Properly bypassed and modulation-free power supply lines allow full amplifier output and
optimum settling time performance.
Points to Remember
1) Making use of all four power supply pins will lower the
effective power supply impedance seen by the input and
output stages. This will improve the AC performance including lower distortion. The lowest distortion is achieved
when running separated traces to VS1 and VS2. Power supply
bypassing with 0.01µF and 2.2µF surface-mount capacitors
on the topside of the PC Board is recommended. It is
essential to keep the 0.01µF capacitor very close to the
power supply pins. Refer to the DEM-OPA64X Data Sheet
for the recommended layout and component placements.
2) Whenever possible, use surface mount. Don’t use pointto-point wiring as the increase in wiring inductance will be
detrimental to AC performance. However, if it must be used,
very short, direct signal paths are required. The input signal
ground return, the load ground return, and the power supply
common should all be connected to the same physical point
to eliminate ground loops, which can cause unwanted feedback.
3) Surface mount on backside of PC Board. Good component selection is essential. Capacitors used in critical
locations should be a low inductance type with a high quality
dielectric material. Likewise, diodes used in critical
locations should be Schottky barrier types, such as HP50822835 for fast recovery and minimum charge storage. Ordinary diodes will not be suitable in RF circuits.
4) Use a small feedback resistor (usually 25Ω) in unity-gain
voltage follower applications for the best performance. For
gain configurations, resistors used in feedback networks
should have values of a few hundred ohms for best performance. Shunt capacitance problems limit the acceptable
resistance range to about 1kΩ on the high end and to a value
that is within the amplifier’s output drive limits on the low
end. Metal film and carbon resistors will be satisfactory, but
wirewound resistors (even “non-inductive” types) are absolutely unacceptable in high-frequency circuits. Feedback
resistors should be placed directly between the output and
the inverting input on the backside of the PC board. This
placement allows for the shortest feedback path and the
highest bandwidth. Refer to the demonstration board layout
at the end of the data sheet. A longer feedback path than
this will decrease the realized bandwidth substantially.
5) Surface-mount components (chip resistors, capacitors,
etc.) have low lead inductance and are therefore strongly
recommended. Circuits using all surface-mount components
with the OPA646U (SO-8 package) will offer the best AC
performance.
OFFSET VOLTAGE ADJUSTMENT
If additional offset adjustment is needed, the circuit in
Figure 1 can be used without degrading offset drift with
temperature. Avoid external adjustment whenever possible
since extraneous noise, such as power supply noise, can be
inadvertently coupled into the amplifier’s inverting input
terminal. Remember that additional offset errors can be
created by the amplifier’s input bias currents. Whenever
possible, match the impedance seen by both inputs as is
shown with R3. This will reduce input bias current errors to
the amplifier’s offset current.
+VCC
RTrim
20kΩ
47kΩ
–VCC
OPA646
10µF
(1)
R1
R3 = R1 || R2
VIN or Ground
Output Trim Range ≅ +VCC R2
RTrim
to –VCC R2
RTrim
NOTE: (1) R3 is optional and can be used to cancel offset errors due to input
bias currents.
FIGURE 1. Offset Voltage Trim.
6) Avoid overloading the output. Remember that output
current must be provided by the amplifier to drive its own
feedback network as well as to drive its load. Lowest
distortion is achieved with high impedance loads.
INPUT PROTECTION
Static damage has been well recognized for MOSFET devices, but any semiconductor device deserves protection
®
OPA646
R2
8
from this potentially damaging source. The OPA646 incorporates on-chip ESD protection diodes as shown in Figure 2.
This eliminates the need for the user to add external protection diodes, which can add capacitance and degrade AC
performance.
All pins on the OPA646 are internally protected from ESD
by means of a pair of back-to-back reverse-biased diodes to
either power supply as shown. These diodes will begin to
conduct when the input voltage exceeds either power supply
by about 0.7V. This situation can occur with loss of the
amplifier’s power supplies while a signal source is still
present. The diodes can typically withstand a continuous
current of 30mA without destruction. To insure long term
reliability, however, diode current should be externally
limited to 10mA or so whenever possible.
The internal power dissipation is given by the equation
PD = PDQ + PDL, where PDQ is the quiescent power dissipation and PDL is the power dissipation in the output stage due
to the load. (For ±VCC = ±5V, PDQ = 10V x 7.5mA = 75mW,
max). For the case where the amplifier is driving a grounded
load (RL) with a DC voltage (±VOUT) the maximum value of
PDL occurs at ±VOUT = ±VCC/2, and is equal to PDL,
max = (±VCC)2/4RL. Note that it is the voltage across the
output transistor, and not the load, that determines the power
dissipated in the output stage.
100
AV = +1V/V
Output Impedance (Ω)
+V CC
ESD Protection diodes internally
connected to all pins.
External
Pin
10
Internal
Circuitry
1
0.1
0.01
–V CC
0.001
100k
10k
FIGURE 2. Internal ESD Protection.
1M
10M
100M
Frequency (Hz)
The OPA646 utilizes a fine geometry high speed process
that withstands 500V using the Human Body Model and
100V using the Machine Model. However, static damage
can cause subtle changes in amplifier input characteristics
without necessarily destroying the device. In precision operational amplifiers, this may cause a noticeable degradation
of offset voltage and drift. Therefore, static protection is
strongly recommended when handling the OPA646.
FIGURE 3. Small-Signal Output Impedance vs Frequency.
A short-circuit condition represents the maximum amount of
internal power dissipation that can be generated. The variation of output current with temperature is shown in Figure 4.
OUTPUT DRIVE CAPABILITY
The OPA646 has been optimized to drive 75Ω and 100Ω
resistive loads. The device can drive 2Vp-p into a 75Ω load.
This high-output drive capability makes the OPA646 an
ideal choice for a wide range of RF, IF, and video applications. In many cases, additional buffer amplifiers are
unneeded.
Many demanding high-speed applications such as
ADC/DAC buffers require op amps with low wideband
output impedance. For example, low output impedance is
essential when driving the signal-dependent capacitances at
the inputs of flash A/D converters. As shown in Figure 3, the
OPA646 maintains very low closed-loop output impedance
over frequency. Closed-loop output impedance increases
with frequency since loop gain is decreasing with frequency.
Output Current (±mA)
70
I O+
60
I O–
50
40
–60
–40
–20
0
20
40
60
80
100 120 140
Ambient Temperature (°C)
FIGURE 4. Output Current vs Temperature.
THERMAL CONSIDERATIONS
The OPA646 does not require a heat sink for operation in
most environments. At extreme temperatures and under full
load conditions a heat sink may be necessary.
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9
OPA646
CAPACITIVE LOADS
The OPA646’s output stage has been optimized to drive low
resistive loads. Capacitive loads, however, will decrease the
amplifier’s phase margin which may cause high frequency
peaking or oscillations. Capacitive loads greater than 10pF
should be buffered by connecting a small resistance, usually
5Ω to 25Ω, in series with the output as shown in Figure 5.
This is particularly important when driving high capacitance
loads such as flash A/D converters. Increasing the gain from
+1 will improve the capacitive load drive due to increased
phase margin.
the phase margin and avoid peaking by keeping the break
frequency of this zero sufficiently high. When high closedloop gains are required, a three-resistor attenuator (tee
network) is recommended to avoid using large value resistors with large time constants.
SETTLING TIME
Settling time is defined as the total time required, from the
input signal step, for the output to settle to within the
specified error band around the final value. This error band
is expressed as a percentage of the value of the output
transition, a 2V step. Thus, settling time to 0.01% requires
an error band of ±200µV centered around the final value
of 2V.
Settling time, specified in an inverting gain of one, occurs in
only 15ns to 0.01% for a 2V step, making the OPA646 one
of the fastest settling monolithic amplifiers commercially
available. Settling time increases with closed-loop gain and
output voltage change as described in the Typical Performance Curves. Preserving settling time requires critical
attention to the details as mentioned under “Wiring Precautions.” The amplifier also recovers quickly from input
overloads. Overload recovery time to linear operation from
a 50% overload is typically only 65ns.
In practice, settling time measurements on the OPA646
prove to be very difficult to perform. Accurate measurement
is next to impossible in all but the very best equipped labs.
Among other things, a fast flat-top generator and high speed
oscilloscope are needed. Unfortunately, fast flat-top generators, which settle to 0.01% in sufficient time, are scarce and
expensive. Fast oscilloscopes, however, are more commonly
available. For best results a sampling oscilloscope is recommended. Sampling scopes typically have bandwidths that
are greater than 1GHz and very low capacitance inputs.
They also exhibit faster settling times in response to signals
that would tend to overload a real-time oscilloscope.
(RS typically 5Ω to 25Ω)
RS
OPA646
RL
CL
FIGURE 5. Driving Capacitive Loads.
In general, capacitive loads should be minimized for optimum high frequency performance. Coax lines can be driven
if the cable is properly terminated. The capacitance of coax
cable (29pF/foot for RG-58) will not load the amplifier
when the coaxial cable or transmission line is terminated in
its characteristic impedance.
COMPENSATION
The OPA646 is internally compensated and is stable in unity
gain with a phase margin of approximately 60°. However,
the unity gain buffer is the most demanding circuit configuration for loop stability and oscillations are most likely to
occur in this gain. If possible, use the device in a noise gain
of two or greater to improve phase margin and reduce the
susceptibility to oscillation. (Note that, from a stability
standpoint, an inverting gain of –1V/V is equivalent to a
noise gain of 2.) Gain and phase response for other gains are
shown in the Typical Performance Curves.
The high-frequency response of the OPA646 in a good
layout is very flat with frequency. However, some circuit
configurations such as those where large feedback resistances are used, can produce high-frequency gain peaking.
This peaking can be minimized by connecting a small
capacitor in parallel with the feedback resistor. This capacitor compensates for the closed-loop, high frequency, transfer
function zero that results from the time constant formed by
the input capacitance of the amplifier (typically 2pF after PC
board mounting), and the input and feedback resistors. The
selected compensation capacitor may be a trimmer, a fixed
capacitor, or a planned PC board capacitance. The capacitance value is strongly dependent on circuit layout and
closed-loop gain. Using small resistor values will preserve
DIFFERENTIAL GAIN AND PHASE
Differential Gain (DG) and Differential Phase (DP) are
among the more important specifications for video applications. DG is defined as the percent change in closed-loop
gain over a specified change in output voltage level. DP is
defined as the change in degrees of the closed-loop phase
over the same output voltage change. Both DG and DP are
specified at the NTSC sub-carrier frequency of 3.58MHz.
DG and DP increase with closed-loop gain and output
voltage transition. All measurements were performed using
a Tektronix model VM700 Video Measurement Set.
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OPA646
10
SPICE MODELS
Computer simulation using SPICE is often useful when
analyzing the performance of analog circuits and systems.
This is particularly true for Video and RF amplifier circuits
where parasitic capacitance and inductance can have a major
effect on circuit performance. SPICE models are available
for the OPA646. Contact Burr-Brown Applications Department to receive a spice diskette.
DISTORTION
The OPA646’s harmonic distortion characteristics into a
100Ω load are shown vs frequency and power output in the
Typical Performance Curves. Distortion can be significantly
improved by increasing the load resistance as illustrated in
Figure 6. Remember to include the contribution of the
feedback resistance when calculating the effective load
resistance seen by the amplifier.
DEMONSTRATION BOARDS
Demonstration boards to speed prototyping are available.
Refer to the DEM-OPA64X Data Sheet for details.
–40
Harmonic Distortion (dBc)
(G = +1, fO = 5MHz)
–50
–60
3fO
–70
2fO
–80
–90
–100
10
20
50
100
200
500
1K
Load Resistance (Ω)
FIGURE 6. 5MHz Harmonic Distortion vs Load Resistance
with RF = 402Ω.
NOISE FIGURE
The OPA646 voltage and current noise spectral densities are
specified in the Typical Performance Curves. For RF applications, however, Noise Figure (NF) is often the preferred
noise specification since it allows system noise performance
to be more easily calculated. The OPA646’s Noise Figure vs
Source Resistance is shown in Figure 7.
25
NF = 10 LOG 1 +
Noise Figure (dB)
20
en2 + (InRS)2
4KTRS
15
10
5
0
10
100
1k
10k
100k
Source Resistance (Ω)
FIGURE 7. Noise Figure vs Source Resistance.
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11
OPA646
APPLICATIONS
390Ω
390Ω
75Ω Transmission Line
75Ω
V OUT
OPA646
Video
Input
75Ω
75Ω
FIGURE 8. Low Power Video Amplifier.
+5V
R3
2kΩ
(–)
D
OPA646
(+)
R4
2kΩ
(1)
(1)
J1
D
J2
S
S
2N5911
2
C2
1000pF
R5
158Ω
3
7
OPA646
6
V OUT
4
R1
15.8kΩ
VIN
R2
158Ω
(1)R
VOUT
OPA646
1
2kΩ
(1)R
2
2kΩ
C1
1000pF
–5V
fC = 1MHz
BW = 20kHz at –3dB
Q = 50
NOTE: (1) Select J1, J2 and R1,
R2 to set input stage current for
optimum performance.
FIGURE 9. High-Q 1MHz Bandpass Filter.
Input Bias Current: 1pA
FIGURE 10. Low Power, Wideband FET Input Op Amp.
50Ω or 75Ω
Transmission Line
50Ω or 75Ω
OPA646
50Ω
or
75Ω
Differential
Input
50Ω
or
75Ω
RF
402Ω
RG
806Ω
Differential
Output
RF
402Ω
50Ω or 75Ω
Transmission Line
OPA646
50Ω or 75Ω
50Ω
or
75Ω
Differential Voltage Gain = 2V/V = 1 + 2RF/RG
FIGURE 11. Differential Line Driver for 50Ω or 75Ω Systems.
®
OPA646
12
50Ω
or
75Ω
OPA646
RF
402Ω
402Ω
402Ω
RG
806Ω
RF
402Ω
OPA646
402Ω
402Ω
OPA646
Differential Voltage Gain = 2V/V = 1 + 2RF/RG
FIGURE 12. Wideband, Fast-Settling Instrumentation Amplifier.
C
402Ω
402Ω
Differential
Input
R
VIN
SingleEnded
Output
OPA646
402Ω
VO
OPA646
402Ω
R
VO = –
1
VIN
RC
∫
FIGURE 15. A High Speed Integrator.
FIGURE 13. Unity Gain Difference Amplifier.
+VS
High Speed
ADC
R
+VS
VS
VOUT =
2
VS
2
ROUT
VAC
OPA646
RS
R
Input
OPA646
499Ω
+ AV VAC
RL
RF
402Ω
499Ω
RG
402Ω
499Ω
FIGURE 14. ADC Input Buffer Amplifier (G = +2V/V).
AV = 1 +
RF
RG
FIGURE 16. Single Supply Operation.
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13
OPA646