Ultra Low Power/Voltage CMOS SRAM 64K X 16 bit BS616UV1010 BSI DESCRIPTION FEATURES • Ultra low operation voltage : 1.8 ~ 3.6V • Ultra low power consumption : Vcc = 2.0V C-grade : 10mA (Max.) operating current I- grade : 15mA (Max.) operating current 0.01uA (Typ.) CMOS standby current Vcc = 3.0V C-grade : 15mA (Max.) operating current I- grade : 20mA (Max.) operating current 0.02uA (Typ.) CMOS standby current • High speed access time : -15 150ns (Max.) at Vcc = 3.0V • Input levels are CMOS-compatible • Automatic power down when chip is deselected • Three state outputs and TTL compatible • Fully static operation • Data retention supply voltage as low as 1.5V • Easy expansion with CE and OE options • I/O Configuration x8/x16 selectable by LB and UB pin The BS616UV1010 is a high performance, ultra low power CMOS Static Random Access Memory organized as 65,536 words by 16 bits and operates from a wide range of 1.8V to 3.6V supply voltage. Advanced CMOS technology and circuit techniques provide both high speed and low power features with a typical CMOS standby current of 0.01uA and maximum access time of 150ns in 2V operation. Easy memory expansion is provided by an active LOW chip enable(CE) and active LOW output enable(OE) and three-state output drivers. The BS616UV1010 has an automatic power down feature, reducing the power consumption significantly when chip is deselected. The BS616UV1010 is available in the JEDEC standard 44-pin TSOP Type II and 48-pin mini-BGA. PRODUCT FAMILY PRODUCT FAMILY OPERATING TEMPERATURE BS616UV1010EC O BS616UV1010AC BS616UV1010EI BS616UV1010AI O +0 C to +70 C O O -40 C to +85 C Vcc RANGE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 1 A LB BS616UV1010EC BS616UV1010EI 2 OE 3 A0 4 A1 5 A2 (ICCSB1, Max) PKG TYPE (ICC, Max) Vcc=3.0V Vcc=3.0V Vcc=2.0V Vcc=3.0V Vcc=2.0V 1.8V ~ 3.6V 150 0.5uA 0.3uA 15mA 10mA 1.8V ~ 3.6V 150 1.5uA 1uA 20mA 15mA PIN CONFIGURATIONS A4 A3 A2 A1 A0 CE DQ0 DQ1 DQ2 DQ3 VCC GND DQ4 DQ5 DQ6 DQ7 WE A15 A14 A13 A12 NC POWER DISSIPATION STANDBY Operating SPEED (ns) TSOP2-44 BGA-48-0608 TSOP2-44 BGA-48-0608 BLOCK DIAGRAM 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 A5 A6 A7 OE UB LB DQ15 DQ14 DQ13 DQ12 GND VCC DQ11 DQ10 DQ9 DQ8 NC A8 A9 A10 A11 NC A8 A13 Address A15 A14 Input A12 Buffer A7 A6 A5 A4 16 DQ0 . . . . NC . . . . UB A3 A4 CE IO0 C IO9 IO10 A5 A6 IO1 IO2 D VSS IO11 NC A7 IO3 VCC E VCC IO12 NC NC IO4 VSS F IO14 IO13 A14 A15 IO5 IO6 G IO15 NC A12 A13 WE IO7 H NC A8 A9 A10 A11 NC Memory Array Decoder 512 x 2048 Data Input Buffer 16 Column I/O Write Driver Sense Amp 16 Data Output Buffer DQ15 IO8 512 Row 2048 6 B 18 128 16 Column Decoder 14 CE WE OE UB LB Control Address Input Buffer A11 A9 A3 A2 A1 A0 A10 Vcc Gnd Brilliance Semiconductor Inc. reserves the right to modify document contents without notice. R0201-BS616UV1010 1 Revision 2.2 April 2001 BSI BS616UV1010 PIN DESCRIPTIONS Name Function A0-A15 Address Input These 16 address input select one of the 65,536 x 16-bit words in the RAM. CE Chip Enable Input CE is active LOW. Chip enables must be active to read from or write to the device. if chip enable is not active, the device is deselected and is in a standby power mode. The DQ pins will be in the high impedance state when the device is deselected. WE Write Enable Input The write enable input is active LOW and controls read and write operations. With the chip selected, when WE is HIGH and OE is LOW, output data will be present on the DQ pins; when WE is LOW, the data present on the DQ pins will be written into the selected memory location. OE Output Enable Input The output enable input is active LOW. If the output enable is active while the chip is selected and the write enable is inactive, data will be present on the DQ pins and they will be enabled. The DQ pins will be in the high impedance state when OE is inactive. LB and UB Data Byte Control Input Lower byte and upper byte data input/output control pins. DQ0 - DQ15 Data Input/Output Ports These 16 bi-directional ports are used to read data from or write data into the RAM. Vcc Power Supply Gnd Ground TRUTH TABLE MODE Not selected (Power Down) Output Disabled CE WE OE LB UB DQ0~DQ7 DQ8~DQ15 Vcc CURRENT H X X X X High Z High Z ICCSB, ICCSB1 L H H X X High Z High Z ICC L L Dout Dout ICC Read L H L H L High Z Dout ICC L H Dout High Z ICC L L Din Din ICC H L X Din ICC L H Din X ICC Write R0201-BS616UV1010 L L X 2 Revision 2.2 April 2001 BSI BS616UV1010 ABSOLUTE MAXIMUM RATINGS(1) SYMBOL V TERM PARAMETER OPERATING RANGE RATING Terminal Voltage with Respect to GND -0.5 to Vcc+0.5 UNITS RANGE AMBIENT TEMPERATURE Vcc V Commercial 0 O C to +70 O C 1.8V ~ 3.6V T BIAS Temperature Under Bias -40 to +125 O T STG Storage Temperature -60 to +150 O PT Power Dissipation 1.0 W I OUT DC Output Current 20 mA C C O Industrial O -40 C to +85 C 1.8V ~ 3.6V CAPACITANCE (1) (TA = 25oC, f = 1.0 MHz) SYMBOL 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. CIN CDQ PARAMETER Input Capacitance Input/Output Capacitance CONDITIONS MAX. UNIT VIN=0V 6 pF VI/O=0V 8 pF 1. This parameter is guaranteed and not tested. DC ELECTRICAL CHARACTERISTICS ( TA = 0oC to + 70oC ) PARAMETER NAME VIL VIH PARAMETER MIN. TYP. (1) MAX. TEST CONDITIONS Guaranteed Input Low (2) Voltage Guaranteed Input High (2) Voltage Vcc=2.0V Vcc=3.0V Vcc=2.0V Vcc=3.0V UNITS -0.5 -- 0.6 0.8 V 1.4 2.0 -- Vcc+0.2 V IIL Input Leakage Current Vcc = Max, VIN = 0V to Vcc -- -- 1 uA IOL Output Leakage Current Vcc = Max, CE = VIH, or OE = VIH, VI/O = 0V to Vcc -- -- 1 uA VOL Output Low Voltage Vcc = Max, IOL = 1mA -- -- 0.4 V -- -- V -- 10 VOH ICC ICCSB ICCSB1 Output High Voltage Vcc = Min, IOH = -0.5mA Operating Power Supply Current CE = VIL, IDQ = 0mA, F = Fmax(3) Standby Current-TTL CE = VIH, IDQ = 0mA Standby Current-CMOS CE Њ Vcc-0.2V, VIN Њ Vcc - 0.2V or VIN Љ 0.2V Vcc=2.0V Vcc=3.0V Vcc=2.0V 1.6 2.4 -- Vcc=3.0V -- -- 15 Vcc=2.0V -- -- 0.5 Vcc=3.0V -- -- 1 Vcc=2.0V -- 0.01 0.3 Vcc=3.0V -- 0.02 0.5 Vcc=2.0V Vcc=3.0V mA mA uA 1. Typical characteristics are at TA = 25oC. 2. These are absolute values with respect to device ground and all overshoots due to system or tester notice are included. 3. Fmax = 1/tRC . DATA RETENTION CHARACTERISTICS ( TA = 0oC to + 70oC ) SYMBOL PARAMETER TEST CONDITIONS MIN. TYP. (1) MAX. UNITS VDR Vcc for Data Retention CE Њ Vcc - 0.2V VIN Њ Vcc - 0.2V or VIN Љ 0.2V 1.5 -- -- V ICCDR Data Retention Current CE Њ Vcc -0.2V VIN Њ Vcc - 0.2V or VIN Љ 0.2V -- 0.01 0.2 uA tCDR Chip Deselect to Data Retention Time -- -- ns -- -- ns tR See Retention Waveform Operation Recovery Time 0 TRC (2) 1. Vcc = 1.5V, TA = + 25OC 2. tRC = Read Cycle Time R0201-BS616UV1010 3 Revision 2.2 April 2001 BSI BS616UV1010 LOW VCC DATA RETENTION WAVEFORM ( CE Controlled ) Data Retention Mode Vcc VDR ≥ 1.5V Vcc Vcc tR t CDR CE ≥ Vcc - 0.2V VIH CE VIH KEY TO SWITCHING WAVEFORMS AC TEST CONDITIONS Input Pulse Levels Input Rise and Fall Times Input and Output Timing Reference Level Vcc/0V 5ns WAVEFORM 0.5Vcc AC TEST LOADS AND WAVEFORMS 1333 Ω 2V 1333 Ω 2V OUTPUT OUTPUT 100PF INCLUDING JIG AND SCOPE 2000 Ω 2000 Ω FIGURE 1A FIGURE 1B THEVENIN EQUIVALENT 800 Ω OUTPUT OUTPUTS MUST BE STEADY MUST BE STEADY MAY CHANGE FROM H TO L WILL BE CHANGE FROM H TO L MAY CHANGE FROM L TO H WILL BE CHANGE FROM L TO H , 5PF INCLUDING JIG AND SCOPE INPUTS DON T CARE: ANY CHANGE PERMITTED CHANGE : STATE UNKNOWN DOES NOT APPLY CENTER LINE IS HIGH IMPEDANCE ”OFF ”STATE 1.2V ALL INPUT PULSES Vcc GND 90% 90% 10% → ← → 10% ← 5ns FIGURE 2 AC ELECTRICAL CHARACTERISTICS ( TA = 0oC to + 70oC, Vcc = 2.0V ) READ CYCLE JEDEC PARAMETER NAME PARAMETER NAME t AVAX t AVQV tELQV tBA tGLQV tELQX tBE tGLQX tEHQZ tBDO tGHQZ t RC t AA t ACS t BA t OE t CLZ t BE t OLZ t CHZ t BDO t OHZ t AXOX t OH R0201-BS616UV1010 BS616UV1010-15 MIN. TYP. MAX. DESCRIPTION Read Cycle Time -- -- ns -- -- 150 ns -- -- 150 ns (LB,UB) -- -- 150 ns -- -- 80 ns Chip Select Access Time Output Enable to Output Valid (CE) 15 -- -- ns (LB,UB) 15 -- -- ns Chip Select to Output Low Z Data Byte Control to Output Low Z 150 (CE) Address Access Time Data Byte Control Access Time UNIT 15 -- -- ns (CE) 0 -- 45 ns (LB,UB) Output Enable to Output in Low Z Chip Deselect to Output in High Z 0 -- 40 ns Output Disable to Output in High Z 0 -- 40 ns Output Disable to Output Address Change 15 -- -- ns Data Byte Control to Output High Z 4 Revision 2.2 April 2001 BSI BS616UV1010 SWITCHING WAVEFORMS (READ CYCLE) READ CYCLE1 (1,2,4) t RC ADDRESS t t t OH AA OH D OUT READ CYCLE2 (1,3,4) CE t ACS t BA LB,UB t BE D OUT t t BDO (5) CLZ t (5) CHZ READ CYCLE3 (1,4) t RC ADDRESS t AA OE t OH t OE t OLZ CE (5) t CLZ t t OHZ (5) t CHZ(1,5) ACS t BA LB,UB t BE t BDO D OUT NOTES: 1. WE is high for read Cycle. 2. Device is continuously selected when CE = VIL. 3. Address valid prior to or coincident with CE transition low. 4. OE = VIL . 5. Transition is measured ± 500mV from steady state with CL = 5pF as shown in Figure 1B. The parameter is guaranteed but not 100% tested. R0201-BS616UV1010 5 Revision 2.2 April 2001 BSI BS616UV1010 AC ELECTRICAL CHARACTERISTICS ( TA = 0oC to + 70oC, Vcc = 2.0V ) WRITE CYCLE JEDEC PARAMETER PARAMETER NAME NAME tAVAX t E1LWH tAVWL tAVWH tWLWH tWHAX tBW tWLQZ tDVWH tWHDX tGHQZ tWC tCW tAS tAW tWP tWR tBW tWHZ tDW tDH tOHZ tWHOX tOW BS616UV1010-15 MIN. TYP. MAX. DESCRIPTION Write Cycle Time 150 Chip Select to End of Write 150 0 150 -- ns -- -- ns -- -- ns -- -- ns 80 -- -- ns (CE,WE) 0 -- -- ns (LB,UB) 70 -- -- ns Address Setup Time Address Valid to End of Write Write Pulse Width Write recovery Time Date Byte Control to End of Write -- UNIT 0 -- 40 ns Data to Write Time Overlap 40 -- -- ns Data Hold from Write Time 0 -- -- ns Output Disable to Output in High Z 0 -- 40 ns End of Write to Output Active 5 -- -- ns Write to Output in High Z SWITCHING WAVEFORMS (WRITE CYCLE) WRITE CYCLE1 (1) t WC ADDRESS (3) t WR OE (11) t CW (5) CE t BW LB,UB t AW WE (3) t WP t AS (2) (4,10) t OHZ D OUT t DH t DW D IN R0201-BS616UV1010 6 Revision 2.2 April 2001 BSI BS616UV1010 WRITE CYCLE2 (1,6) t WC ADDRESS (11) t CW (5) CE t BW LB,UB t AW WE t WR t WP (3) (2) t t AS DH (4,10) t WHZ D OUT (7) (8) t DW t DH (8,9) D IN NOTES: 1. WE must be high during address transitions. 2. The internal write time of the memory is defined by the overlap of CE and WE low. All signals must be active to initiate a write and any one signal can terminate a write by going inactive. The data input setup and hold timing should be referenced to the second transition edge of the signal that terminates the write. 3. TWR is measured from the earlier of CE or WE going high at the end of write cycle. 4. During this period, DQ pins are in the output state so that the input signals of opposite phase to the outputs must not be applied. 5. If the CE low transition occurs simultaneously with the WE low transitions or after the WE transition, output remain in a high impedance state. 6. OE is continuously low (OE = VIL ). 7. DOUT is the same phase of write data of this write cycle. 8. DOUT is the read data of next address. 9. If CE is low during this period, DQ pins are in the output state. Then the data input signals of opposite phase to the outputs must not be applied to them. 10. Transition is measured ± 500mV from steady state with CL = 5pF as shown in Figure 1B. The parameter is guaranteed but not 100% tested. 11. TCW is measured from the later of CE going low to the end of write. 12. The change of Read/Write cycle must accompany with CE or address toggled. R0201-BS616UV1010 7 Revision 2.2 April 2001 BSI BS616UV1010 ORDERING INFORMATION BS616UV1010 X X -- Y Y SPEED 15: 150ns GRADE C: +0oC ~ +70oC I: -40oC ~ +85oC PACKAGE E: TSOP II - 44 PIN A: BGA-48 PIN(6x8mm) PACKAGE DIMENSIONS TSOP2-44 R0201-BS616UV1010 8 Revision 2.2 April 2001 BSI BS616UV1010 PACKAGE DIMENSIONS (continued) NOTES: 1: CONTROLLING DIMENSIONS ARE IN MILLIMETERS. 2: PIN#1 DOT MARKING BY LASER OR PAD PRINT. 1.4 Max. 3: SYMBOL "N" IS THE NUMBER OF SOLDER BALLS. BALL PITCH e = 0.75 D E N D1 E1 8.0 6.0 48 5.25 3.75 E1 e D1 VIEW A 48 mini-BGA (6 x 8) R0201-BS616UV1010 9 Revision 2.2 April 2001 BSI BS616UV1010 REVISION HISTORY Revision Description Date 2.2 2001 Data Sheet release Apr. 15, 2001 R0201-BS616UV1010 10 Note Revision 2.2 April 2001