N-Channel JFET Switch CORPORATION 2N5434 FEATURES ABSOLUTE MAXIMUM RATINGS (TA = 25oC unless otherwise noted) • Low rds(on) • Excellent Switching • Low Cutoff Current Gate-Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25V Gate-Drain Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25V Gate Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100mA Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400mA Storage Temperature Range . . . . . . . . . . . . . -65oC to +200oC Operating Temperature Range . . . . . . . . . . . -55oC to +150oC Lead Temperature (Soldering, 10sec) . . . . . . . . . . . . . +300oC Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300mW Derate above 25oC . . . . . . . . . . . . . . . . . . . . . . . 2.3mW/ oC PIN CONFIGURATION (TO-52) NOTE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ORDERING INFORMATION G, C 5018 S D Part Package 2N5434 X2N5434 Hermetic TO-52 Sorted Chips in Carriers Temperature Range -55oC to +150oC -55oC to +150oC ELECTRICAL CHARACTERISTICS (TA = 25oC unless otherwise specified) SYMBOL PARAMETER IGSS Gate Reverse Current BVGSS Gate-Source Breakdown Voltage ID(off) Drain Cutoff Current MIN 2N5434 MAX -200 -200 -25 UNITS pA VGS = -15V, VDS = 0 TA = 150 oC nA V IG = -1µA, VDS = 0 200 pA VDS = 5V, VGS = -10V 200 nA VGS(off) Gate-Source Cutoff Voltage -1 IDSS Saturation Drain Current (Note 1) 30 rDS(on) Static Drain-Source ON Resistance 10 ohm VDS(on) Drain-Source ON Voltage 100 mV rds(on) Drain-Source ON Resistance 10 ohm Ciss Common-Source Input Capacitance (Note2) 30 Crss Common-Source Reverse Transfer Capacitance (Note 2) 15 -4 td Turn-ON Delay Time (Note 2) 4 tr Rise Time (Note 2) 1 toff Turn-OFF Delay Time (Note 2) 6 tf Fall Time (Note 2) 30 NOTES: 1. Pulse test required, pulsewidth 300µs, duty cycle ≤3%. 2. For design reference only, not 100% tested. TEST CONDITIONS TA = 150 oC V VDS = 5V, ID = 3nA mA VDS = 15V, VGS = 0 pF ns VGS = 0, I D = 10mA VGS = 0, I D = 0 f = 1kHz VDS = 0, VGS = -10 V VDD = 1.5V, VGS(on) = 0, VGS(off) = -12V, ID(on) = 10mA f = 1MHz 2N5434 CORPORATION SWITCHING TIME, TEST CIRCUIT VDD RL = D VIN RG 50Ω VDD - VDS(ON) ID(ON) VOUT INPUT PULSE SAMPLING SCOPE RISE TIME 0.25ns FALL TIME 0.75ns PULSE WIDTH 200ns PULSE RATE 550pps RISE TIME 0.4ns INPUT RESISTANCE 10MΩ INPUT CAPACITANCE 1.5pF S 0090