CHERRY CS52845ED8

CS52845
CS52845
Current Mode PWM Control Circuit
with 50% Max Duty Cycle
Description
Features
The CS52845 provides all the necessary features to implement offline fixed frequency current-mode
control with a minimum number
of external components.
An undervoltage lockout ensures
that VREF is stabilized before the
output stage is enabled. In the
CS52845 turn on is at 8.4V and
turn off at 7.6V.
The CS52845 incorporates a new
precision temperature-controlled
oscillator to minimize variations in
frequency. An internal toggle flipflop, which blanks the output
every other clock cycle, limits the
duty-cycle range to less than 50%.
Other features include low start-up
current, pulse-by-pulse current limiting, and a high-current totem pole
output for driving capacitive loads,
such as gate of a power MOSFET.
The output is low in the off state,
consistent with N-channel devices.
Absolute Maximum Ratings
Supply Voltage (ICC<30mA) ..........................................................Self Limiting
Supply Voltage (Low Impedance Source)...................................................30V
Output Current ...............................................................................................±1A
Output Energy (Capacitive Load) .................................................................5µJ
Analog Inputs (VFB, VSENSE)...........................................................-0.3V to 5.5V
Error Amp Output Sink Current...............................................................10mA
Lead Temperature Soldering
Reflow (SMD styles only) ...........60 sec. max above 183°C, 230°C peak
■ Optimized for Off-line
Control
■ Temperature
Compensated Oscillator
■ 50% Maximum Duty-cycle
Clamp
■ VREF Stabilized before
Output Stage is Enabled
■ Low Start-up Current
■ Pulse-by-pulse Current
Limiting
■ Improved Undervoltage
Lockout
■ Double Pulse Suppression
■ 1% Trimmed Bandgap
Reference
■ High Current Totem Pole
Output
Package Options
8L SO Narrow
Block Diagram
VCC Undervoltage Lock-out
VCC
34V
VCC Pwr
Set/
Reset
Gnd
5.0 Volt
Reference
VREF
8.4V/7.6V
VFB
-
COMP
+
OSC
R
2.50V
VREF
Undervoltage
Lockout
VOUT
NOR
S
2R
8
VREF
VFB
2
7
VCC
Sense
3
6
VOUT
OSC
4
5
Gnd
COMP 1
14
VREF
NC 2
13
NC
VFB 3
12
VCC
NC 4
11
VCC Pwr
Sense 5
10
VOUT
NC 6
9
Gnd
8
Pwr Gnd
R
Toggle
Flip-Flop
Oscillator
1
14L SO Narrow
Internal
Bias
Error
Amplifier
COMP
Pwr Gnd
R
R
Sense
1V
PWM
Current
Sensing Latch
Comparator
OSC
7
Cherry Semiconductor Corporation
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885-3600 Fax: (401)885-5786
Email: info@cherry-semi.com
Web Site: www.cherry-semi.com
Rev. 3/4/99
1
A
®
Company
CS52845
Electrical Characteristics: -40 ≤ TA ≤ 85˚C; VCC = 15V (Note 1); RT = 10kΩ; CT = 3.3nF for sawtooth mode.unless otherwise stated.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
■ Reference Section
Output Voltage
TJ=25˚C, IREF=1mA
Line Regulation
12≤VCC≤25V
4.95
5.00
5.05
V
6
20
mV
Load Regulation
1≤IREF≤20mA
Temperature Stability
(Note 2)
6
25
mV
0.2
0.4
mV/˚C
Total Output Variation
Line, Load, Temp. (Note 2)
5.10
V
Output Noise Voltage
10Hz≤f≤10kHz, TJ=25˚C (Note 2)
50
Long Term Stability
TA=125˚C, 1000 Hrs. (Note 2)
5
25
mV
Output Short Circuit
TA=25˚C
-30
-100
-180
mA
Initial Accuracy
Sawtooth Mode, TJ=25˚C
47
52
57
kHz
Voltage Stability
12≤VCC≤25V
0.2
1.0
%
Temperature Stability
Sawtooth Mode TMIN≤TA≤TMAX
(Note 2)
VOSC (peak to peak)
5
1.7
4.90
µV
■ Oscillator Section
Amplitude
%
V
■ Error Amp Section
Input Voltage
VCOMP=2.5V
2.45
2.50
2.55
V
Input Bias Current
VFB=0V
-0.3
-1.0
µA
AVOL
2≤VOUT≤4V
65
90
dB
Unity Gain Bandwidth
(Note 2)
0.7
1.0
MHz
PSRR
12≤VCC≤25V
60
70
dB
Output Sink Current
VFB=2.7V, VCOMP=1.1V
2
6
mA
Output Source Current
VFB=2.3V, VCOMP=5V
-0.5
-0.8
mA
VOUT HIGH
VFB=2.3V, RL=15kΩ to Gnd
5
6
V
VOUT LOW
VFB=2.7V, RL=15kΩ to VREF
0.7
1.1
V
■ Current Sense Section
Gain
(Notes 3 & 4)
2.85
3.00
3.15
V/V
Maximum Input Signal
VCOMP=5V (Note 3)
0.9
1.0
1.1
V
PSRR
12≤VCC≤25V (Note 3)
70
Input Bias Current
VSense=0V
-2
-10
µA
Delay to Output
TJ=25˚C (Note 2)
150
300
ns
Output Low Level
ISINK=200mA
ISINK=20mA
0.1
1.5
0.4
2.2
V
V
Output High Level
ISOURCE=20mA
ISOURCE=200mA
Rise Time
TJ=25˚C, CL=1nF (Note 2)
50
150
ns
Fall Time
TJ=25˚C, CL=1nF (Note 2)
50
150
ns
dB
■ Output Section
13.0
12.0
2
13.5
13.5
V
V
Electrical Characteristics: Unless otherwise stated, specifications apply for -40 ≤ TA ≤ 85˚C; VCC = 15V (Note 1); RT = 10kΩ;
CT = 3.3nF for sawtooth mode.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
0.5
1.0
mA
17
mA
■ Total Standby Current
Start-Up Current
Operating Supply Current
VFB=VSense=0V RT=10kΩ, CT=3.3nF
11
VCC Zener Voltage
ICC=25mA
34
V
■ PWM Section
Maximum Duty Cycle
46
Minimum Duty Cycle
0
48
50
%
%
■ Undervoltage Lockout Section
Start Threshold
Min. Operating Voltage
Notes:
After Turn On
7.8
8.4
9.0
V
7.0
7.6
8.2
V
1. Adjust VCC above the start threshold before setting at 15V.
3. Parameter measured at trip point of latch with VFB=0.
2.These parameters, although guaranteed, are not 100% tested in production.
4. Gain defined as: A =
∆VCOMP
∆VSense
; 0 ≤ VSense ≤ 0.8V.
Package Pin Description
PACKAGE PIN #
PIN SYMBOL
FUNCTION
8L
SO Narrow
14L
SO Narrow
1
1
COMP
2
3
VFB
3
5
Sense
Noninverting input to Current Sense Comparator.
4
7
OSC
Oscillator timing network with Capacitor to Ground, resistor to VREF.
5
9
Gnd
Ground.
5
8
Pwr Gnd
6
10
VOUT
7
11
VCCPwr
7
12
VCC
Positive power supply.
8
14
VREF
Output of 5V internal reference.
2,4,6,13
NC
No Connection.
Error amp output, used to compensate error amplifier.
Error amp inverting input.
Output driver Ground.
Output drive pin.
Output driver positive supply.
3
Test Circuit Open Loop Laboratory Test Fixture
V REF
RT
2N2222
V CC
A
100kΩ
V REF
COMP
4.7kΩ
1kΩ
Error Amp
Adjust
V FB
V CC
0.1µF
5kΩ
4.7kΩ
0.1µF
V OUT
Sense
Sense
Adjust
OSC
1kΩ
1W
V OUT
Gnd
Gnd
CT
Circuit Description
VCC
Undervoltage Lockout
During Undervoltage Lockout (Figure 1), the output driver is biased to sink minor amounts of current. The output
should be shunted to ground with a resistor to prevent
activating the power switch with extraneous leakage currents.
ON/OFF Command
to reset of IC
PWM Waveform
To generate the PWM waveform, the control voltage from
the error amplifier is compared to a current sense signal
which represents the peak output inductor current (Figure
2). An increase in VCC causes the inductor current slope to
increase, thus reducing the duty cycle. This is an inherent
feed-forward characteristic of current mode control, since
the control voltage does not have to change during
changes of input supply voltage.
When the power supply sees a sudden large output current increase, the control voltage will increase allowing
the duty cycle to momentarily increase. Since the duty
cycle tends to exceed the maximum allowed to prevent
transformer saturation in some power supplies, the internal oscillator waveform provides the maximum duty cycle
clamp as programmed by the selection of OSC components.
VON = 8.4V
VOFF = 7.6V
ICC
<15mA
<1mA
VCC
VON
VOFF
Figure 1: Startup voltage for the CS52845.
4
Setting the Oscillator
The times Tc and Td can be determined as follows:
VOSC
OSC
RESET
t c = RTCT ln
Toggle
F/F Output
t d = RTCT ln
EA Output
Switch
Current
(
(
VREF - Vlower
VREF - Vupper
)
VREF - IdRT - Vlower
VREF - IdRT - Vupper
)
Substituting in typical values for the parameters in the
above formulas:
VREF = 5.0V, Vupper = 2.7V, Vlower = 1.0V, Id = 8.3mA,
then
tc ≈ 0.5534RTCT
VCC
IO
VO
td = RTCT ln
Figure 2: Timing Diagram
(
2.3 - 0.0083 RT
4.0 - 0.0083 RT
)
For better accuracy RT should be ≥10kΩ.
Vupper
Grounding
Vlower
ton
tc
High peak currents associated with capacitive loads necessitate careful grounding techniques. Timing and bypass
capacitors should be connected close to Gnd in a single
point ground.
The transistor and 5kΩ potentiometer are used to sample
the oscillator waveform and apply an adjustable ramp to
Sense.
toff
td
ton=tc
toff=tc+2td
Figure 3: Duty Cycle parameters.
5
CS52845
Circuit Description:: continued
CS52845
Package Specification
PACKAGE THERMAL DATA
PACKAGE DIMENSIONS IN mm (INCHES)
Thermal Data
D
Lead Count
Metric
Max
Min
5.00
4.80
8.75
8.55
8L SO Narrow
14L SO Narrow
English
Max Min
.197 .189
.344 .337
RΘJC
RΘJA
typ
typ
8L
SO Narrow
45
165
14L
SO Narrow
30
125
˚C/W
˚C/W
Surface Mount Narrow Body (D); 150 mil wide
4.00 (.157)
3.80 (.150)
6.20 (.244)
5.80 (.228)
0.51 (.020)
0.33 (.013)
1.27 (.050) BSC
1.75 (.069) MAX
1.57 (.062)
1.37 (.054)
1.27 (.050)
0.40 (.016)
0.25 (.010)
0.19 (.008)
D
0.25 (0.10)
0.10 (.004)
REF: JEDEC MS-012
Ordering Information
Part Number
CS52845ED8
CS52845EDR8
CS52845ED14
CS52845EDR14
Rev. 3/4/99
Description
8L SO Narrow
8L SO Narrow (tape & reel)
14L SO Narrow
14L SO Narrow (tape & reel)
Cherry Semiconductor Corporation reserves the
right to make changes to the specifications without
notice. Please contact Cherry Semiconductor
Corporation for the latest available information.
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© 1999 Cherry Semiconductor Corporation