CHERRY CS8101YDWFR20

CS8101
CS8101
Micropower 5V, 100mA Low Dropout
Linear Regulator with RESET and ENABLE
Features
Description
The CS8101 is a precision 5V
micropower voltage regulator with
very low quiescent current (70µA
typ at 100µA load). The 5V output is
accurate within ±2% and supplies
100mA of load current with a typical dropout voltage of only 400mV.
Microprocessor control logic
includes an ENABLE input and an
active RESET. This combination of
low quiescent current, outstanding
regulator performance and control
logic makes the CS8101 ideal for
any battery operated, microprocessor controlled equipment.
normal operation if the output
voltage drops outside the regulation
limits by more than 200mV typ. The
logic level compatible ENABLE
input allows the user to put the regulator into a shutdown mode where
it draws only 20µA typical of quiescent current.
■ 5V ±2% Output
The regulator is protected against
reverse battery, short circuit, over
voltage, and thermal overload conditions. The device can withstand
load dump transients making it
suitable for use in automotive environments.
■ 100mA Output Current
Capability
The active RESET circuit includes
hysteresis, and operates correctly at
an output voltage as low as 1V. The
RESET function is activated during
the power up sequence or during
The CS8101 is functionally equivalent to the National Semiconductor
LP2951 series low current regulators.
■ Low 70µA Quiescent
Current
■ Active RESET
■
ENABLE Input for
ON/OFF and Active/Sleep
Mode Control
■ Fault Protection
+60V Peak Transient
Voltage
-15V Reverse Voltage
Short Circuit
Thermal Overload
■ Low Reverse Current
(Output to Input)
Package Options
Block Diagram
20L SOIC Wide
(Internally Fused Leads)
ENABLE
VOUT
VIN
Over
Voltage
Shutdown
Current Source
(Circuit Bias)
Internally connected
on 5 lead TO-220
ENABLE
NC
NC
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
NC
NC
NC
NC
RESET
NC
8L SOIC
5L TO-220
+
Thermal
Protection
Tab (Gnd)
- Error
Amplifier
VIN
NC
Current Limit
Sense
VOUTSense
VOUT
1
NC
VIN
VOUT 1
VOUTSense
NC
ENABLE
NC
RESET
Gnd
Bandgap
Reference
RESET
+
-
Gnd
Reset
Comparator
1. VOUT
2. ENABLE
3. Gnd
4. RESET
5. VIN
Other Packages: D2PAK (consult factory)
Cherry Semiconductor Corporation
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885-3600 Fax: (401)885-5786
Email: info@cherry-semi.com
Web Site: www.cherry-semi.com
Rev. 4/9/99
1
A
¨
Company
CS8101
Absolute Maximum Ratings
Power Dissipation.............................................................................................................................................Internally Limited
Transient Peak Voltage (46V Load Dump) ..................................................................................................................-15V, 60V
Output Current .................................................................................................................................................Internally Limited
ESD Susceptibility (Human Body Model) ..............................................................................................................................2kV
Operating Temperature..........................................................................................................................................-40¡C to 125¡C
Junction Temperature .............................................................................................................................................-40¡C to 150¡C
Storage Temperature ................................................................................................................................................-55C to 150¡C
Lead Temperature Soldering Wave Solder (through hole styles only) ..........................................10 sec. max, 260¡C peak
Reflow (SMD styles only) ..........................................60 sec. max above 183¡C, 230¡C peak
Electrical Characteristics: 6V ² VIN ² 26V, IOUT = 1mA, -40 ² TA ² 125, -40 ² TJ ² 150¡C unless otherwise specified.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
4.90
4.85
5.00
5.00
5.10
5.15
V
V
■ Output Stage
Output Voltage, VOUT
9V < VIN < 16V, 100µA ² IOUT ² 100mA
6V ² VIN ² 26V, 100µA ² IOUT ² 100mA
Dropout Voltage (VIN-VOUT)
IOUT = 100mA
400
600
mV
IOUT = 100µA
100
150
mV
Load Regulation
VIN = 14V, 100µA ² IOUT ² 100mA
5
50
mV
Line Regulation
6V < V < 26V, IOUT = 1mA
5
50
mV
IOUT = 100µA, VIN = 6V
IOUT = 50mA
IOUT ² 100mA
70
4
12
140
6
20
µA
mA
mA
20
50
µA
Quiescent Current, (IQ)
Active Mode
Sleep Mode
VOUT = OFF, VIN = 6V, V ENABLE = 2V
Ripple Rejection
7 ² VIN ² 17V, IOUT = 100mA, f = 120Hz
Current Limit
Short Circuit Output Current
VOUT = 0V
Thermal Shutdown
Overvoltage Shutdown
VOUT ² 1V
Reverse Current
VOUT = 5V, VIN = 0V
60
75
dB
105
200
mA
25
125
mA
150
180
¡C
30
34
38
V
100
200
µA
1.4
1.4
2.0
V
V
30
100
µA
4.525
4.500
4.75
4.700
VOUT - 0.05
VOUT - 0.075
V
V
25
50
100
mV
25
µA
■ Enable Input ( ENABLE )
Threshold
HIGH
LOW
(VOUT OFF)
(VOUT ON)
Input Current
V ENABLE = 2.4V
0.6
■ Reset Function ( RESET )
RESET Threshold
HIGH (VRH)
LOW (VRL)
VOUT Increasing
VOUT Decreasing
RESET Hysteresis
(HIGH - LOW)
Reset Output Leakage
RESET = HIGH
VOUT ³ VRH
Output Voltage
Low (VRLO)
R RESET = 10K
Low (VRpeak)
1V ² VOUT ² VRL
0.1
0.4
V
VOUT, Power up, Power down
0.6
1.0
V
2
CS8101
Package Lead Description
PACKAGE LEAD #
20 Lead SOIC
LEAD SYMBOL
8 Lead
SOIC
8
(Internally Fused Leads)
19
5 Lead
TO-220
5
1
20
3
FUNCTION
VIN
Input voltage.
1
VOUT
5V, ±2%, 100mA output.
1
2
ENABLE
Logic level switches output off when toggled HIGH.
4
4,5,6,7
14,15,16,17
3
Gnd
Ground. All Gnd leads must be connected to Ground.
5
10
4
RESET
Active reset (accurate to VOUT ³ 1V).
VOUTSense
Kelvin connection which allows remote sensing of output voltage for improved regulation. If remote sensing
is not required, connect to VOUT.
NC
No Connection.
2
6,7
2,3,8,9,11,12,13,18
Circuit Description
Voltage Reference and Output Circuitry
FOR 7V < VIN < 26V
Output Stage Protection
The output stage is protected against overvoltage, short
circuit and thermal runaway conditions (Figure 1).
VIN
ENABLE
VINH
> 30V
VRH
VRL
VIN
VOUT
VOUT
(1)
VR
(2)
PEAK
RESET
VR
PEAK
VRLO
(1) = NO RESET DELAY CAPACITOR
(2) = WITH RESET DELAY CAPACITOR
IOUT
Load
Dump
Current
Limit
Short
Circuit
Figure 2. Circuit Waveform
ENABLE Function
The ENABLE function switches the output transistor ON
and OFF. When the voltage on the ENABLE lead exceeds
1.4V typ, the output pass transistor turns off, leaving a
high impedance facing the load. The IC will remain in
Sleep mode, drawing only 50µA, until the voltage on this
input drops below the ENABLE threshold.
Figure 1. Typical Circuit Waveforms for Output Stage Protection.
If the input voltage rises above 30V (e.g. load dump), the output shuts down. This response protects the internal circuitry
and enables the IC to survive unexpected voltage transients.
Should the junction temperature of the power device exceed
180ûC (typ) the load current capability is reduced thereby
preventing thermal overload. This thermal management
function is an effective means to prevent die overheating
since the load current is the principle heat source in the IC.
RESET Function
A RESET signal (low voltage) is generated as the IC powers up until VOUT is within 250mV of the regulated output
voltage, or when VOUT drops out of regulation,and is
lower than 300mV below the regulated output voltage. A
hysteresis of 50mV is included in the function to minimize
oscillations.
Regulator Control Functions
The CS8101 contains two microprocessor compatible control functions: ENABLE and RESET (Figure 2).
The RESET output is an open collector NPN transistor,
controlled by a low voltage detection circuit. The circuit is
functionally independent of the rest of the IC thereby
guaranteeing that the RESET signal is valid for VOUT as low
as 1V.
3
CS8101
Circuit Description: continued
based applications. RC values can be chosen using the
following formula:
VOUT
CS8101
COUT
RRST
5V to mP
and
System
Power
RTOTCRST =
ln
to mP
RESET
Port
RESET
[(
where:
CRST
ÐtDelay
VT Ð VOUT
VRST Ð VOUT
)]
RRST = RESET Delay resistor
RIN
= µP port impedance
RTOT = RRST in parallel with RIN
CRST = RESET Delay capacitor
Figure 3. RC Network for RESET Delay
tDelay = desired delay time
VRST = VSAT of RESET lead (0.7V @ turn - ON)
An external RC network on the RESET lead (Figure 3) provides a sufficiently long delay for most microprocessor
VT
= RESET threshold
Applications Notes
VIN
VBAT
VOUT
VCC
0.1mF
CS8101
500kW
ENABLE
Gnd
COUT
RRST
mP
RESET
RESET
I/O Port
CRST
Q1
100kW
500kW
100kW
SWITCH
Figure 4. Microprocessor Control of CS8101 using external switching transistor Q1.
The circuit depicted in Figure 4 lets the microprocessor
control its power source, the CS8101 regulator. An I/O
port on the µP and the SWITCH port are used to drive the
base of Q1. When Q1 is driven into saturation, the voltage
on the ENABLE lead falls below its lower threshold. The
regulatorÕs output is enabled. When the drive current is
removed, the voltage on the ENABLE lead rises, the output is switched off and the IC moves into Sleep mode
where it draws 50µA (max).
By coupling these two controls with the ENABLE lead, the
system has added flexibility. Once the system is running,
the state of the SWITCH is irrelevant as long as the I/O
port continues to drive Q1. The microprocessor can turn
off its own power by withdrawing drive current, once the
SWITCH is open. This software control at the I/O port
allows the microprocessor to finish key housekeeping
functions before power is removed.
The logic options are summarized in Table 1.
4
increase the load current slowly from zero to full load
while observing the output for any oscillations. If no oscillations are observed, the capacitor is large enough to
ensure a stable design under steady state conditions.
Step 3: Increase the ESR of the capacitor from zero using
the decade box and vary the load current until oscillations
appear. Record the values of load current and ESR that
cause the greatest oscillation. This represents the worst
case load conditions for the regulator at low temperature.
Step 4: Maintain the worst case load conditions set in step
3 and vary the input voltage until the oscillations increase.
This point represents the worst case input voltage conditions.
Step 5: If the capacitor is adequate, repeat steps 3 and 4
with the next smaller valued capacitor. A smaller capacitor
will usually cost less and occupy less board space. If the
output oscillates within the range of expected operating
conditions, repeat steps 3 and 4 with the next larger standard capacitor value.
Step 6: Test the load transient response by switching in
various loads at several frequencies to simulate its real
working environment. Vary the ESR to reduce ringing.
Step 7: Remove the unit from the environmental chamber
and heat the IC with a heat gun. Vary the load current as
instructed in step 5 to test for any oscillations.
Once the minimum capacitor value with the maximum
ESR is found, a safety factor should be added to allow for
the tolerance of the capacitor and any variations in regulator performance. Most good quality aluminum electrolytic
capacitors have a tolerance of ±20% so the minimum value
found should be increased by at least 50% to allow for this
tolerance plus the variation which will occur at low temperatures. The ESR of the capacitor should be less than
50% of the maximum allowable ESR found in step 3 above.
Table 1. Logic Control of CS8101 Output
Microprocessor
I/O drive
Switch
ENABLE
Output
ON
Closed
LOW
ON
Open
LOW
ON
OFF
Closed
LOW
ON
Open
HIGH
OFF
The I/O port of the microprocessor typically provides
50µA to Q1. In automotive applications the SWITCH is
connected to the ignition switch.
Stability Considerations
The output or compensation capacitor helps determine
three main characteristics of a linear regulator: start-up
delay, load transient response and loop stability.
VIN
VOUT
CIN*
0.1mF
CS8101
RRST
COUT**
10mF
RESET
ENABLE
*CIN required if regulator is located far from the power supply filter.
** COUT required for stability. Capacitor must operate at minimum
temperature expected.
Figure 5. Test and application circuit showing output compensation.
Calculating Power Dissipation
in a Single Output Linear Regulator
The capacitor value and type should be based on cost,
availability, size and temperature constraints. A tantalum
or aluminum electrolytic capacitor is best, since a film or
ceramic capacitor with almost zero ESR can cause instability. The aluminum electrolytic capacitor is the least expensive solution, but, if the circuit operates at low temperatures (-25¡C to -40¡C), both the value and ESR of the
capacitor will vary considerably. The capacitor manufacturers data sheet usually provides this information.
The maximum power dissipation for a single output regulator (Figure 6) is:
(1)
PD(max) = {VIN(max) - VOUT(min)}IOUT(max) + VIN(max)IQ
where:
VIN(max) is the maximum input voltage,
VOUT(min) is the minimum output voltage,
IOUT(max) is the maximum output current for the application, and
IQ is the quiescent current the regulator consumes at
IOUT(max).
The value for the output capacitor COUT shown in Figure 5
should work for most applications, however it is not necessarily the optimized solution.
To determine an acceptable value for COUT for a particular
application, start with a tantalum capacitor of the recommended value and work towards a less expensive alternative part.
Step 1: Place the completed circuit with a tantalum capacitor of the recommended value in an environmental chamber at the lowest specified operating temperature and
monitor the outputs with an oscilloscope. A decade box
connected in series with the capacitor will simulate the
higher ESR of an aluminum capacitor. Leave the decade
box outside the chamber, the small resistance added by the
longer leads is negligible.
Step 2: With the input voltage at its maximum value,
Once the value of PD(max) is known, the maximum permissible value of RQJA can be calculated:
RQJA =
150¡C - TA
PD
(2)
The value of RQJA can then be compared with those in
the package section of the data sheet. Those packages with
RQJA's less than the calculated value in equation 2 will keep
the die temperature below 150¡C.
5
CS8101
Application Notes: continued
CS8101
Application Notes: continued
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external
heatsink will be required.
IIN
VIN
Smart
Regulator
}
Heatsinks
A heatsink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed
to determine the value of RQJA:
IOUT
VOUT
Control
Features
RQJA = RQJC + RQCS + RQSA
(3)
where:
RQJC = the junctionÐtoÐcase thermal resistance,
IQ
RQCS = the caseÐtoÐheatsink thermal resistance, and
RQSA = the heatsinkÐtoÐambient thermal resistance.
RQJC appears in the package section of the data sheet. Like
RQJA, it too is a function of package type. RQCS and RQSA
are functions of the package type, heatsink and the interface between them. These values appear in heatsink data
sheets of heatsink manufacturers.
Figure 6: Single output regulator with key performance parameters
labeled.
6
CS8101
Package Specification
PACKAGE DIMENSIONS IN mm (INCHES)
PACKAGE THERMAL DATA
D
Lead Count
8L SOIC
20L SOIC
Metric
Max
Min
5.00
4.80
13.00 12.60
English
Max Min
.197
.189
.512
.496
Thermal Data
RQJC
typ
RQJA
typ
8 Lead
20 Lead
SOIC SOIC Wide
45
9
165
55
Surface Mount Narrow Body (D); 150 mil wide
4.00 (.157)
3.80 (.150)
6.20 (.244)
5.80 (.228)
0.51 (.020)
0.33 (.013)
1.27 (.050) BSC
1.75 (.069) MAX
1.57 (.062)
1.37 (.054)
1.27 (.050)
0.40 (.016)
0.25 (.010)
0.19 (.008)
0.25 (0.10)
0.10 (.004)
D
REF: JEDEC MS-012
Surface Mount Wide Body (DW); 300 mil wide
7.60 (.299)
7.40 (.291)
10.65 (.419)
10.00 (.394)
0.51 (.020)
0.33 (.013)
1.27 (.050) BSC
2.49 (.098)
2.24 (.088)
1.27 (.050)
0.40 (.016)
2.65 (.104)
2.35 (.093)
0.32 (.013)
0.23 (.009)
D
REF: JEDEC MS-013
7
0.30 (.012)
0.10 (.004)
5 Lead
TO-220
3.3
ûC/W
50
ûC/W
CS8101
Package Specification
5 Lead TO-220 (T) Straight
5 Lead TO-220 (THA) Horizontal
4.83 (.190)
10.54 (.415)
9.78 (.385)
10.54 (.415)
9.78 (.385)
2.87 (.113)
6.55 (.258) 2.62 (.103)
5.94 (.234)
1.40 (.055)
1.14 (.045)
4.83 (.190)
4.06 (.160)
2.87 (.113)
2.62 (.103)
3.96 (.156)
3.71 (.146)
1.40 (.055)
4.06 (.160)
1.14 (.045)
3.96 (.156)
3.71 (.146)
14.99 (.590)
14.22 (.560)
6.55 (.258)
5.94 (.234)
14.99 (.590)
14.22 (.560)
2.77 (.109)
6.83 (.269)
14.22 (.560)
13.72 (.540)
1.68
(.066)
TYP
1.70 (.067)
0.81(.032)
2.92 (.115)
2.29 (.090)
0.56 (.022)
0.36 (.014)
6.60 (.260)
5.84 (.230)
6.81(.268)
1.02 (.040)
0.76 (.030)
1.83(.072)
1.57(.062)
1.02(.040)
0.63(.025)
0.56 (.022)
0.36 (.014)
6.93(.273)
6.68(.263)
2.92 (.115)
2.29 (.090)
5 Lead TO-220 (TVA) Vertical
4.83 (.190)
4.06 (.160)
10.54 (.415)
9.78 (.385)
3.96 (.156)
3.71 (.146)
1.40 (.055)
1.14 (.045)
6.55 (.258)
5.94 (.234)
2.87 (.113)
2.62 (.103)
14.99 (.590)
14.22 (.560)
1.78 (.070)
2.92 (.115)
2.29 (.090)
8.64 (.340)
7.87 (.310)
4.34 (.171)
1.68
(.066) typ
1.70 (.067)
0.56 (.022)
0.36 (.014)
7.51 (.296)
6.80 (.268)
.94 (.037)
.69 (.027)
Ordering Information
Part Number
CS8101YD8
CS8101YDR8
CS8101YDWF20
CS8101YDWFR20
CS8101YT5
CS8101YTVA5
CS8101YTHA5
Rev. 4/9/99
Description
8L SOIC
8L SOIC (tape & reel)
20L SOIC (internally fused leads)
20L SOIC (internally fused leads)
(tape & reel)
5L TO-220
5L TO-220 Vertical
5L TO-220 Horizontal
Cherry Semiconductor Corporation reserves the
right to make changes to the specifications without
notice. Please contact Cherry Semiconductor
Corporation for the latest available information.
8
© 1999 Cherry Semiconductor Corporation